Heterojunction Hall element

Abstract

To provide a highly sensitive heterojunction Hall element.SOLUTION: A heterojunction Hall element 10 forms a two-dimensional electron gas layer 2 serving as an active layer and a cover layer 6 laminated on the two-dimensional electron gas layer by laminating semiconductor layers having different bandgaps. The thickness of the cover layer 6 is set such that a depletion layer spreading from the surface of the stacked semiconductor layers does not affect the two-dimensional electron gas layer 2, thereby eliminating the influence of a surface depletion layer on the two-dimensional electron gas layer 2. In addition, a semiconductor layer (bandgap relaxation layer 6b) that relaxes the bandgap difference is arranged between the semiconductor layers that constitute the cover layer 6 and have different bandgaps to reduce the contact resistance of input / output electrodes.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present invention relates to a heterojunction Hall element that utilizes a two-dimensional electron gas layer generated at a heterojunction interface as an active layer. [Background technology]

[0002] A Hall element that uses a two-dimensional electron gas layer generated at a heterojunction interface as an active layer can realize a highly sensitive Hall element due to the high electron mobility of the two-dimensional electron gas and the thin film active layer (for example, Patent Document 1).

[0003] In this type of heterojunction Hall element, if the semiconductor layer covering the active layer is thin, the depletion layer (surface depletion layer) formed near the surface of the semiconductor layer reaches the two-dimensional electron gas layer. As a result, the two-dimensional electron gas decreases or disappears, causing problems such as a decrease in sensitivity and the Hall element not working. If the semiconductor layer covering the active layer is made thicker, the semiconductor layer directly below the input and output electrodes will also become thicker, and the contact resistance between the input electrode and the two-dimensional electron gas layer and the contact resistance between the output electrode and the two-dimensional electron gas layer will increase. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 7-211954 Summary of the Invention [Problem to be solved by the invention]

[0005] In conventional heterojunction Hall elements, it is not possible to reduce the input / output resistance of the input / output electrodes while suppressing the effect of the surface depletion layer, and it is therefore difficult to increase the sensitivity of the heterojunction Hall element. The present invention aims to solve such problems and provide a highly sensitive heterojunction Hall element. [Means for solving the problem]

[0007] In order to achieve the above objectives, Claims of the present application 1 The invention relates to A heterojunction Hall element having an active layer formed of a two-dimensional electron gas layer at an interface of stacked semiconductor layers having different bandgaps, the heterojunction Hall element further comprising a cover layer formed by stacking semiconductor layers having different bandgaps on the active layer, the cover layer having a thickness such that a surface depletion layer does not reach the two-dimensional electron gas layer, and a third semiconductor layer is disposed between a first semiconductor layer stacked on a surface side and a second semiconductor layer stacked on the two-dimensional electron gas layer side and having a bandgap different from that of the first semiconductor layer, the third semiconductor layer reducing the difference in bandgap between the first semiconductor layer and the second semiconductor layer, The active layer is composed of a two-dimensional electron gas layer formed by a heterojunction between an undoped InGaAs layer and an n-type AlGaAs layer, and the cover layer includes the n-type AlGaAs layer serving as the second semiconductor layer, an undoped AlGaAs layer serving as the third semiconductor layer laminated on the n-type AlGaAs layer, and an undoped GaAs layer serving as the first semiconductor layer laminated on the undoped AlGaAs layer, and the undoped AlGaAs layer serving as the third semiconductor layer is a layer in which an Al composition ratio is set smaller toward a junction surface side with the undoped GaAs layer to alleviate a band gap difference. and an input electrode and an output electrode that are in ohmic contact with the two-dimensional electron gas layer through the cover layer. It is characterized by the above.

[0008] Claims of the present application 2 The invention according to claim 1 In the heterojunction Hall element described in the above, the cover layer comprises an n-type InGaP layer stacked on the non-doped GaAs layer and is in ohmic contact with the two-dimensional electron gas layer via the n-type InGaP layer.

[0009] Claims of the present application 3 The invention according to claim 1 or claims 2 In any one of the heterojunction Hall elements described above, the input electrode and the output electrode are in ohmic contact with the two-dimensional electron gas layer via an n-type GaAs layer laminated on the cover layer. Effect of the Invention

[0010] The heterojunction Hall element of the present invention has a configuration in which a cover layer is provided on an active layer, which can reduce input / output resistance while suppressing the influence of a surface depletion layer, thereby making it possible to realize a highly sensitive heterojunction Hall element. [Brief description of the drawings]

[0011] [Figure 1] FIG. 1 is an explanatory diagram of a heterojunction Hall element according to a first embodiment of the present invention. [Diagram 2] FIG. 1 is an explanatory diagram of a heterojunction Hall element according to a first embodiment of the present invention. [Diagram 3] FIG. 4 is an explanatory diagram of a heterojunction Hall element according to a second embodiment of the present invention. [Figure 4] FIG. 4 is an explanatory diagram of a heterojunction Hall element according to a second embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] The heterojunction Hall element of the present invention is configured to have a two-dimensional electron gas layer serving as an active layer and a cover layer laminated on the two-dimensional electron gas layer, which are formed by laminating semiconductor layers having different band gaps. Here, the thickness of the cover layer is set to a thickness at which a depletion layer (surface depletion layer) spreading from the surface of the laminated semiconductor layer does not affect the two-dimensional electron gas layer (thickness at which the depletion layer does not reach the two-dimensional electron gas layer). By configuring in this way, it is possible to eliminate the influence of the surface depletion layer on the two-dimensional electron gas layer. Furthermore, in the present invention, a semiconductor layer that alleviates the difference in band gap is disposed between the semiconductor layers having different band gaps that constitute the cover layer. By configuring in this way, even if the cover layer is made thick, it is possible to reduce the input / output resistance of the input electrode and the output electrode that are in ohmic contact with the two-dimensional electron gas layer through the cover layer. Hereinafter, an embodiment of the present invention will be described.

[0013] (First embodiment) Fig. 1 is an explanatory diagram of a heterojunction Hall element 10 according to a first embodiment, in which Fig. 1(a) is a plan view and Fig. 1(b) is a schematic cross-sectional view taken along the A1-A2 cross section of the heterojunction Hall element 10 shown in Fig. 1(a). The heterojunction Hall element 10 of this embodiment has a structure in which a plurality of semiconductor layers having different bandgaps are laminated on a substrate 1, and a two-dimensional electron gas layer 2 formed at the heterojunction interface serves as an active layer.

[0014] This two-dimensional electron gas layer 2 is formed in a cross-shaped region surrounded by an insulating region 3 into which impurity ions are implanted, as shown in Fig. 1(a). Two input electrodes 4a, 4b and two output electrodes 5a, 5b are formed on the surface of the region in which the two-dimensional electron gas layer 2 is formed.

[0015] When a constant current (or a constant voltage) is applied between the two input electrodes 4a and 4b in a state in which the heterojunction Hall element 10 having such a structure is placed in a vertical magnetic field from the front surface to the back surface, a potential difference is generated between the two output electrodes 5a and 5b due to the Hall effect in the active layer. The magnetic flux density of the magnetic field is calculated by measuring this potential difference.

[0016] As described above, if the semiconductor layer laminated on the two-dimensional electron gas layer 2 is thin, the contact resistance between the input electrodes 4a, 4b and the output electrodes 5a, 5b and the two-dimensional electron gas layer 2 is small, but the two-dimensional electron gas is reduced or disappears due to the influence of the surface depletion layer. Therefore, in this embodiment, as shown in FIG. 1(b), a cover layer 6 made of multiple semiconductor layers is provided to reduce the contact resistance between the input electrodes 4a, 4b and the two-dimensional electron gas layer 2 (similarly, the contact resistance between the output electrodes 5a, 5b and the two-dimensional electron gas layer 2) while suppressing the influence of the depletion layer. Here, the cover layer 6 is a semiconductor layer formed on the two-dimensional electron gas layer 2.

[0017] Next, the cover layer 6 will be described. Fig. 2 is an explanatory diagram of the two-dimensional electron gas layer 2 which is the active layer of the heterojunction Hall element 10 described in Fig. 1(b) and the cover layer 6 laminated thereon. To form the two-dimensional electron gas layer 2, an electron transit layer 7 having a narrow band gap through which two-dimensional electron gas transits and an electron supply layer 6a having a wider band gap than the electron transit layer 7 are laminated on the substrate 1. The two-dimensional electron gas layer 2 is formed by the heterojunction consisting of the electron transit layer 7 and the electron supply layer 6a.

[0018] The electron supply layer 6a constitutes a part of the cover layer and corresponds to the second semiconductor layer of the present invention. Since the electron supply layer 6a is thin, in this embodiment, the band gap relaxation layer 6b and the surface layer 6c are laminated to form the cover layer 6. The band gap relaxation layer 6b corresponds to the third semiconductor layer, and the surface layer 6c corresponds to the first semiconductor layer.

[0019] The surface layer 6c is made of a semiconductor layer having a band gap narrower than that of the semiconductor layer constituting the electron supply layer 6a in order to reduce contact resistance with the input electrodes 4a, 4b and the output electrodes 5a, 5b.

[0020] The band gap relaxation layer 6b is a semiconductor layer having a band gap between the band gap of the semiconductor layer constituting the electron supply layer 6a and the band gap of the semiconductor layer constituting the surface layer 6c in order to relax the difference in band gap between the electron supply layer 6a and the surface layer 6c.

[0021] When the cover layer 6 is made up of multiple semiconductor layers in this way, it is possible to suppress the effects of a surface depletion layer by using a thinner cover layer 6 as a whole, compared to a case where the cover layer 6 is made up of a single semiconductor layer. That is, by including a semiconductor layer with a large band gap in the cover layer 6, the effects of the surface depletion layer can be suppressed even if the cover layer 6 is thin.

[0022] Furthermore, by setting the overall thickness of the cover layer 6 to be thin and the thickness of each of the stacked semiconductor layers to be thin, it is possible to reduce the contact resistance between the input electrodes 4a, 4b and the output electrodes 5a, 5b and the two-dimensional electron gas layer 2, even if the cover layer 6 contains a semiconductor layer with a large band gap.

[0023] In the example shown in FIG. 2, a contact layer 8 is provided on the cover layer 6. This is laminated in order to reduce the contact resistance between the input electrodes 4a, 4b and the surface layer 6c. Similarly, by providing the contact layer 8 between the output electrodes 5a, 5b and the surface layer 6c, the contact resistance can be reduced, which is preferable. The contact layer 8 can also be configured as a part of the cover layer 6. Also, if the contact resistance between the input electrodes 4a, 4b and the surface layer 6c is sufficiently small, it is possible to configure without providing the contact layer 8.

[0024] In this manner, the heterojunction Hall element of the present embodiment can reduce the input / output resistance of the input electrode and the output electrode while suppressing the influence of the surface depletion layer, making it possible to configure a highly sensitive heterojunction Hall element.

[0025] Second Embodiment Next, a second embodiment will be described. Fig. 3 is an explanatory diagram of a heterojunction Hall element 10A according to the second embodiment, in which Fig. 3(a) is a plan view and Fig. 3(b) is a cross-sectional view of the heterojunction Hall element 10A shown in Fig. 3(a) taken along the line B1-B2. As in the first embodiment, the heterojunction Hall element 10A of this embodiment also has a plurality of semiconductor layers with different bandgaps laminated on a substrate 1, and a two-dimensional electron gas layer 2 formed at the heterojunction interface serves as an active layer.

[0026] The two-dimensional electron gas layer 2 is formed in a cross-shaped region surrounded by an insulating region 3 into which impurity ions are implanted, as shown in Fig. 3(a). Two input electrodes 4a, 4b and two output electrodes 5a, 5b are formed on the surface of the region in which the two-dimensional electron gas layer 2 is formed.

[0027] As described above, if the semiconductor layer laminated on the two-dimensional electron gas layer 2 is thin, the contact resistance between the input electrodes 4a, 4b and the output electrodes 5a, 5b and the two-dimensional electron gas layer 2 is small, but the two-dimensional electron gas is reduced or disappears due to the influence of the surface depletion layer. Therefore, in this embodiment, as shown in FIG. 3(b), a cover layer 6 made of multiple semiconductor layers is provided that reduces the contact resistance between the input electrodes 4a, 4b and the two-dimensional electron gas layer 2 (similarly, the contact resistance between the output electrodes 5a, 5b and the two-dimensional electron gas layer 2) while suppressing the influence of the depletion layer. In this embodiment, the configuration of the cover layer 6 is different from that of the first embodiment described above, as described below.

[0028] 4 is an explanatory diagram of the two-dimensional electron gas layer 2 serving as the active layer of the heterojunction Hall element 10A described in FIG. 3(b) and the cover layer 6 laminated thereon. To form the two-dimensional electron gas layer 2, an electron transit layer 7 having a narrow band gap through which two-dimensional electron gas transits and an electron supply layer 6a having a wider band gap than the electron transit layer 7 are laminated on the substrate 1. The two-dimensional electron gas layer 2 is formed by the heterojunction consisting of the electron transit layer 7 and the electron supply layer 6a.

[0029] The electron supply layer 6a constitutes a part of the cover layer and corresponds to the second semiconductor layer of the present invention. Since the electron supply layer 6a is thin, in this embodiment, the band gap relaxation layer 6b, the surface layer 6c, and the semiconductor layer 6d with a small surface state are laminated to form the cover layer 6. The band gap relaxation layer 6b corresponds to the third semiconductor layer, and the surface layer 6c corresponds to the first semiconductor layer.

[0030] The surface layer 6c is made of a semiconductor layer having a band gap narrower than that of the semiconductor layer constituting the electron supply layer 6a in order to reduce the contact resistance of the input electrodes 4a, 4b and the output electrodes 5a, 5b.

[0031] The band gap relaxation layer 6b is a semiconductor layer having a band gap between the band gap of the semiconductor layer constituting the electron supply layer 6a and the band gap of the semiconductor layer constituting the surface layer 6c in order to relax the difference in band gap between the electron supply layer 6a and the surface layer 6c.

[0032] In this embodiment, a semiconductor layer 6d with a low surface level is laminated on the surface layer 6c and constitutes a part of the cover layer 6. By providing the semiconductor layer 6d with a low surface level, it is possible to narrow the width of the surface depletion layer. By forming the semiconductor layer 6d with a low surface level thin, it is possible to configure it so that it does not affect the input / output resistance of the input electrodes 4a, 4b and the output electrodes 5a, 5b.

[0033] When the cover layer 6 is made up of multiple semiconductor layers in this way, the influence of the surface depletion layer can be suppressed by the thin cover layer 6 as a whole, compared to when the cover layer 6 is made up of a single semiconductor layer. That is, by including a semiconductor layer with a large band gap in the cover layer 6, the influence of the surface depletion layer can be suppressed even if the thickness of the cover layer 6 is made thin. Furthermore, by covering the surface with the semiconductor layer 6d with a small surface state, the width of the surface depletion layer that is formed can be narrowed.

[0034] Furthermore, by setting the thickness of the cover layer 6 to be thin as a whole and the thickness of each of the laminated semiconductor layers to be thin, it is possible to reduce the contact resistance between the input electrodes 4a, 4b and the output electrodes 5a, 5b and the two-dimensional electron gas layer 2 even when the cover layer 6 includes a semiconductor layer with a large band gap. In this embodiment, there is no problem even if the semiconductor layer 6d with a small surface state density is provided. Examples of the present invention will be described in detail below. EXAMPLES

[0035] Next, an embodiment of the present invention will be described in detail by taking as an example a heterojunction Hall element having a structure shown in FIGS.

[0036] The substrate 1 is a semi-insulating GaAs substrate, and an undoped InGaAs layer is laminated as the electron transit layer 7, and an n-type AlGaAs layer is laminated as the electron supply layer 6a on the undoped InGaAs layer via a buffer layer (not shown). As a result, a two-dimensional electron gas layer 2 is formed at the heterojunction interface. Here, a barrier layer made of a thin undoped AlGaAs layer may be formed between the undoped InGaAs layer and the n-type AlGaAs layer. In this case, the two-dimensional electron gas layer 2 is formed at the interface between the electron transit layer 7 and the barrier layer (not shown).

[0037] An undoped AlGaAs layer is laminated as the band gap relaxation layer 6b on the n-type AlGaAs layer that will become the electron supply layer 6a. Furthermore, an undoped GaAs layer is laminated as the surface layer 6c on the undoped AlGaAs layer. Usually, the aluminum composition ratio of the undoped AlGaAs layer is 0.5, and the aluminum composition ratio of the undoped GaAs layer is zero. Therefore, the Al composition ratio of the undoped AlGaAs layer that will become the band gap relaxation layer 6b is made to have a composition that slopes from 0.5 toward the surface side (the undoped GaAs layer side) to zero. This change in the aluminum composition ratio results in a change in the band gap, and therefore the band gap difference can be alleviated.

[0038] On the non-doped GaAs layer that becomes the surface layer 6c, an n-type InGaP layer is laminated as a semiconductor layer 6d with a low surface state. This InGaP layer is known as a semiconductor layer with a low surface state, and it is possible to suppress the formation of a surface depletion layer. It can also be used as an etching stopper when selectively etching the contact layer 8 (n-type GaAs layer) described later.

[0039] The input electrodes 4a, 4b and the output electrodes 5a, 5b are formed so as to be in ohmic contact with the n-type GaAs layer that serves as the contact layer 8. An ohmic electrode formed on the n-type GaAs layer is preferable because it has a low contact resistance. The contact resistance between the input electrodes 4a, 4b and the two-dimensional electron gas 2 and the contact resistance between the output electrodes 5a, 5b and the two-dimensional electron gas 2 can also be reduced by using a laminated structure of thin semiconductor layers as described above.

[0040] Furthermore, if a surface depletion layer is formed in the cover layer 6, the effect on the two-dimensional electron gas layer 2 can be mitigated by providing the semiconductor layer constituting the cover layer 6 with a semiconductor layer having a large band gap, in this embodiment, a non-doped AlGaAs layer that serves as a band gap relaxation layer.

[0041] The thickness and impurity concentration of the above-mentioned semiconductor layers may be appropriately set depending on the characteristics required for the heterojunction Hall element.

[0042] Although the embodiments of the present invention have been described above, the present invention is not limited to the above embodiments, and the stacked structure of the semiconductor layers is not limited to the above embodiments, but may be appropriately selected. [Explanation of symbols]

[0043] 1: substrate, 2: two-dimensional electron gas layer, 3: insulating region, 4a, 4b: input electrodes, 5a, 5b: output electrodes, 6: cover layer, 6a: electron supply layer, 6b: band gap relaxation layer, 6c: surface layer, 6d: semiconductor layer with few surface states, 7: electron transit layer, 8: contact layer, 10,10A: Heterojunction Hall element

Claims

1. A heterojunction Hall element having a two-dimensional electron gas layer formed at the interface of stacked semiconductor layers with different bandgaps as an active layer, A cover layer is provided on the active layer, the cover layer being formed by stacking semiconductor layers having different bandgaps. the cover layer has a thickness such that a surface depletion layer does not reach the two-dimensional electron gas layer, and includes a third semiconductor layer between a first semiconductor layer stacked on the surface side and a second semiconductor layer stacked on the two-dimensional electron gas layer side and having a band gap different from the band gap of the first semiconductor layer, which reduces the difference in band gap between the first semiconductor layer and the second semiconductor layer; the active layer is a two-dimensional electron gas layer formed by a heterojunction between an undoped InGaAs layer and an n-type AlGaAs layer; the cover layer includes the n-type AlGaAs layer which is to become the second semiconductor layer, an undoped AlGaAs layer which is to become the third semiconductor layer laminated on the n-type AlGaAs layer, and an undoped GaAs layer which is to become the first semiconductor layer laminated on the undoped AlGaAs layer, the non-doped AlGaAs layer serving as the third semiconductor layer has an Al composition ratio set smaller toward a junction surface side with the non-doped GaAs layer to mitigate a band gap difference; A heterojunction Hall element comprising an input electrode and an output electrode which are in ohmic contact with the two-dimensional electron gas layer via the cover layer.

2. 2. The heterojunction Hall element according to claim 1, the cover layer comprises an n-type InGaP layer laminated on the non-doped GaAs layer, a heterojunction Hall element, the n-type InGaP layer being in ohmic contact with the two-dimensional electron gas layer;

3. 3. The heterojunction Hall element according to claim 1, A heterojunction Hall element, wherein the input electrode and the output electrode are in ohmic contact with the two-dimensional electron gas layer via an n-type GaAs layer laminated on the cover layer.

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