Microprocessor and method for debugging the same
By storing trace information in the internal SRAM of the CPU core after the operating system starts, the microprocessor effectively utilizes the built-in SRAM and eliminates the need for dedicated tracing memory, addressing the underutilization and cost concerns.
JP7649910B1Active Publication Date: 2025-03-21HITACHI INDUSTRY & CONTROL SOLUTIONS LTD
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Patent Information
- Application Number
- JP2024134284
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2024-08-09
- Publication Date
- 2025-03-21
- Estimated Expiration
- 2044-08-09
AI Technical Summary
Technical Problem
The built-in SRAM of the CPU core based on RISC-V is underutilized after the operating system starts, and there is a need to reduce the cost of memory dedicated to the trace function.
Method used
A microprocessor that includes an internal memory and external memory for instruction codes, with a processing unit that has a trace unit for debugging. After the operating system starts, the trace information of the instruction code is stored in the internal memory using the trace unit.
Benefits of technology
This solution effectively utilizes the built-in SRAM of the CPU core by storing trace information after the operating system starts, eliminating the need for dedicated memory for tracing and reducing costs.
✦ Generated by Eureka AI based on patent content.
Abstract
Makes effective use of the CPU core's built-in SRAM. A microprocessor 1 includes an internal memory 17 and a DDR-SDRAM 2 in which instruction codes are stored, and a processing unit 10 that processes the instruction codes. The processing unit 10 includes a trace unit 16 for debugging the instruction codes. After the operating system is started, the processing unit 10 uses the trace unit 16 to store trace information 161 of the instruction codes in the internal memory 17.
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