Pachinko machine

Abstract

To provide a game machine capable of increasing a player's interest in a game.SOLUTION: On the basis of the satisfaction of a predetermined setting condition, one of multiple controls including at least a first control and a second control which makes it easier for game balls to enter ball entry means than the first control is set by control setting means. On the basis of the satisfaction of a predetermined specific condition in a state where the second control is set, the second control is switched to the first control by switching means. In a predetermined game state set in the second control, the degree of advantage is likely to be higher when a game is played by a first game method than playing a game by a second game method different from the first game method. Thereby, a player's interest in a game can be increased.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a gaming machine, typified by a pachinko machine. [Background technology]

[0002] Some games such as pachinko machines perform a winning game that is advantageous to the player if the result of a lottery conducted based on the winning of a game ball at the starting prize entry port is won. Some of these gaming machines aim to improve the player's interest in the game by setting a game state that is highly advantageous to the player after the winning game is completed. [Prior Art Documents] [Patent Document]

[0003] [Patent Document 1] Publication No. 2001-038007 Summary of the invention [Problems to be solved by the invention]

[0004] However, there was a need for further improvement in the interest.

[0005] The present invention has been made to solve the problems shown above, and an object of the present invention is to provide a gaming machine that can improve the interest of players in playing. Means for solving the problem

[0006] To achieve this objective, the gaming machine according to claim 1 includes a control setting means that allows a ball to be entered, a first control based on the establishment of a predetermined setting condition, and a control setting means that sets one of a plurality of controls, including at least one of a plurality of controls, which includes at least a certain number of controls, which makes it easier for the ball to be entered into the ball to be entered into the ball to be entered than the first control, and a switching means that can switch from the second control to the first control based on the establishment condition of the second control being set in a state in which the second control is set. In a given game state set in the second control, it is easier for the game to be played using the first game method than the second game method to be played using the second game method that is different from the first game method.

[0007] The gaming machine according to claim 2 is configured in the first game state in which the second control is set, and the period until the specific conditions are satisfied is more likely to be longer when the second game method is performed, rather than when the first game method is performed.

[0008] The gaming machine according to claim 3 is provided with a game state setting means for setting one of the game states out of a plurality of games, including at least the first game state and a game state in which the second control is set at least and a second game state different from the first game state, based on the establishment of the first setting condition. The first game state is more likely to have a higher advantage when playing in the first game method than when playing in the second game method, and the second game state is more likely to have a higher advantage when playing in the second game method than when playing in the first game method.

[0009] The gaming machine according to claim 4 can form a state with a lower advantage than the first game state based on the fact that the specific condition is met in the first game state, and can form a state with a higher advantage than the second game state based on the fact that the specific condition is met in the second game state.

[0010] The gaming machine according to claim 5 is provided in the gaming machine according to claim 1, wherein the gaming machine according to claim 4, is equipped with a launching means that can fire a game ball in one of a plurality of directions including at least a first direction and a second direction different from the first direction, and the ball entering means is provided at a position where the game ball fired in the first direction is difficult to enter, and the game ball fired in the second direction can enter, and the first game method is a game method in which the game ball fired in the first direction is possible, and the second game method is a game method in which the game ball fired in the second direction. [Effects of the invention]

[0011] According to the gaming machine according to claim 1, the game machine includes a control setting means for setting one of a plurality of controls including at least one of a plurality of controls, including a ball in which a game ball can enter, a first control based on the establishment of a given setting condition, and a control setting means for setting one of the controls of at least one of the plural controls that make it easier for the game ball to enter the ball in the input means than the first control, and a switching means for switching from the second control to the first control based on the establishment of a predetermined specific condition in the state in which the second control is set, and the game is more likely to be advantageous when the game is performed using the first game method in a given game state set in the second control than when the game is performed using a second game method that is different from the first game method.

[0012] This has the effect of improving the player's interest in playing.

[0013] According to the gaming machine according to claim 2, in addition to the effects produced by the gaming machine according to claim 1, in the first game state where the second control is set, the period until the specific conditions are satisfied is more likely to be longer when the second game method is performed than when the first game method is performed.

[0014] This allows for a longer period of time when the second control, which is easy for the game ball to enter the ball, in the first game state, can be performed in the second game mode, by performing the game using the second game method, to continue the second control for a long time, and has the effect of achieving a novel gaming ability that allows the player to choose whether to perform the game using the second game method, or to play the game using the first game method, which has a higher advantage in the given game state.

[0015] According to the gaming machine according to claim 3, in addition to the effects produced by the gaming machine according to claim 2, the game state setting means is provided for setting one of the game states out of a plurality of games, including at least the first set condition, which includes at least the first game state and the second game state in which the second control is set and the second game state different from the first game state, and the first game state is more likely to have a higher advantage when playing in the first game method than when playing in the second game method. The second game state is more likely to have a higher advantage when playing in the second game method than when playing in the first game method.

[0016] This allows the game method in which the advantage is increased depending on whether the second control is in the first or second game state, even if it is in the game state, it is possible to differentiate the game method in which the advantage is increased, so when the second control is set, it is possible to realize a novel gameplay ability in which the game method is selected by determining whether it is in the first or second game state.

[0017] According to the gaming machine according to claim 4, in addition to the effects produced by the gaming machine according to claim 3, it is possible to form a state with a lower advantage than the first game state based on the fact that the specific condition is met in the first game state, and a state with a higher advantage than the second game state based on the fact that the specific condition is met in the second game state.

[0018] This allows the player to expect that the specific conditions will not be met in the first game state, while the player can realize a novel gameplay that will allow the player to expect that the specific conditions will be met in the second game state, which has the effect of further improving the player's interest in the game.

[0019] According to the gaming machine according to claim 5, in addition to the effects produced by the gaming machine according to claim 1 to 4, there is provided a launching means capable of firing a game ball in one of a plurality of directions including at least a first direction and a second direction different from the first direction, and the ball entry means is provided at a position where the game ball fired in the first direction is difficult to enter, and the game ball fired in the second direction can enter, and the first game method is a game method in which the game ball fired in the first direction is possible, and the second game method is a game method in which the game ball fired in the second direction is possible.

[0020] This allows the player to easily select whether to play in the first or second game method by adjusting the launch direction of the game ball, which has the effect of improving the convenience of the player. [Brief description of the drawing]

[0021] [Figure 1] 1 is a front view of a pachinko machine according to the first embodiment. [Figure 2] 1 is a front view of a pachinko machine game board. [Figure 3] 1 is a rear view of a pachinko machine. [Figure 4] 1 is a block diagram showing the electrical configuration of a pachinko machine. [Figure 5] 1 is a front perspective view of the variable winning device and the allocation device. [Figure 6] 6A and 6B are front perspective views of the variable winning device. [Figure 7] 1 is a front perspective view of the game board. [Figure 8] 1 is a perspective view of the rear of the game board. [Figure 9] ベース板、可変入賞装置、集合樋及び振分装置の分解正面斜視図である。 [Figure 10] ベース板、可変入賞装置、集合樋及び振分装置の分解背面斜視図である。 [Figure 11] 可変入賞装置の分解正面斜視図である。 [Figure 12] 可変入賞装置の分解背面斜視図である。 [Figure 13] 1 is an exploded front perspective view of the distribution device. FIG. [Figure 14] 1 is an exploded front perspective view of the distribution device. FIG. [Figure 15] 受入部材及び振分装置の正面図である。 [Figure 16] 図15のXVI-XVI線における可変入賞装置及び振分装置の断面図である。 [Figure 17] 図15のXVII-XVII線における可変入賞装置及び振分装置の断面図である。 [Figure 18] 図15のXVIII-XVIII線における可変入賞装置及び振分装置の断面図である。 [Figure 19] 図15のXVII-XVII線における可変入賞装置及び振分装置の断面図である。 [Figure 20] 図15のXVIII-XVIII線における可変入賞装置及び振分装置の断面図である。 [Figure 21] 1 is a front view of the variable winning device and the allocation device. [Figure 22] 図16の矢印XXII方向視における可変入賞装置及び振分装置の斜視図である。 [Figure 23] 16 is a perspective view of the variable winning device and the allocation device in the direction of arrow XXIII in FIG. 16; [Figure 24] 1. (a) is a block diagram showing the electrical configuration of the ROM within the main control device, (b) is a schematic diagram showing the correspondence relationship between the first win type counter and the jackpot type in the special pattern, and (c) is a schematic diagram showing the correspondence relationship between the second hit random number counter and the win type in the ordinary pattern. [Figure 25] 14 is a diagram showing time-keeping changes in the operation patterns of the opening and closing plates of the variable winning device in the first round for each jackpot type, and the operation patterns of the slide displacement members of the distribution device. [Figure 26] 1 is a front perspective view of the operating unit. FIG. [Figure 27] 1 is a rear perspective view of the operating unit; FIG. [Figure 28] 動作ユニットの動作の一例を示す動作ユニットの正面図である。 [Figure 29] 動作ユニットの動作の一例を示す動作ユニットの正面図である。 [Figure 30] 動作ユニットの動作の一例を示す動作ユニットの正面図である。 [Figure 31] 動作ユニットの動作の一例を示す動作ユニットの正面図である。 [Figure 32] 動作ユニットの動作の一例を示す動作ユニットの正面図である。 [Figure 33] 動作ユニットの動作の一例を示す動作ユニットの正面図である。 [Figure 34] 動作ユニットの動作の一例を示す動作ユニットの正面図である。 [Figure 35] 動作ユニットの動作の一例を示す動作ユニットの正面図である。 [Figure 36] 1 is a front perspective view of the first operating unit. FIG. [Figure 37] 1 is a rear perspective view of the first operating unit. FIG. [Figure 38] 1 is an exploded front perspective view of the first operating unit. FIG. [Figure 39] 1 is an exploded rear perspective view of the first operating unit. FIG. [Figure 40] 1 is a front view of the first operating unit in a performance standby state. [Figure 41] 演出待機状態における第1動作ユニットの背面図である。 [Figure 42] 41 is a side view of the first operating unit in the direction of arrow XLII in FIG. 40; FIG. [Figure 43] 1 is a front view of the first operating unit in an intermediate performance state. [Figure 44] 1 is a rear view of the first operating unit in an intermediate performance state. [Figure 45] 1 is a front view of the first operating unit in a protruding state. [Figure 46] 1 is a rear view of the first operating unit in a protruding state. [Figure 47] 1 is a schematic diagram schematically showing the amount of displacement and the displacement angle of the supported member associated with the rotational displacement of the rotating member. [Figure 48] 10A and 10B are schematic diagrams showing the magnitude of the amount of displacement on the driven side of the supported member when the rotating member rotates in the tilt direction in a manner that is constant angular velocity. [Figure 49] 1 is a schematic diagram showing changes in angles associated with rotation of the rotating member. [Figure 50] 1 is an exploded front perspective view of the rear case and the second operating unit. FIG. [Figure 51] 1 is an exploded rear perspective view of the rear case and the second operating unit. FIG. [Figure 52] 28 (a) is a cross-sectional view of the second operating unit and the center frame along line LIIa-LIIa in FIG. 28, and (b) is a cross-sectional view of the second operating unit and the center frame along line LIIb-LIIb in FIG. 28. [Figure 53] 33 (a) is a cross-sectional view of the second operating unit and the center frame along line LIIIa-LIIIa in FIG. 33, and (b) is a cross-sectional view of the second operating unit and the center frame along line LIIIb-LIIIb in FIG. 33. [Figure 54] 30 (a) is a cross-sectional view of the second operating unit and the center frame along the line LIVa-LIVa in FIG. 30, and (b) is a cross-sectional view of the second operating unit and the center frame along the line LIVb-LIVb in FIG. 30. [Figure 55] 1 is an exploded front perspective view of the lifting and lowering inversion effect device. [Figure 56] 1 is an exploded rear perspective view of the lifting and lowering inversion effect device. FIG. [Figure 57] 6A and 6B are front views of the transmission device holding plate, the up and downward inverting member, the intermediate arm member, the linear moving plate member and the shaft rotating member. [Figure 58] 57(b) is a cross-sectional view of the transmission device holding plate, upward and downward inverting member, intermediate arm member, linear moving plate member and shaft rotary member on line LVIIIa-LVIIIa of FIG. 57(a), and (b) is a cross-sectional view of the transmission device holding plate, upward and downward inverting member, intermediate arm member, linear moving plate member and shaft rotary member on line LVIIIb-LVIIIb of FIG. 57(b). [Figure 59] 6A to 6C are front views of the performance device. [Figure 60] 1 is an exploded front perspective view of a part of the configuration of the third operating unit; FIG. [Figure 61] 1 is an exploded rear perspective view of a part of the configuration of the third operating unit; FIG. [Figure 62] 1 is an exploded front perspective view of a part of the configuration of the third operating unit; FIG. [Figure 63] 1 is an exploded rear perspective view of a part of the configuration of the third operating unit; FIG. [Figure 64] 6A and 6B are rear views of the outer rotating member and the intermediate arm member. [Figure 65] 6A and 6B are rear views of the outer rotating member and the intermediate arm member. [Figure 66] 6A and 6B are front views of the outer rotating member and the intermediate arm member. [Figure 67] 6A and 6B are front views of the outer rotating member and the intermediate arm member. [Figure 68] 14 is a timing chart showing examples of arrangement of the lifting arm members, driving mode of the driving motor, and output of the detection sensor in chronological order. [Figure 69] 3 is a cross-sectional view of the third operating unit on the LXIX-LXIX ray of FIG. 28. FIG. [Figure 70] 10A to 10B are front and rear diagrams of the operation units that schematically explain examples of combined operations of each operation unit in a chronological order. [Figure 71] 10A to 10B are front and rear diagrams of the operation units that schematically explain examples of combined operations of each operation unit in a chronological order. [Figure 72] 1 is a front perspective view of the distribution device. FIG. [Figure 73] 1 is a front view of the variable winning device and the allocation device. [Figure 74] 16 is a perspective view of the variable winning device and the allocation device in the direction of arrow XXIII in FIG. 16; [Figure 75] 74 is a cross-sectional view of the variable winning device and the allocation device on the LXXV-LXXV line of FIG. 73. FIG. [Figure 76] 図75のLXXVI-LXXVI線における振分装置の中部材、スライド変位部材、下部材及び検出センサの断面図である。 [Figure 77] 10A to 10B are front perspective views of the middle members of the distribution device. [Figure 78] 1 is a top view of the middle member, the state switching device, the slide displacement member and the lower member. [Figure 79]78 (a) is a cross-sectional view of the middle member, slide displacement member and lower member on line LXXIXa-LXXIXa in FIG. 78; (b) is a cross-sectional view of the middle member, slide displacement member and lower member on line LXXIXb-LXXIXb in FIG. 78; and (c) is a cross-sectional view of the middle member, slide displacement member and lower member on line LXXIXc-LXXIXc in FIG. 78. [Figure 80] 10A and 10B are side views of the slide displacement member and the ball that rests on the upper side of the ball guide. [Figure 81] 81(a) is a front view of the pivoting member, 81(b) is a rear view of the pivoting member, and 81(c) is a side view of the pivoting member in the direction of the arrow LXXXIc in FIG. 81(a). [Figure 82] 1 is a front view of the first operating unit. FIG. [Figure 83] 1 is a rear view of the first operating unit. FIG. [Figure 84] 1 is a front view of the first operating unit. FIG. [Figure 85] 1 is a rear view of the first operating unit. FIG. [Figure 86] 6A and 6B are rear views of the guide hole, the dish-shaped lid, the detection sensor and the extension portion of the transmission gear cam. [Figure 87] 6A and 6B are rear views of the guide hole, the dish-shaped lid, the detection sensor and the extension portion of the transmission gear cam. [Figure 88] 1 is a rear view of the guide hole, the dish-shaped lid, the detection sensor and the extension portion of the transmission gear cam. [Figure 89] 1 is a front perspective view of the first decorative rotating member and the second decorative rotating member. [Figure 90] 6A and 6B are schematic front views showing the guide hole, the rectangular box portion and the overhanging decoration portion. [Figure 91] 6A and 6B are schematic front views showing the guide hole, the rectangular box portion and the overhanging decoration portion. [Figure 92] 1 is a schematic front view schematically showing a guide hole, a rectangular box portion and an overhang decoration portion. [Figure 93] 86 is a cross-sectional view of the first operating unit along line XCIII-XCIII of FIG. 85. FIG. [Figure 94] 1 is a front view of the second operating unit in a protruding state. [Figure 95] 95 is a cross-sectional view of the second operating unit along the XCV-XCV line of FIG. 94; [Figure 96] 1 is a front view of the transmission device holding plate, the upper and lower inverted member, the intermediate arm member, the linear moving plate member and the shaft rotating member. [Figure 97] 1 is a front view of the transmission device holding plate, the upper and lower inverted member, the intermediate arm member, the linear moving plate member and the shaft rotating member. [Figure 98] 1 is a front perspective view of the lifting and lowering inversion effect device. [Figure 99] 1A is a front perspective view of the intermediate arm member, and 1B is a rear perspective view of the intermediate arm member. [Figure 100] 1 is a schematic diagram of a third operating unit, which schematically shows the displacement between the metal rod and the intermediate arm member. [Figure 101] 1 is a front schematic view of the third operating unit. [Figure 102] 1 is a front view of the outer rotating member and the intermediate arm member. [Figure 103] 1A and 1B are rear views of the outer rotating member and the intermediate arm member, and 1B are front views of the outer rotating member and the intermediate arm member. [Figure 104] 1 is a front view of the third operating unit. FIG. [Figure 105] 1 is a front view of the third operating unit. FIG. [Figure 106] 105 is a cross-sectional view of the third operating unit along the CVI-CVI line of FIG. 105. FIG. [Figure 107] 104 is a cross-sectional view of the third operating unit along line CVII-CVII of FIG. 104; [Figure 108] 15 is a cross-sectional view of the allocation device according to the second embodiment, in the line corresponding to the line XVI-XVI in FIG. 15. FIG. [Figure 109] 15 (a) and (b) are cross-sectional views of the allocation device according to the third embodiment, in the line corresponding to lines XVII-XVII in FIG. 15. [Figure 110] 10A and 10B are schematic top views of the third flow path configuration section, the special mode detection sensor, the normal detection sensor, and the slide displacement member, which are schematically showing the downstream side of the third flow path configuration section in the fourth embodiment. [Figure 111] 110(b) is a schematic cross-sectional view of the third flow path configuration part, the special mode detection sensor, the normal detection sensor and the slide displacement member on the CXIa-CXIa line of FIG. 110(b); FIG. 110(b) is a schematic cross-sectional view of the third flow path configuration part, the special mode detection sensor, the normal detection sensor and the slide displacement member on the CXIb-CXIb line of FIG. 110(b). [Figure 112] 15A and 15B are partial cross-sectional views of the allocation device according to the fifth embodiment, in the line corresponding to lines XVII-XVII in FIG. 15. [Figure 113] 15 is a cross-sectional view of the allocation device according to the sixth embodiment, in the line corresponding to the lines XVII-XVII in FIG. 15. FIG. [Figure 114] 1 is a front perspective view of the allocation device according to the seventh embodiment. [Figure 115] 114 is a cross-sectional view of the allocation device along the CXV-CXV line of FIG. 114. [Figure 116] 1 is a schematic front view schematically showing the relationship between the guide hole and the rotary member in the eighth embodiment. [Figure 117] 1 is a schematic front view schematically showing the relationship between the guide hole and the rotary member in the ninth embodiment. [Figure 118] 1 is a front view of a pachinko machine in the first control example. [Figure 119] 1 is a front view of the gaming board of the pachinko machine in the first control example. [Figure 120] 10A is a schematic diagram showing a structure of a variable winning unit provided in the area under the front view of the game board of a pachinko machine in the first control example, and (b) is a schematic diagram showing a flow path of a ball that has been won in the variable winning unit in the first control example. [Figure 121] 1 is a rear view of a pachinko machine in the first control example. [Figure 122] 10A is a diagram schematically showing area division settings and effective line settings of the display screen in the first control example, and (b) is a diagram illustrating an example of an actual display screen in the first control example. [Figure 123] 10A is a diagram showing an example of a display mode when the reach is established in the normal state displayed on the third pattern display device in the first control example, and (b) shows an example of a display mode during which normal pattern changes are executed in the normal state displayed on the third pattern display device in the first control example. [Figure 124] 10A is a diagram showing an example of a display mode in which a game of a popular game (a game of a game of long open) is performed during the normal state displayed on the third pattern display device in the first control example, and (b) shows an example of a display mode in which a chance zone is set during the normal state displayed on the third pattern display device in the first control example. [Figure 125] 10.

[0021] FIG. 10 (a) is a diagram showing an example of a display mode in which the third pattern is temporarily stopped during the special change effect displayed on the third pattern display device in the first control example, and (b) is a diagram showing an example of a display mode in which the third pattern is restarted in the special change effect executed when the special change effect displayed on the third pattern display device in the first control example is acquired while the special change effect displayed on the third pattern display device is acquired. [Figure 126] 10 is a diagram showing an example of a display mode when the third pattern is restarted in a special variation effect executed when the special chart 2 pending ball displayed on the third pattern display device in the first control example is not acquired. [Figure 127] 1. (a) is a diagram showing an example of the display mode for the first half period of the ending period of a regular jackpot game displayed on the third pattern display device in the first control example, and (b) is a diagram showing an example of the display mode for the first half period of the ending period of a special jackpot game displayed on the third pattern display device in the first control example, and (c) is a diagram showing an example of the display mode for the second half period of the ending period of a regular jackpot game displayed on the third pattern display device in the first control example, and (d) is a diagram showing an example of the display mode for the second half period of the ending period of a special jackpot game displayed on the third pattern display device in the first control example. [Figure 128] 6A and 6B are diagrams showing an example of a display mode of a game state suggestion performance executed during the chance mode displayed on the third pattern display device in the first control example. [Figure 129] 10.sub.1 (a) is a diagram showing an example of a display mode in which the chance mode is set as the performance mode displayed on the third pattern display device in the first control example, and the normal state is set internally, and the display mode is displayed during a period other than the high-speed fluctuation period (during the normal fluctuation period), and (b) is a diagram showing an example of a display mode in which the chance mode is set as the performance mode displayed on the third pattern display device in the first control example, and the normal state is set internally, and the frame button is operated during a period other than the high-speed fluctuation period (during the normal fluctuation period). [Figure 130] 10A and 10B are diagrams showing an example of the display modes of operational performance during the high-speed fluctuation period among the chance modes displayed on the third pattern display device in the first control example, and (b) shows an example of the display modes when a frame button is operated during the high-speed fluctuation period among the chance modes displayed on the third pattern display device in the first control example. [Figure 131]10. (a) is a diagram showing an example of a display mode in which the first special pattern change is performed during the "Super Chance Mode" displayed on the third pattern display device in the first control example, and (b) is a diagram showing an example of a display mode in which the second special pattern change is performed during the "Super Chance Mode" displayed on the third pattern display device in the first control example. [Figure 132] 10 is a timing chart showing the flow of the performance when a fluctuation pattern in which a non-reach variation effect is set as a variation effect for the third pattern in the first control example, and (b) shows the flow of the performance when a fluctuation pattern in which a reach variation effect is set as a variation effect for the third pattern in the first control example. [Figure 133] (a) is a timing chart showing the flow of the performance during the ending period for a normal jackpot in the first control example, (b) is a timing chart showing the flow of the performance during the ending period for a special jackpot in the first control example, and (c) is a timing chart showing the flow of the performance during the ending period for a special jackpot in the first control example, and (c) is a timing chart showing the flow of the performance when the ball does not flow down the specific area (V gate) during the special jackpot game in the first control example. [Figure 134] (a) and (b) are timing charts showing the flow of the performance mode set after the jackpot game is completed in the first control example. [Figure 135] 6A and 6B are timing charts showing the flow of the operational performance in the chance mode in the first control example. [Figure 136] 14 is a diagram showing a game flow of a pachinko machine in the first control example. [Figure 137] 1 is a block diagram showing the electrical configuration of a pachinko machine in the first control example. [Figure 138] 1 is a diagram schematically showing the structure of various counters in the first control example. [Figure 139] 10 is a block diagram showing the configuration of the ROM of the main control device in the first control example, and (b) shows the configuration of the RAM of the main control device in the first control example. [Figure 140] 1A and 1B are diagrams schematically showing the specified contents of the first random number table set in the ROM of the main control device in the first control example, and (b) schematically shows the specified contents of the second random number table set in the ROM of the main control device in the first control example. [Figure 141] 1. (a) is a block diagram showing the configuration of the jackpot type selection table set in the ROM of the main control device in the first control example, and (b) is a diagram schematically showing the specified contents of the special chart 1 jackpot table set in the ROM of the main control device in the first control example, and (c) is a diagram schematically showing the specified contents of the special chart 2 jackpot table set in the ROM of the main control device in the first control example. [Figure 142] 10 is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the first control example, and (b) is a diagram schematically showing the specified contents of the normal table set in the ROM of the main control device in the first control example. [Figure 143] 14 is a diagram schematically showing the specified contents of the special-mode and time-saving table set in the ROM of the main control device in the first control example. [Figure 144] 10 is a block diagram showing the configuration of the ROM of the audio lamp control device in the first control example, and (b) shows the configuration of the RAM of the audio lamp control device in the first control example. [Figure 145] 10 is a diagram schematically showing the specified contents of the normal special diagram 2 performance selection table set in the ROM of the audio lamp control device in the first control example. [Figure 146] 14 is a diagram schematically showing the specified contents of the special-speed performance selection table set in the ROM of the audio lamp control device in the first control example. [Figure 147] 10A is a diagram schematically showing the specified contents of the continuous preview execution selection table set in the ROM of the audio lamp control device in the first control example, and (b) is a diagram schematically showing the specified contents of the V notification execution selection table set in the ROM of the audio lamp control device in the first control example. [Figure 148] 10 is a block diagram showing the configuration of a button operation performance selection table set in the ROM of the audio lamp control device in the first control example, and (b) is a diagram schematically showing the specified contents of the time-saving state selection table set in the ROM of the audio lamp control device in the first control example. [Figure 149] 14 is a diagram schematically showing the specified contents of the special mode state selection table set in the ROM of the audio lamp control device in the first control example. [Figure 150] 1 is a block diagram showing the electrical configuration of a display control device in the first control example. [Figure 151] 6A to 6C are explanatory diagrams for explaining images at the time of power-on in the first control example. [Figure 152] 10A is an explanatory diagram for explaining the back surface A in the first control example, and 10B is an explanatory diagram for explaining the back surfaces B to D in the first control example. [Figure 153] 1 is a diagram schematically showing an example of a display data table in the first control example. [Figure 154] 1 is a diagram schematically showing an example of a transfer data table in the first control example. [Figure 155] 14 is a diagram schematically showing an example of a drawing list in the first control example. [Figure 156] 10 is a flow chart showing timer interrupt processing executed by the MPU in the main control device in the first control example. [Figure 157] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the first control example. [Figure 158] 10 is a flow chart showing a special pattern jackpot determination process executed by the MPU within the main control device in the first control example. [Figure 159] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the first control example. [Figure 160] 10 is a flow chart showing update processing executed by the MPU in the main control device in the first control example. [Figure 161] 10 is a flow chart showing a start-up winning process executed by an MPU within the main control device in the first control example. [Figure 162] 10 is a flow chart showing a preliminary process executed by an MPU within the main control device in the first control example. [Figure 163] 10 is a flow chart showing normal pattern variation processing executed by the MPU within the main control device in the first control example. [Figure 164] 10 is a flow chart showing a process of passing through a through gate executed by an MPU within the main control device in the first control example. [Figure 165] 10 is a flow chart showing NMI interrupt processing executed by the MPU in the main control device in the first control example. [Figure 166] 10 is a flow chart showing the startup process executed by the MPU in the main control device in the first control example. [Figure 167] 10 is a flow chart showing main processing executed by the MPU within the main control device in the first control example. [Figure 168] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the first control example. [Figure 169] 10 is a flow chart showing a jackpot operation setting process executed by an MPU within the main control device in the first control example. [Figure 170] 10 is a flow chart showing the jackpot termination process executed by the MPU in the main control device in the first control example. [Figure 171] 10 is a flow chart showing the winning process executed by the MPU in the main control device in the first control example. [Figure 172] 10 is a flow chart showing abnormality processing executed by the MPU in the main control device in the first control example. [Figure 173] 10 is a flow chart showing the startup process executed by the MPU in the audio lamp control device in the first control example. [Figure 174] 10 is a flow chart showing the main processing executed by the MPU in the audio lamp control device in the first control example. [Figure 175] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the first control example. [Figure 176] 10 is a flow chart showing a state command reception process executed by the MPU in the audio lamp control device in the first control example. [Figure 177] 10 is a flow chart showing winning command processing executed by the MPU in the audio lamp control device in the first control example. [Figure 178] 10 is a flow chart showing a special chart winning information command process executed by the MPU in the audio lamp control device in the first control example. [Figure 179] 10 is a flow chart showing general-scale diagram-related processes executed by the MPU in the audio lamp control device in the first control example. [Figure 180] 10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the first control example. [Figure 181] 10 is a flow chart showing ending processes executed by the MPU in the audio lamp control device in the first control example. [Figure 182] 10 is a flow chart showing variation display setting processing executed by the MPU in the audio lamp control device in the first control example. [Figure 183] 10 is a flow chart showing a special diagram 1 performance mode setting process executed by the MPU in the audio lamp control device in the first control example. [Figure 184] 10 is a flow chart showing a special diagram 2 performance mode setting process executed by the MPU in the audio lamp control device in the first control example. [Figure 185] 10 is a flow chart showing the performance setting process in chance mode executed by the MPU in the audio lamp control device in the first control example. [Figure 186] 10 is a flow chart showing frame button input monitoring and performance processing executed by the MPU in the audio lamp control device in the first control example. [Figure 187] 10 is a flow chart showing the main processing executed by the MPU in the display control device in the first control example. [Figure 188] 10 is a flow chart showing a boot process executed by an MPU in the display control device in the first control example. [Figure 189] 10 is a flow chart showing the command interruption process executed by the MPU in the display control device in the first control example, and (b) shows the V interruption process executed by the MPU in the display control device in the first control example. [Figure 190] 10 is a flow chart showing command determination processing executed by the MPU in the display control device in the first control example. [Figure 191] 10 is a flow chart showing the variation pattern command processing executed by the MPU in the display control device in the first control example, and (b) shows the suspension type command processing executed by the MPU in the display control device in the first control example. [Figure 192] 10 is a flow chart showing the opening command processing executed by the MPU in the display control device in the first control example, and (b) shows the round number command processing executed by the MPU in the display control device in the first control example. [Figure 193] 10 is a flow chart showing ending command processing executed by the MPU in the display control device in the first control example. [Figure 194] 10 is a flow chart showing the fluctuation stop command processing executed by the MPU in the display control device in the first control example, and (b) shows the notification command processing executed by the MPU in the display control device in the first control example. [Figure 195] 10 is a flow chart showing the back image change command processing executed by the MPU in the display control device in the first control example, and (b) shows the error command processing executed by the MPU in the display control device in the first control example. [Figure 196] 10 is a flow chart showing display setting processing executed by the MPU in the display device in the first control example. [Figure 197] 10 is a flow chart showing warning image setting processing executed by the MPU in the display control device in the first control example. [Figure 198] 10 is a flow chart showing a pointer update process executed by the MPU in the display control device in the first control example. [Figure 199] 10 is a flow chart showing the transfer setting process executed by the MPU in the display control device in the first control example, and (b) shows the resident image transfer setting process executed by the MPU in the display control device in the first control example. [Figure 200] 10 is a flow chart showing normal image transfer setting processing executed by the MPU in the display control device in the first control example. [Figure 201] 10 is a flow chart showing drawing processes executed by the MPU in the display control device in the first control example. [Figure 202] 10A and 10B are diagrams showing the relationship between the display layer formed in the pachinko machine in the second control example and the display screen, and (b) and (c) show an example of a display performance that is executed when the display of the main pattern layer in the second control example is set to OFF and the display of the sub pattern layer is set to ON. [Figure 203] 1. (a) is a schematic diagram showing image data of the main sea pattern used when a sea image (sea background) is set in the second control example, (b) is a schematic diagram showing image data of the main mountain image used when a mountain image (shrine background) is set in the second control example, (c) is a diagram showing image data of the sub-symbol previously stored in the character storage area in the second control example, and (d) is a schematic diagram showing the contents of image data corresponding to various images used in the main fluctuating pattern in the second control example. [Figure 204] 10 is a timing chart schematically showing the flow of variable display of the third pattern (main pattern, sub pattern) in the second control example. [Figure 205] 1. (a) is a timing chart schematically showing the flow of the variation patterns used in the performance example in the second control example, (b) is a timing chart schematically showing the flow of the normal performance in the second control example, (c) is a timing chart schematically showing the flow of the reach line preview performance in the second control example, and (d) is a timing chart schematically showing the flow of the preview performance in which the direction of fluctuation of the sub-signal in the second control example is different from the usual. [Figure 206] 1 is a block diagram showing the electrical configuration of a display control device in the second control example. [Figure 207] 1 is a diagram schematically showing an example of a display data table in the second control example. [Figure 208] 14 is a diagram schematically showing an example of a drawing list in the second control example. [Figure 209] 10 is a flow chart showing variation pattern command processing 2 executed by the MPU in the display control device in the second control example. [Figure 210] 12 is a flow chart showing a rear image change command process 2 executed by the MPU in the display control device in the second control example. [Figure 211] 10.

[0011] FIG. 1 (a) is a schematic diagram showing the relationship between the display layer formed in the pachinko machine in a modified example of the second control example and the display screen; FIG. 1 (b) is a diagram showing an example of a display screen displayed during the triple reach performance in a modified example of the second control example, and FIG. 1 (c) is a diagram showing an example of a display screen when the triple reach performance is in the triple reach performance in a modified example of the second control example. [Figure 212] 1 is a front view of the gaming board of the pachinko machine in the third control example. [Figure 213] 10. 10 is a schematic diagram showing a structure near a specific prize opening of the variable prize winning device of the pachinko machine game board in the third control example, and (b) is a schematic diagram showing a flow path of a ball that has been won at the specific prize winning port in the third control example. [Figure 214] 1 is a schematic diagram schematically showing the flow path of a ball that has been awarded at the specific prize opening in the third control example. [Figure 215] 1 is a block diagram showing the configuration of the RAM of the main control device in the third control example. [Figure 216] 1 is a block diagram showing the configuration of the RAM of the audio lamp control device in the third control example. [Figure 217] 10 is a flow chart showing a jackpot control process 4 executed by an MPU within the main control device in the third control example. [Figure 218] 11 is a flow chart showing the winning process 4 executed by the MPU in the main control device in the third control example. [Figure 219] 10 is a flow chart showing V-round processing executed by the MPU in the main control device in the third control example. [Figure 220] 10 is a flow chart showing an update process during a jackpot executed by an MPU within the main control device in the third control example. [Figure 221] 10 is a flow chart showing jackpot related processing 4 executed by the MPU in the audio lamp control device in the third control example. [Figure 222] 11 is a flow chart showing the performance update process 4 executed by the MPU in the audio lamp control device in the third control example. [Figure 223] 1 is a block diagram showing the configuration of a ROM of the main control device in the fourth control example. [Figure 224] 10. (a) is a diagram schematically showing the specified contents of the special chart 2 jackpot 2 table set in the ROM of the main control device in the fourth control example, and (b) is a diagram schematically showing the specified contents of the fall draw table set in the ROM of the main control device in the fourth control example. [Figure 225] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the audio lamp control device in the fourth control example, and (b) is a block diagram showing the configuration of the RAM of the audio lamp control device in the fourth control example. [Figure 226]10 is a block diagram showing the configuration of the button operation performance selection 2 table set in the ROM of the audio lamp control device in the fourth control example, and (b) is a diagram schematically showing the specified contents of the special mode state selection 2 table set in the ROM of the audio lamp control device in the fourth control example. [Figure 227] 10 is a flow chart showing a special symbol jackpot determination process 5 executed by the MPU in the main control device in the fourth control example. [Figure 228] 11 is a flow chart showing a preliminary process 5 executed by the MPU in the main control device in the fourth control example. [Figure 229] 10 is a flow chart showing the jackpot termination process 5 executed by the MPU in the main control device in the fourth control example. [Figure 230] 11 is a flow chart showing command determination processing 5 executed by the MPU in the audio lamp control device in the fourth control example. [Figure 231] 10 is a flow chart showing fall-related processes executed by the MPU in the audio lamp control device in the fourth control example. [Figure 232] 14 is a diagram showing an example of a display performance in the second control example. [Figure 233] 14 is a diagram showing a modified example of a game board of a pachinko machine. [Figure 234] 1 is a front view of the gaming board of the pachinko machine in the fifth control example. [Figure 235] 10. 10 is a diagram showing an example of a display screen displayed during a jackpot game executed based on winning a jackpot in the special pattern lottery in the fifth control example, and (b) shows an example of a display screen displayed on the ending screen of a jackpot game in the fifth control example. [Figure 236] 10A and 10B are diagrams showing an example of a display screen displayed during the chance time in the fifth control example, and (b) shows an example of a display screen displayed during the chance time in the fifth control example. [Figure 237] 10A is a diagram showing an example of a display screen displayed when the pull-back zone in the fifth control example is started, and (b) shows an example of a display screen displayed when a time-saving winning is achieved during the pull-back zone in the fifth control example. [Figure 238] 10A and 10B are diagrams showing an example of a display screen during extended time, which is executed when the long time reduction in the fifth control example is set, and (b) shows an example of a display screen when the number of executions of special pattern variations executed during the long time reduction in the fifth control example reaches 9,900. [Figure 239] 10 is a diagram showing an example of a presentation screen for preparation time executed during the time-saving state after the end of the chance time in the fifth control example. [Figure 240] 10A and 10B are diagrams showing the relationship between the background type displayed in the pull-back zone in the fifth control example and the contents shown by each background; FIG. 10B are diagrams showing the relationship between the type of suggested mode in the pull-back mode in the fifth control example and the contents shown by each of the suggested mode. [Figure 241] 14 is a diagram showing a game flow in the fifth control example. [Figure 242] 1 is a block diagram showing the electrical configuration of a pachinko machine in the fifth control example. [Figure 243] 1 is a diagram schematically showing the structure of various counters in the fifth control example. [Figure 244] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the fifth control example, and FIG. 10 is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the fifth control example. [Figure 245] 1. (a) is a diagram schematically showing the specified contents of the first random number 5 table set in the ROM of the main control device in the fifth control example, and (b) is a diagram schematically showing the specified contents of the second random number 5 table set in the ROM of the main control device in the fifth control example, and (c) is a diagram schematically showing the specified contents of the time-saving random number 5 table set in the ROM of the main control device in the fifth control example. [Figure 246] 1. (a) is a block diagram showing the configuration of the 5 tables for selecting jackpots type set in the ROM of the main control device in the fifth control example, and (b) is a diagram schematically showing the specified contents of the 5 tables for special chart 1 jackpots in the fifth control example, and (c) is a diagram schematically showing the specified contents of the 5 tables for special chart 2 jackpots in the fifth control example. [Figure 247] 10A is a diagram schematically showing the specified contents of the variability pattern selection 5 table set in the ROM of the main control device in the fifth control example, and (b) is a diagram schematically showing the specified contents of the 5 tables for normal and second special change in the fifth control example. [Figure 248] 10. (a) is a diagram schematically showing the specified contents of the five tables for special-speed and time-saving special-controlled devices in the fifth control example, and (b) is a diagram schematically showing the specified contents of the five tables for selecting time-saving special-controlled devices set in the ROM of the main control device in the fifth control example. [Figure 249] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the fifth control example, and FIG. 10 is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the fifth control example. [Figure 250] 1 is a block diagram showing the configuration of a pull-back mode selection table set in the ROM of the audio lamp control device in the fifth control example. [Figure 251] 1 is a block diagram showing the structure of a suggestion mode selection table set in the ROM of the audio lamp control device in the fifth control example. [Figure 252] 10 is a flow chart showing special pattern variation processing 5 executed by the MPU in the main control device in the fifth control example. [Figure 253] 10 is a flow chart showing a special pattern determination process 5 executed by the MPU in the main control device in the fifth control example. [Figure 254] 10 is a flow chart showing a time-saving lottery process 5 executed by an MPU within the main control device in the fifth control example. [Figure 255] 11 is a flow chart showing a special pattern variation pattern selection process 5 executed by the MPU in the main control device in the fifth control example. [Figure 256] 10 is a flow chart showing an update process 5 executed by the MPU in the main control device in the fifth control example. [Figure 257] 10 is a flow chart showing a time-saving setting process 5 executed by the MPU in the main control device in the fifth control example. [Figure 258] 10 is a flow chart showing a start-up winning process 5 executed by an MPU in the main control device in the fifth control example. [Figure 259] 11 is a flow chart showing a preliminary process 5 executed by an MPU within the main control device in the fifth control example. [Figure 260] 10 is a flow chart showing a jackpot control process 5 executed by an MPU within the main control device in the fifth control example. [Figure 261] 10 is a flow chart showing the jackpot termination process 5 executed by the MPU in the main control device in the fifth control example. [Figure 262] 10 is a flow chart showing command determination processing 5 executed by the MPU in the audio lamp control device in the fifth control example. [Figure 263] 10 is a flow chart showing a state command reception process 5 executed by the MPU in the audio lamp control device in the fifth control example. [Figure 264] 10 is a flow chart showing a normal state performance setting process executed by the MPU in the audio lamp control device in the fifth control example. [Figure 265] 10 is a flow chart showing a pull-back mode setting process executed by the MPU in the audio lamp control device in the fifth control example. [Figure 266] 10 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the fifth control example. [Figure 267] 10 is a flow chart showing a second special mode state performance setting process executed by the MPU in the audio lamp control device in the fifth control example. [Figure 268] 10 is a flow chart showing the performance mode setting process 5 of Special Figure 1 executed by the MPU in the audio lamp control device in the fifth control example. [Figure 269] 10 is a flow chart showing the special diagram 2 performance mode setting process 5 executed by the MPU in the audio lamp control device in the fifth control example. [Figure 270] 10 is a flow chart showing the performance setting process during chance time executed by the MPU in the audio lamp control device in the fifth control example. [Figure 271] 10. 10 is a diagram showing an example of a variation display screen when the lottery result of the Special Drawing 1 lottery is won or a time-saving win in the normal state of the first modification of the fifth control example, and (b) shows an example of a display screen when the lottery result of the First Special Drawing (Special Drawing 1 lottery) is a time-saving win in the normal state of the first modification of the fifth control example (low probability state of special design, low probability state of ordinary design). [Figure 272] 10A and 10B are diagrams showing an example of a display screen in a time-saving state when the variation time of Special Figure 1 is set to 30 seconds in the normal state in the first modification of the fifth control example, and (b) shows an example of a display screen in the case where the time-saving state in the first modification of the fifth control example is finished. [Figure 273]10 is a diagram showing an example of a display screen when a time-saving winning is made while being held for Special Figure 2 in the first modification of the fifth control example. [Figure 274] 1A and 1B are diagrams schematically showing the specified contents of the time-saving random number 5a table set in the ROM of the main control device in the first modification of the fifth control example, and (b) is diagrams schematically showing the specified contents of the time-saving type selection 5a table set in the ROM of the main control device in the first modification of the fifth control example. [Figure 275] 10 is a flow chart showing a time-saving lottery process 5a executed by an MPU within the main control device in the first modification of the fifth control example. [Figure 276] 10 is a flow chart showing a time-saving state performance setting process 5a executed by the MPU in the audio lamp control device in the first modification of the fifth control example. [Figure 277] 10 is a flow chart showing the special diagram 1 performance mode setting process 5a executed by the MPU in the audio lamp control device in the first modification of the fifth control example. [Figure 278] 10.

[0041] FIG. 10A is a diagram showing an example of a display screen during the opportunity time acquisition performance that is executed when a jackpot is won in the special drawing 1 lottery in the normal state in the second modification of the fifth control example, and (b) is a diagram showing an example of a display screen during the opportunity time acquisition performance that is executed when a time acquisition performance that is given in the special drawing 1 lottery in the normal state in the second modification of the fifth control example. [Figure 279] 10 is a diagram showing an example of a fluctuation pattern when a jackpot is won and a time-saving winning pattern in the second modification of the fifth control example. [Figure 280] 10A (a) is a diagram schematically showing the specified contents of the time-saving random number 5b table set in the ROM of the main control device in the second modification of the fifth control example, and (b) is a diagram schematically showing the specified contents of the jackpot 5b table in the second modification of the fifth control example. [Figure 281] 14 is a diagram schematically showing the specified contents of the time-saving type selection 5b table set in the ROM of the main control device in the second modification of the fifth control example. [Figure 282] 10 is a flow chart showing a time-saving state performance setting process 5b executed by the MPU in the audio lamp control device in the second modification of the fifth control example. [Figure 283] 10A is a diagram showing an example of a display screen when time-saving A is set in the sixth control example, and (b) shows an example of a display screen when time-saving B is set in the sixth control example. [Figure 284] 10A is a diagram showing an example of a display screen in which a time-saving winning is made during the time-saving state in the sixth control example and the number of remaining time-saving remaining time increases; FIG. 10B is a diagram showing an example of a display screen in which a time-saving winning is made during the time-saving state in the sixth control example and the number of remaining time-saving remaining time decreases. [Figure 285] 14 is a diagram showing a game flow in the sixth control example. [Figure 286] 10A is a diagram schematically showing the specified contents of the time-saving random number 6 table set in the ROM of the main control device in the sixth control example, and (b) is a diagram schematically showing the specified contents of the time-saving type selection table set in the ROM of the main control device in the sixth control example. [Figure 287] 10 is a diagram schematically showing the prescribed contents of the six tables for jackpots set in the ROM of the main control device in the sixth control example. [Figure 288] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the sixth control example. [Figure 289] 10 is a flow chart showing a time-saving lottery process 6 executed by an MPU within the main control device in the sixth control example. [Figure 290] 10 is a flow chart showing a time-saving state performance setting process 6 executed by the MPU in the audio lamp control device in the sixth control example. [Figure 291] 10 is a flow chart showing the special diagram 2 performance mode setting process 6 executed by the MPU in the audio lamp control device in the sixth control example. [Figure 292] 10 is a flow chart showing mode-specific performance setting processing executed by the MPU in the audio lamp control device in the sixth control example. [Figure 293] 10 is a flow chart showing time-saving B-time performance setting processing executed by the MPU in the audio lamp control device in the sixth control example. [Figure 294] 1 is a front view of the gaming board of the pachinko machine in the seventh control example. [Figure 295] 1 is a partial enlarged view of the gaming board of the pachinko machine in the seventh control example. [Figure 296] 1 is a front perspective view of the V winning device in the seventh control example. [Figure 297] 1 is an exploded front perspective view of the V winning device in the seventh control example. [Figure 298] 1 is an operational view of the V winning device in the seventh control example seen from the rear side. [Figure 299] 10A is a schematic view of the V-window of the V-window of the V-window of the V-window of the V-window of the seventh control example in plan viewed in a state in which the opening / closing door is closed, and (b) is a schematic view of the V-window of the V-window of the V-window of the seventh control example in plan viewed in plan viewed in FIG. [Figure 300] 10A is a diagram showing an example of a display screen in which a time-saving lottery result suggestion performance is performed during the change in Special Figure 1 in the seventh control example, and (b) shows an example of a display screen in which a time-saving lottery result suggestion is performed during the change in Special Figure 1 in the seventh control example. [Figure 301] 10A and 10B show an example of a display screen in which time-saving non-winning is suggested during the change in Special Figure 1 in the 7th control example, and (b) shows an example of a jackpot winning notification screen in which a duplicate win is made in the 7th control example. [Figure 302] (a) is a timing chart showing an example of a notification pattern when a time-saving lottery or jackpot lottery is double-windled in the seventh control example, and (b) is a timing chart showing an example of a notification pattern when a time-saving lottery or jackpot is not win in the seventh control example, and (c) is a timing chart showing an example of a notification pattern when a time-saving lottery or jackpot is not win in the seventh control example. [Figure 303] 1 is a diagram schematically showing the structure of various counters in the seventh control example. [Figure 304] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the seventh control example, and FIG. 10 is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the seventh control example. [Figure 305] 1. (a) is a block diagram showing the structure of the first random number 7 table set in the ROM of the main control device in the seventh control example, (b) is a diagram schematically showing the specified contents of the first special random number 7 table in the seventh control example, and (c) is a diagram schematically showing the specified contents of the second special random number 7 table in the seventh control example. [Figure 306] 1. (a) is a block diagram showing the configuration of the jackpot type selection 7 table set in the ROM of the main control device in the 7th control example, (b) is a diagram schematically showing the specified contents of the special chart 1 jackpot type selection 7 table in the 7th control example, (c) is a diagram schematically showing the specified contents of the special chart 2 jackpot type selection 7 table in the 7th control example, and (d) is a diagram schematically showing the specified contents of the time-saving grant 7 table set in the ROM of the main control device in the 7th control example. [Figure 307] 10 is a diagram schematically showing the specified contents of the small hit type selection 7 table set in the ROM of the main control device in the seventh control example. [Figure 308] 10A and 10B are diagrams that schematically show the specified contents of the variation pattern 7 table set in the ROM of the main control device in the seventh control example, and (b) are diagrams that schematically show the specified contents of the normal variation pattern 7 table in the seventh control example. [Figure 309] 14 is a diagram schematically showing the specified contents of the time-saving variation pattern 7 table in the seventh control example. [Figure 310] 10A and 10B are diagrams that schematically show the specified contents of the time-saving random number 7 table set in the ROM of the main control device in the seventh control example, and (b) are diagrams that schematically show the specified contents of the time-saving type selection 7 table set in the ROM of the main control device in the seventh control example. [Figure 311] 1 is a block diagram showing the configuration of a ROM within the voice lamp control device of a pachinko machine in the seventh control example, and (b) is a block diagram showing the configuration of a RAM within the voice lamp control device of a pachinko machine in the seventh control example. [Figure 312] 14 is a diagram schematically showing the specified contents of a lottery result notification mode selection table set in the ROM of the audio lamp control device of a pachinko machine in the seventh control example. [Figure 313] 14 is a diagram showing a game flow in the seventh control example. [Figure 314] 10 is a flow chart showing timer interrupt processing executed by the MPU in the main control device in the seventh control example. [Figure 315] 10 is a flow chart showing special pattern variation processing 7 executed by the MPU in the main control device in the seventh control example. [Figure 316] 10 is a flow chart showing a time-saving lottery process 7 executed by an MPU within the main control device in the seventh control example. [Figure 317] 10 is a flow chart showing a special pattern determining process 7 executed by the MPU in the main control device in the seventh control example. [Figure 318]10 is a flow chart showing a special pattern variation pattern selection process 7 executed by the MPU in the main control device in the seventh control example. [Figure 319] 10 is a flow chart showing an update process 7 executed by an MPU within the main control device in the seventh control example. [Figure 320] 10 is a flow chart showing a small hit start setting process 7 executed by an MPU within the main control device in the seventh control example. [Figure 321] 10 is a flow chart showing a small-stop time-saving update process 7 executed by an MPU within the main control device in the seventh control example. [Figure 322] 10 is a flow chart showing V inlet passing processing executed by the MPU within the main control device in the seventh control example. [Figure 323] 10 is a flow chart showing V-passing processing executed by the MPU within the main control device in the seventh control example. [Figure 324] 10 is a flow chart showing a startup process 7 executed by an MPU within the main control device in the seventh control example. [Figure 325] 10 is a flow chart showing the main process 7 executed by the MPU in the main control device in the seventh control example. [Figure 326] 10 is a flow chart showing a jackpot control process 7 executed by an MPU within the main control device in the seventh control example. [Figure 327] 10 is a flow chart showing a small hit control process 7 executed by an MPU within the main control device in the seventh control example. [Figure 328] 10 is a flow chart showing the performance mode setting process 7 executed by the MPU in the audio lamp control device in the seventh control example. [Figure 329] 10 is a diagram showing a modified configuration of a game board 13 included in the pachinko machine 10. FIG. [Figure 330] 1 is a front view schematically showing the game board of a pachinko machine in the eighth control example. [Figure 331] 6A to 6B are diagrams schematically showing the internal structure of the distribution unit 1064 of the pachinko machine in the eighth control example. [Figure 332] 10 is a diagram showing an example of a performance screen in which a special chart 2 is consecutively held due to an overflow prize in a disadvantageous time-saving state displayed on the third pattern display device in the 8th control example, and (b) shows an example of a performance screen during a game of a game that is displayed on the third pattern display device in the 8th control example. [Figure 333] 10A is a diagram showing an example of a performance screen in which the disadvantageous time-saving state displayed on the third pattern display device in the eighth control example is terminated, and (b) shows an example of a performance screen in the ending of a normal jackpot game displayed on the third pattern display device in the eighth control example. [Figure 334] 10A is a schematic diagram showing part of the contents of the ROM of the main control device in the eighth control example, and (b) is a schematic diagram showing part of the contents of the RAM of the main control device in the eighth control example. [Figure 335] 10A (a) is a schematic diagram showing a table for selecting jackpot types in the eighth control example, and (b) is a schematic diagram showing a table for selecting jackpot types in the eighth control example, and a table for selecting time per time limit random numbers in the eighth control example. [Figure 336] 10A (a) is a schematic diagram showing the contents of the eight tables for special-speed and time-saving events in the eighth control example, and (b) is a schematic diagram showing the contents of the eighth time-saving events in the eighth control example. [Figure 337] 10.

[0021] FIG. 1 (a) is a schematic diagram showing part of the contents of the ROM of the audio lamp control device in the eighth control example, and FIG. 10 (b) is a schematic diagram showing part of the contents of the RAM of the audio lamp control device in the eighth control example. [Figure 338] 14 is a schematic diagram schematically showing the contents of a pre-reading pending mode selection table in the eighth control example. [Figure 339] 10 is a flow chart showing special pattern variation processing 8 executed by the MPU in the main control device in the eighth control example. [Figure 340] 11 is a flow chart showing a variation execution determination process 8 executed by the MPU within the main control device in the eighth control example. [Figure 341] 10 is a flow chart showing a time-saving lottery process 8 executed by an MPU within the main control device in the eighth control example. [Figure 342] 10 is a flow chart showing an update process 8 executed by the MPU in the main control device in the eighth control example. [Figure 343] 11 is a flow chart showing time-saving setting processing 8 executed by the MPU in the main control device in the eighth control example. [Figure 344] 10 is a flow chart showing a start-up winning process 8 executed by an MPU within the main control device in the eighth control example. [Figure 345] 12 is a flow chart showing a preliminary process 8 executed by an MPU within the main control device in the eighth control example. [Figure 346] 10 is a flow chart showing the main processing executed by the MPU in the audio lamp control device in the eighth control example. [Figure 347] 10 is a flow chart showing command determination processing 8 executed by the MPU in the audio lamp control device in the eighth control example. [Figure 348] 11 is a flow chart showing a state command reception process 8 executed by the MPU in the audio lamp control device in the eighth control example. [Figure 349] 11 is a flow chart showing a normal state performance setting process 8 executed by the MPU in the audio lamp control device in the eighth control example. [Figure 350] 10 is a flow chart showing a time-saving state performance setting process 8 executed by the MPU in the audio lamp control device in the eighth control example. [Figure 351] 10 is a flow chart showing the winning command process 8 executed by the MPU in the audio lamp control device in the eighth control example. [Figure 352] 10 is a flow chart showing a special chart winning information command process 8 executed by the MPU in the audio lamp control device in the eighth control example. [Figure 353] 10 is a flow chart showing an ending process 8 executed by the MPU in the audio lamp control device in the eighth control example. [Figure 354] 10 is a flow chart showing the liquid crystal performance execution management process 8 executed by the MPU in the audio lamp control device in the eighth control example. [Figure 355] 10 is a flow chart showing the advance prize detection process 8 executed by the MPU in the audio lamp control device in the eighth control example. [Figure 356] 1 is a front view schematically showing the game board of a pachinko machine in the ninth control example. [Figure 357] 10A and 10B are enlarged views showing the right side area of ​​the game board of the pachinko machine in the ninth control example. [Figure 358] 10A and 10B are enlarged views showing the right side area of ​​the game board of the pachinko machine in the ninth control example. [Figure 359] 10A and 10B are enlarged views showing the right side area of ​​the game board of the pachinko machine in the ninth control example. [Figure 360] 10 is a timing chart showing the flow of games to win a general map when the opening pattern A of a general map is set in the ninth control example. [Figure 361] 10 is a timing chart showing the flow of a game where the open pattern B of a general map is set in the ninth control example. [Figure 362] 1 is a schematic diagram schematically showing a game flow showing the transition contents of the game state in the ninth control example. [Figure 363] 10A is a diagram showing an example of a performance screen displayed on the third pattern display device in the ninth control example when a time-saving pattern is won in the normal state displayed on the third pattern display device, and (b) shows an example of a performance screen displayed on the third pattern display device in the ninth control example in the heaven mode. [Figure 364] 10A (a) is a diagram showing an example of a performance screen in the space mode displayed on the third pattern display device in the ninth control example, and (b) is a diagram showing an example of a performance screen in the challenge mode displayed on the third pattern display device in the ninth control example. [Figure 365] 10A (a) is a schematic diagram showing part of the contents of the ROM of the main control device in the ninth control example, and (b) is a schematic diagram showing the contents of the first random number 9 table in the ninth control example. [Figure 366] 10. (a) is a schematic diagram showing the contents of the jackpot type selection 9 table in the ninth control example, and (b) is a schematic diagram showing the contents of the time-saving random number 9 table in the ninth control example. [Figure 367] 1 is a schematic diagram schematically showing the contents of the 9 tables for selection by type in the ninth control example. [Figure 368] 1 is a schematic diagram schematically showing part of the contents of the RAM of the main control device in the ninth control example. [Figure 369] 10A (a) is a schematic diagram showing part of the contents of the ROM of the voice lamp control device in the ninth control example, and (b) is a schematic diagram showing the contents of the expectation degree selection table in the ninth control example. [Figure 370] 1 is a schematic diagram schematically showing part of the contents of the RAM of the audio lamp control device in the ninth control example. [Figure 371] 10 is a flow chart showing a command determination process 9 executed by the MPU in the audio lamp control device in the ninth control example. [Figure 372] 10 is a flow chart showing a state command process 9 executed by the MPU in the audio lamp control device in the ninth control example. [Figure 373] 10 is a flow chart showing a game state update process 9 executed by the MPU in the audio lamp control device in the ninth control example. [Figure 374] 10 is a flow chart showing time-saving related processing 9 executed by the MPU in the audio lamp control device in the ninth control example. [Figure 375] 10 is a flow chart showing non-electrical status management processing executed by the MPU in the audio lamp control device in the ninth control example. [Figure 376] 1 is a front view schematically showing the game board of a pachinko machine in the tenth control example. [Figure 377] 10 is an enlarged view showing a V-winning device of a pachinko machine in the tenth control example. [Figure 378] 10 is an enlarged view showing a V-winning device of a pachinko machine in the tenth control example. [Figure 379] 10 is an enlarged view showing a V-winning device of a pachinko machine in the tenth control example. [Figure 380] 10 is an enlarged view showing a V-winning device of a pachinko machine in the tenth control example. [Figure 381] 10. (a) is a diagram showing an example of a time-saving performance screen after a special chart 1 jackpot during normal operation, displayed on the third pattern display device in the 10th control example, and (b) is a diagram showing an example of a performance screen during a special chart 2 jackpot game displayed on the third pattern display device in the 10th control example. [Figure 382] 10 (a) is a diagram showing an example of the final fluctuation screen in the super chance mode displayed on the third pattern display device in the 10th control example, and (b) is a diagram showing an example of the performance screen in the case where special chart 2 holds up to MAX during the super chance mode displayed on the third pattern display device in the 10th control example. [Figure 383] 10 (a) is a diagram showing an example of a treasure chest opening performance screen in the super chance mode displayed on the third pattern display device in the 10th control example, and (b) is a diagram showing an example of a final change screen in the super chance mode displayed on the third pattern display device in the 10th control example. [Figure 384] 10 is a schematic diagram showing a game flow showing the transition contents of the game state in the tenth control example. [Figure 385] 10. FIG. 10 (a) is a schematic diagram showing part of the contents of the ROM of the main control device in the 10th control example, and FIG. 10th control example is a schematic diagram showing part of the contents of the RAM of the main control device in the 10th control example. [Figure 386] 10 (a) is a schematic diagram showing the contents of the first random number 10 table in the tenth control example, and (b) is a schematic diagram showing the contents of the special pattern 1 random number 10 table, which is part of the first random number 10 table in the tenth control example, and (c) is a schematic diagram showing the contents of the special pattern 2 random number 10 table, which is part of the first random number 10 table in the tenth control example. [Figure 387] 10 is a schematic diagram schematically showing the contents of the 10 table for selecting small win type in the tenth control example. [Figure 388] 10 is a schematic diagram schematically showing the contents of a time-saving grant table in the tenth control example. [Figure 389] 10. FIG. 10 (a) is a schematic diagram showing part of the contents of the ROM of the voice lamp control device in the 10th control example, and FIG. 10th control example is a schematic diagram showing part of the contents of the RAM of the voice lamp control device in the 10th control example. [Figure 390] 10 (a) is a schematic diagram showing the contents of the final change effect selection table in the tenth control example, and (b) is a schematic diagram showing the contents of the announcement target selection table in the tenth control example. [Figure 391] 10 is a flow chart showing special pattern variation processing 10 executed by the MPU in the main control device in the tenth control example. [Figure 392] 10 is a flow chart showing a special pattern variation pattern selection process 10 executed by the MPU in the main control device in the tenth control example. [Figure 393] 10 is a flow chart showing an update process 10 executed by an MPU within the main control device in the tenth control example. [Figure 394] 10 is a flow chart showing a hold ball count command process 10 executed by the MPU in the audio lamp control device in the tenth control example. [Figure 395] 10 is a flow chart showing a special diagram 2 performance mode setting process 10 executed by the MPU in the audio lamp control device in the tenth control example. [Figure 396] 1 is a front view schematically showing the game board of a pachinko machine in the 11th control example. [Figure 397] 11 (a) is a diagram showing an example of a demo screen displayed on the third pattern display device in the 11th control example, and (b) is a diagram showing an example of a screen during normal right-playing game displayed on the third pattern display device in the 11th control example. [Figure 398] 11. FIG. 10A is a schematic diagram showing a part of the contents of the ROM of the main control device in the 11th control example, and FIG. 10B is a schematic diagram showing a part of the contents of the RAM of the main control device in the 11th control example. [Figure 399] 11 (a) is a schematic diagram showing the contents of the special pattern 2 random number 11 table in the 11th control example, and (b) is a schematic diagram showing the contents of the small hit type selection 11 table in the 11th control example. [Figure 400] 11 (a) is a schematic diagram showing the contents of the time-saving random number 11 table in the 11th control example, and (b) is a schematic diagram showing the contents of the time-saving type selection 11 table in the 11th control example. [Figure 401] 11 is a schematic diagram schematically showing part of the contents of the RAM of the audio lamp control device in the 11th control example. [Figure 402] 11 is a flow chart showing a time-saving lottery process 11 executed by an MPU within the main control device in the 11th control example. [Figure 403] 11 is a flow chart showing a jackpot control process 11 executed by an MPU within the main control device in the 11th control example. [Figure 404] 11 is a flow chart showing a jackpot termination process 11 executed by the MPU in the main control device in the 11th control example. [Figure 405] 11 is a flow chart showing a time-saving limit update process executed by an MPU within the main control device in the 11th control example. [Figure 406] 1 is a front view schematically showing the game board of a pachinko machine in the 12th control example. [Figure 407] 12 is a schematic diagram schematically showing part of the contents of the ROM of the main control device in the 12th control example. [Figure 408] 12 is a schematic diagram schematically showing part of the contents of the RAM of the main control device in the 12th control example. [Figure 409] 12 (a) is a schematic diagram showing a first random number 12 table in the 12th control example, (b) is a schematic diagram showing a second random number 12 table in the 12th control example, (c) is a schematic diagram showing a time-saving random number 12 table in the 12th control example, and (d) is a schematic diagram showing a small random number 12 table in the 12th control example. [Figure 410] 12 (a) is a schematic diagram showing the contents of the 12 table for jackpot type selection in the 12th control example, and (b) is a schematic diagram showing the contents of the 12 table for jackpots, which is part of the 12th control table for jackpot types selection in the 12th control example. [Figure 411] 12 is a schematic diagram schematically showing the contents of the 12 tables for jackpots, which are part of the 12 tables for jackpot types selected by jackpot type in the 12th control example. [Figure 412] 12 is a schematic diagram schematically showing the contents of the 12 table for selecting small win type in the 12th control example. [Figure 413] 12 is a schematic diagram schematically showing the contents of the 12th table of variation patterns in the 12th control example. [Figure 414] 12 is a schematic diagram schematically showing the contents of a normal state fluctuation pattern table, which is part of a fluctuation pattern 12 table in the 12th control example. [Figure 415] 12 is a schematic diagram schematically showing the contents of a time-saving state fluctuation pattern table, which is part of a fluctuation pattern 12 table in the 12th control example. [Figure 416] 12 is a schematic diagram schematically showing the contents of a time-saving winning variation state variation table, which is part of the variation pattern table of variation patterns 12 in the 12th control example. [Figure 417] 12 is a flow chart showing special pattern variation processing 12 executed by the MPU in the main control device in the 12th control example. [Figure 418] 12 is a flow chart showing the first special pattern change start process 12 executed by the MPU in the main control device in the 12th control example. [Figure 419] 12 is a flow chart showing the first special pattern determination process 12 executed by the MPU in the main control device in the 12th control example. [Figure 420]12 is a flow chart showing a special pattern variation pattern selection process 12 executed by the MPU in the main control device in the 12th control example. [Figure 421] 12 is a flow chart showing a special diagram 1 time-saving lottery process 12 executed by an MPU within the main control device in the 12th control example. [Figure 422] 12 is a flow chart showing a game state update process 12 executed by an MPU within the main control device in the 12th control example. [Figure 423] 12 is a flow chart showing a first special pattern change execution process 12 executed by the MPU in the main control device in the 12th control example. [Figure 424] 12 is a flow chart showing the first special pattern change stop process 12 executed by the MPU in the main control device in the 12th control example. [Figure 425] 12 is a flow chart showing the forced stopping process 12 of Special Diagram 1 executed by the MPU in the main control device in the 12th control example. [Figure 426] 12 is a flow chart showing a time-saving setting process 12 executed by an MPU within the main control device in the 12th control example. [Figure 427] 12 is a flow chart showing a second special pattern change start process 12 executed by the MPU in the main control device in the 12th control example. [Figure 428] 12 is a flow chart showing a second special pattern determining process 12 executed by the MPU in the main control device in the 12th control example. [Figure 429] 12 is a flow chart showing a special diagram 2 time-saving lottery process 12 executed by the MPU in the main control device in the 12th control example. [Figure 430] 12 is a flow chart showing a small win lottery process 12 executed by an MPU within the main control device in the 12th control example. [Figure 431] 12 is a flow chart showing a second special pattern variation pattern selection process 12 executed by the MPU in the main control device in the 12th control example. [Figure 432] 12 is a flow chart showing a second special pattern change execution process 12 executed by the MPU in the main control device in the 12th control example. [Figure 433] 12 is a flow chart showing a second special pattern change stop process 12 executed by the MPU in the main control device in the 12th control example. [Figure 434] 12 is a flow chart showing a special diagram 2 forced stopping process 12 executed by the MPU in the main control device in the 12th control example. [Figure 435] 12 is a flow chart showing a special diagram 2 small hit stop process 12 executed by the MPU in the main control device in the 12th control example. [Figure 436] 12 is a flow chart showing a jackpot control process 12 executed by an MPU within the main control device in the 12th control example. [Figure 437] 12 is a flow chart showing a jackpot termination process 12 executed by the MPU in the main control device in the 12th control example. [Figure 438] 12 is a flow chart showing a time-saving limit update process 12 executed by the MPU in the main control device in the 12th control example. [Figure 439] 6A and 6B are diagrams showing an example of a ceiling-reaching indication display screen displayed on the third pattern display device in the 13th control example. [Figure 440] 13 (a) is a diagram showing an example of a ceiling-reaching change-indication screen displayed on the third pattern display device in the 13th control example, and (b) is a diagram showing an example of a ceiling-reaching display screen displayed on the third pattern display device in the 13th control example. [Figure 441] 13 is a diagram showing an example of a ceiling-mounted display screen displayed on the third pattern display device in the 13th control example. [Figure 442] 13 is a transition diagram showing the flow of transition of each game state in the 13th control example. [Figure 443] 13 (a) is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the 13th control example, and (b) is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the 13th control example. [Figure 444] 13 (a) is a diagram schematically showing the specified contents of the first random number 13 table set in the ROM of the main control device in the 13th control example, and (b) is a diagram schematically showing the specified contents of the second random number 13 table set in the ROM of the main control device in the 13th control example, and (c) is a diagram schematically showing the specified contents of the time-saving random number 13 table set in the ROM of the main control device in the 13th control example. [Figure 445] 13 is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 13th control example. [Figure 446] 13 (a) is a block diagram showing the configuration of the time-saving type selection 13 table set in the ROM of the main control device in the 13th control example, and (b) is a diagram schematically showing the specified contents of the time-saving type selection 13 table in the 13th control example, and (c) is a diagram schematically showing the specified contents of the ceiling 13 table in the 13th control example. [Figure 447] 13 (a) is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 13th control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 13th control example. [Figure 448] 13 is a diagram schematically showing the specified contents of the ceiling-reaching suggestion performance selection table set in the ROM of the audio lamp control device of a pachinko machine in the 13th control example. [Figure 449] 13 is a diagram schematically showing the specified contents of the ceiling-reaching performance selection table set in the ROM of the audio lamp control device of a pachinko machine in the 13th control example. [Figure 450] 13 is a flow chart showing special pattern variation processing 13 executed by the MPU in the main control device in the 13th control example. [Figure 451] 13 is a flow chart showing a special pattern determination process 13 executed by the MPU in the main control device in the 13th control example. [Figure 452] 13 is a flow chart showing ceiling determination processing 13 executed by the MPU in the main control device in the 13th control example. [Figure 453] 13 is a flow chart showing a time-saving lottery process 13 executed by an MPU within the main control device in the 13th control example. [Figure 454] 13 is a flow chart showing a special pattern variation pattern selection process 13 executed by the MPU in the main control device in the 13th control example. [Figure 455] 13 is a flow chart showing a time-saving setting process 13 executed by an MPU within the main control device in the 13th control example. [Figure 456] 13 is a flow chart showing the normal pattern variation process 13 executed by the MPU in the main control device in the 13th control example. [Figure 457] 12 is a flow chart showing the startup process executed by the MPU in the main control device in the 13th control example. [Figure 458] 13 is a flow chart showing command determination processing 13 executed by the MPU in the audio lamp control device in the 13th control example. [Figure 459] 13 is a flow chart showing a state command reception process 13 executed by the MPU in the audio lamp control device in the 13th control example. [Figure 460] 13 is a flow chart showing a time-saving state performance setting process 13 executed by the MPU in the audio lamp control device in the 13th control example. [Figure 461] 13 is a flow chart showing a variation display setting process 13 executed by the MPU in the audio lamp control device in the 13th control example. [Figure 462] 13 is a flow chart showing the performance mode setting process 13 executed by the MPU in the audio lamp control device in the 13th control example. [Figure 463] 13 is a flow chart showing a normal mode performance setting process 13 executed by the MPU in the audio lamp control device in the 13th control example. [Figure 464] 13 (a) is a diagram showing an example of a game state suggestion performance screen displayed on the third pattern display device in the first modification of the 13th control example, and (b) is a diagram showing an example of a display screen after it is notified that the first time-saving state has been set in the game state suggestion performance in the first modification of the 13th control example. [Figure 465] 13A is a diagram schematically showing the specified contents of the time-saving random number 13a table set in the ROM of the main control device in the first modification of the 13th control example, and (b) is a diagram schematically showing the specified contents of the time-saving winning table in the first modification of the 13th control example. [Figure 466] 13 (a) is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the first modification of the 13th control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the first modification of the 13th control example. [Figure 467] 13 is a diagram schematically showing the specified contents of the game state suggestion performance selection 13a table set in the ROM of the audio lamp control device of a pachinko machine in the first modification of the 13th control example. [Figure 468] 13 is a flow chart showing a time-saving lottery process 13a executed by an MPU within the main control device in the first modification of the 13th control example. [Figure 469]13 is a flow chart showing a time-saving state performance setting process 13a executed by the MPU in the audio lamp control device in the first modification of the 13th control example. [Figure 470] 13 is a flow chart showing a normal mode performance setting process 13a executed by the MPU in the audio lamp control device in the first modification of the 13th control example. [Figure 471] 14th control example (a) shows an example of a screen when the ceiling activation mode is entered, displayed on the third pattern display device in the 14th control example, and (b) shows an example of a screen when the ceiling activation mode is entered, displayed on the third pattern display device in the 14th control example. [Figure 472] 14th control example (a) shows an example of a screen when entering the super ceiling mode, displayed on the third pattern display device in the 14th control example, and (b) shows an example of a screen when entering the time-saving in the ceiling mode, displayed on the third pattern display device in the 14th control example. [Figure 473] 14 (a) is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the 14th control example, and (b) is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the 14th control example. [Figure 474] 14 (a) is a diagram schematically showing the specified contents of the time-saving random number 14 table set in the ROM of the main control device in the 14th control example, and (b) is a diagram schematically showing the specified contents of the ceiling 14 table in the 14th control example. [Figure 475] 14 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 14th control example. [Figure 476] 14 is a flow chart showing ceiling determination processing 14 executed by the MPU in the main control device in the 14th control example. [Figure 477] 14 is a flow chart showing the time-saving setting process 14 executed by the MPU in the main control device in the 14th control example. [Figure 478] 14 is a flow chart showing a state command reception process 14 executed by the MPU in the audio lamp control device in the 14th control example. [Figure 479] 14 is a flow chart showing a time-saving state performance setting process 14 executed by the MPU in the audio lamp control device in the 14th control example. [Figure 480] 14 is a flow chart showing a normal mode performance setting process 14 executed by the MPU in the audio lamp control device in the 14th control example. [Figure 481] 14th control example (a) shows an example of a thrilling zone entry screen displayed on the third pattern display device in the first modification of the 14th control example, and (b) shows an example of a notification screen indicating that the time-saving entry is displayed on the third pattern display device in the first modification of the 14th control example, which indicates that the time-saving entry is made immediately after entering the thrilling zone. [Figure 482] 1 is a block diagram showing the configuration of a ROM within the main control device of a pachinko machine in the first modification of the 14th control example. [Figure 483] 14 is a diagram schematically showing the specified contents of the time-saving winning table in the first modification of the 14th control example. [Figure 484] 14th control example (a) is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the first modification of the 14th control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the first modification of the 14th control example. [Figure 485] 14 is a diagram schematically showing the specified contents of the thrilling zone performance selection table set in the ROM of the audio lamp control device of a pachinko machine in the first modification of the 14th control example. [Figure 486] 14 is a flow chart showing a time-saving lottery process 14a executed by an MPU within the main control device in the first modification of the 14th control example. [Figure 487] 14 is a flow chart showing ceiling determination processing 14a executed by the MPU in the main control device in the first modification of the 14th control example. [Figure 488] 14 is a flow chart showing a time-saving setting process 14a executed by an MPU within the main control device in the first modification of the 14th control example. [Figure 489] 14 is a flow chart showing a time-saving state performance setting process 14a executed by the MPU in the audio lamp control device in the first modification of the 14th control example. [Figure 490] 14 is a flow chart showing a normal mode performance setting process 14a executed by the MPU in the audio lamp control device in the first modification of the 14th control example. [Figure 491] 1 is a front view schematically showing the game board of a pachinko machine in the 15th control example. [Figure 492] 15 (a) is a diagram showing an example of a performance screen during the second special mode state displayed on the third design display device in the 15th control example, and (b) is a diagram showing an example of a performance screen during the end of the second special mode state displayed on the third design display device in the 15th control example. [Figure 493] 15 (a) is a diagram showing an example of a performance screen during the change in special chart 2 in the normal state displayed on the third pattern display device in the 15th control example, and (b) is a diagram showing an example of a change in special chart 2 in the second special state displayed on the third pattern display device in the 15th control example. [Figure 494] 15 (a) is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the 15th control example, and (b) is a diagram schematically showing the specified contents of the second random number 15 table set in the ROM of the main control device in the 15th control example, and (c) is a diagram schematically showing the specified contents of the time-saving random number 15 table set in the ROM of the main control device in the 15th control example. [Figure 495] 15 (a) is a block diagram showing the configuration of the jackpot type selection 15 table set in the ROM of the main control device in the 15th control example, and (b) is a diagram schematically showing the prescribed contents of the 15th table for special chart 1 Jackpots in the 15th control example, and (c) is a diagram schematically showing the prescribed contents of the 15th table for special chart 2 Jackpots in the 15th control example. [Figure 496] 14 is a diagram schematically showing the specified contents of the time-saving type selection 15 table set in the ROM of the main control device in the 15th control example. [Figure 497] 15 (a) is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 15th control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 15th control example. [Figure 498] 14 is a diagram schematically showing the specified contents of a keep zone presentation selection table set in the ROM of the audio lamp control device of a pachinko machine in the 15th control example. [Figure 499] 15 is a flow chart showing special pattern variation processing 15 executed by the MPU in the main control device in the 15th control example. [Figure 500] 15 is a flow chart showing a time-saving lottery process 15 executed by an MPU within the main control device in the 15th control example. [Figure 501] 10 is a flow chart showing a second special-mode state performance setting process 15 executed by the MPU in the audio lamp control device in the 15th control example. [Figure 502] 14 is a flow chart showing the special diagram 1 performance mode setting process 15 executed by the MPU in the audio lamp control device in the 15th control example. [Figure 503] 15 is a flow chart showing the special diagram 2 performance mode setting process 15 executed by the MPU in the audio lamp control device in the 15th control example. [Figure 504] 16A is a diagram illustrating the exterior of the island equipment in a state in which a plurality of pachinko machines connected to the data display device in the 16th embodiment are installed side by side in a hall, and (b) is a diagram showing an example of displaying various data displayed on the data display unit of the data display device in the 16th embodiment. [Figure 505] 16th control example (a) shows the visual appearance of the data display device while the jackpot game state is in the 16th control example, and (b) shows an example of the visual appearance of the data display device when the 16th control example is shifted to the time-saving state of the normal pattern after the jackpot is completed. [Figure 506] 16 is a diagram showing a visual viewing mode of the data display device during the third time-saving state, which is set based on the arrival of the number of ceiling draws in the sixteenth control example. [Figure 507] 16th control example (a) shows an example of a stimulating effect of the data display device linked performance displayed on the third pattern display device in the 16th control example, and (b) shows an example of a performance mode of the data display device linked performance displayed on the third pattern display device in the 16th control example. [Figure 508] 16 (a) is a diagram showing an example of the performance mode when a small or special jackpot is won in the 16th control example, and (b) is a diagram showing an example of the variation display mode that is executed during the number of ceiling draws in the 16th control example. [Figure 509] 16th control example (a) shows an example of the performance mode of the time-saving activation inciting performance in the normal state displayed on the third pattern display device in the 16th control example, and (b) shows an example of the performance mode of the time-saving activation inciting performance in the data display device linked type displayed on the third pattern display device in the 16th control example. [Figure 510] 16 (a) is a diagram showing a list of hold-change modes in the 16th control example, and (b) is a diagram showing conditions in which hold-change effects in the 16th control example are suppressed. [Figure 511]16 is a diagram showing a method for transitioning between the game states in the 16th control example. [Figure 512] 14 is a block diagram showing the electrical configuration of a pachinko machine in the 16th control example. [Figure 513] 16 is a block diagram showing the electrical configuration of a data display device and a hall computer electrically connected to the pachinko machine via an external output terminal board in the 16th control example. [Figure 514] 14 is a diagram showing the types of external output signals output from the external output terminal board in the 16th control example. [Figure 515] 16 is a diagram showing an example of a signal output mode of the external output terminal board during normal play in the 16th control example. [Figure 516] 16 is a diagram showing an example of a signal output mode when power is turned on in the 16th control example. [Figure 517] 16 (a) is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the 16th control example, and (b) is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the 16th control example. [Figure 518] 16 (a) is a diagram schematically showing the specified contents of the first random number 16 table set in the ROM of the main control device in the 16th control example, and (b) is a block diagram showing the configuration of the variation pattern selection 16 table set in the ROM of the main control device in the 16th control example, and (c) is a diagram schematically showing the specified contents of the normal 16 table in the 16th control example. [Figure 519] 16 (a) is a diagram schematically showing the specified contents of the jackpot type selection 16 table set in the ROM of the main control device in the 16th control example, and (b) is a diagram schematically showing the specified contents of the time-saving random number 16 table set in the ROM of the main control device in the 16th control example. [Figure 520] 16th control example (a) is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 16th control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 16th control example. [Figure 521] 16 is a diagram schematically showing the specified contents of a hold mode selection table set in the ROM of the audio lamp control device of a pachinko machine in the 16th control example. [Figure 522] 16 is a diagram schematically showing the specified contents of the time-saving suggestion performance selection table set in the ROM of the audio lamp control device of a pachinko machine in the 16th control example. [Figure 523] 11 is a flow chart showing timer interrupt processing executed by the MPU in the main control device in the 16th control example. [Figure 524] 16 is a flow chart showing special pattern variation processing 16 executed by the MPU in the main control device in the 16th control example. [Figure 525] 16 is a flow chart showing an update process 16 executed by the MPU in the main control device in the 16th control example. [Figure 526] 16 is a flow chart showing ceiling determination processing 16 executed by the MPU in the main control device in the 16th control example. [Figure 527] 16 is a flow chart showing a time-saving setting process 16 executed by an MPU within the main control device in the 16th control example. [Figure 528] 16th control example (a) is a flow chart showing the outer end output setting process executed by the MPU in the main control device in the 16th control example, and (b) is a flow chart showing the error signal processing executed by the MPU in the main control device in the 16th control example. [Figure 529] 11 is a flow chart showing out-sphere detection signal processing executed by the MPU in the main control device in the 16th control example. [Figure 530] 11 is a flow chart showing start port signal processing executed by the MPU in the main control device in the 16th control example. [Figure 531] 11 is a flow chart showing the release signal processing executed by the MPU in the main control device in the 16th control example. [Figure 532] 11 is a flow chart showing the startup process executed by the MPU in the main control device in the 16th control example. [Figure 533] 11 is a flow chart showing the start-up signal output process executed by the MPU in the main control device in the 16th control example. [Figure 534] 11 is a flow chart showing the main processing executed by the MPU in the audio lamp control device in the sixteenth control example. [Figure 535] 16 is a flow chart showing the performance update process 16 executed by the MPU in the audio lamp control device in the 16th control example. [Figure 536] 16 is a flow chart showing a command determination process 16 executed by the MPU in the audio lamp control device in the 16th control example. [Figure 537] 16 is a flow chart showing a state command reception process 16 executed by the MPU in the audio lamp control device in the 16th control example. [Figure 538] 16 is a flow chart showing the winning command processing 16 executed by the MPU in the audio lamp control device in the 16th control example. [Figure 539] 16 is a flow chart showing jackpot related processing 16 executed by the MPU in the audio lamp control device in the 16th control example. [Figure 540] 11 is a flow chart showing small hit-related processes executed by the MPU in the audio lamp control device in the 16th control example. [Figure 541] 11 is a flow chart showing general-scale diagram-related processes executed by the MPU in the audio lamp control device in the 16th control example. [Figure 542] 16 is a flow chart showing a normal mode performance setting process 16 executed by the MPU in the audio lamp control device in the 16th control example. [Figure 543] 11 is a flow chart showing the main processing executed by the MPU in the data display device in the 16th control example. [Figure 544] 11 is a flow chart showing display device signal reception processing executed by the MPU in the data display device in the 16th control example. [Figure 545] 11 is a flow chart showing the main processing executed by the MPU of the Hall computer in the 16th control example. [Figure 546] 11 is a flow chart showing signal reception processing executed by the MPU of the Hall computer in the 16th control example. [Figure 547] 11 is a flow chart showing a power recovery comparison process executed by the MPU of the Hall computer in the 16th control example. [Figure 548] 14 is a front view schematically showing the game board of a pachinko machine in the 17th control example. [Figure 549] 17th control example shows an example of a performance mode during the time-saving state B, which is set when the number of ceiling draws is reached in the 17th control example, and (b) shows an example of a performance mode when the time-saving state B is changed to the time-saving state A in the 17th control example. [Figure 550] 11 is a diagram showing an example of a performance mode when a jackpot is won during the time-saving state B in the 17th control example. [Figure 551] 11 is a diagram showing a method for transitioning between the game states in the 17th control example. [Figure 552] 10 is a block diagram showing the configuration of a ROM within the main control device of a pachinko machine in the 17th control example. [Figure 553] 14 is a block diagram showing the configuration of RAM within the main control device of a pachinko machine in the 17th control example. [Figure 554] 17 (a) is a block diagram showing the configuration of the jackpot type selection 17 table set in the ROM of the main control device in the 17th control example, and (b) is a diagram schematically showing the prescribed contents of the 17th table for special chart 1jackets in the 17th control example, and (c) is a diagram schematically showing the prescribed contents of the 17th table for special chart 2jackets in the 17th control example. [Figure 555] 17 (a) is a diagram schematically showing the specified contents of the second random number 17 table set in the ROM of the main control device in the 17th control example, and (b) is a block diagram showing the configuration of the variation pattern 17 table set in the ROM of the main control device in the 17th control example, and (c) is a diagram schematically showing the specified contents of the first time-saving table in the 17th control example. [Figure 556] 17 (a) is a diagram schematically showing the specified contents of the small hit random number 17 table set in the ROM of the main control device in the 17th control example, and (b) is a diagram schematically showing the specified contents of the small hit type selection 17 table set in the ROM of the main control device in the 17th control example, and (c) is a diagram schematically showing the specified contents of the time-saving random number 17 table set in the ROM of the main control device in the 17th control example. [Figure 557] 17 (a) is a diagram schematically showing the specified contents of the time-saving type selection table set in the ROM of the main control device in the 17th control example, and (b) is a diagram schematically showing the specified contents of the variation pattern scenario table set in the ROM of the main control device in the 17th control example. [Figure 558] 14 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 17th control example. [Figure 559]17 is a flow chart showing special pattern variation processing 17 executed by the MPU in the main control device in the 17th control example. [Figure 560] 17 is a flow chart showing the first special pattern change start process 17 executed by the MPU in the main control device in the seventeenth control example. [Figure 561] 17 is a flow chart showing the first special pattern determination process 17 executed by the MPU in the main control device in the seventeenth control example. [Figure 562] 17 is a flow chart showing a small win lottery process 17 executed by an MPU within the main control device in the 17th control example. [Figure 563] 17 is a flow chart showing the first special pattern variation pattern selection process 17 executed by the MPU in the main control device in the seventeenth control example. [Figure 564] 17 is a flow chart showing ceiling determination processing 17 executed by an MPU within the main control device in the 17th control example. [Figure 565] 17 is a flow chart showing the first special pattern variation stop processing 17 executed by the MPU in the main control device in the seventeenth control example. [Figure 566] 10 is a flow chart showing a special diagram 1 miss-off stop process executed by an MPU within the main control device in the 17th control example. [Figure 567] 17 is a flow chart showing a second special pattern change start process 17 executed by the MPU in the main control device in the seventeenth control example. [Figure 568] 17 is a flow chart showing a second special pattern determination process 17 executed by the MPU in the main control device in the seventeenth control example. [Figure 569] 17 is a flow chart showing a special diagram 2 time-saving lottery process 17 executed by an MPU within the main control device in the 17th control example. [Figure 570] 17 is a flow chart showing a second special pattern variation pattern selection process 17 executed by the MPU in the main control device in the seventeenth control example. [Figure 571] 17 is a flow chart showing a second special pattern change stop process 17 executed by the MPU in the main control device in the seventeenth control example. [Figure 572] 17 is a flow chart showing a time-saving setting process 17 executed by an MPU within the main control device in the 17th control example. [Figure 573] 10 is a flow chart showing a special diagram 2 missing stop processing executed by an MPU within the main control device in the 17th control example. [Figure 574] 17 is a flow chart showing a time-saving state performance setting process 17 executed by the MPU in the audio lamp control device in the seventeenth control example. [Figure 575] 17 is a flow chart showing the special diagram 2 performance mode setting process 17 executed by the MPU in the audio lamp control device in the 17th control example. [Figure 576] 11 is a front view schematically showing the game board of a pachinko machine in the 18th control example. [Figure 577] 11 is a partial enlarged view of the game board of a pachinko machine in the 18th control example. [Figure 578] 1 is a front perspective view of the V winning device in the 18th control example. [Figure 579] 1 is an exploded front perspective view of the V winning device in the 18th control example. [Figure 580] 11 is an operational view of the V winning device in the 18th control example seen from the rear side. [Figure 581] 18 is a schematic view of the V-winning door of the V-winning device in the 18th control example, as seen in plan view of the state in which the opening and closing door is closed, and (b) is a schematic view of the V-winning device in the 18th control example, as seen in plan view of the V-winning device in the 18th control example, as seen in plan view of the V-winning device in the 18th control example. [Figure 582] 18th control example (a) shows an example of a V icon acquisition performance screen executed during the ending period of a jackpot game displayed on the third pattern display device in the 18th control example, and (b) shows an example of a battle performance screen when the V hold is consumed due to the fourth variation of the special chart after the jackpot game displayed on the third pattern display device in the 18th control example. [Figure 583] 18th control example shows an example of a performance screen when a V icon is activated during a battle performance displayed on the third pattern display device in the 18th control example, and (b) shows an example of a performance screen for a battle performance when a V hold exists within the hold displayed on the third pattern display device in the 18th control example. [Figure 584] 14 is a diagram schematically showing the structure of various counters in the 18th control example. [Figure 585] 18th control example (a) is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the 18th control example, and (b) is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the 18th control example. [Figure 586] 18 (a) is a block diagram showing the structure of the first random number 18 table set in the ROM of the main control device in the 18th control example, and (b) is a diagram schematically showing the specified contents of the special pattern 1 random number 18 table in the 18th control example, and (c) is a diagram schematically showing the specified contents of the special pattern 2 random number 18 table in the 18th control example. [Figure 587] 18 (a) is a block diagram showing the configuration of the jackpot type selection 18 table set in the ROM of the main control device in the 18th control example, (b) is a diagram schematically showing the specified contents of the special chart 1 Jackpot type selection 18 table set in the 18th control example, (c) is a diagram schematically showing the specified contents of the special chart 2 Jackpot type selection 18 table set in the 18th control example, and (d) is a diagram schematically showing the specified contents of the time-saving grant 18 table set in the ROM of the main control device in the 18th control example. [Figure 588] 18 is a diagram schematically showing the specified contents of the 18th small-ton type selection table set in the ROM of the main control device in the 18th control example. [Figure 589] 18 (a) is a block diagram showing the configuration of the variation pattern selection table set in the ROM of the main control device in the 18th control example, and (b) is a diagram schematically showing the specified contents of the normal variation pattern 18th control example. [Figure 590] 18 is a diagram schematically showing the specified contents of the time-saving variation pattern 18 table in the 18th control example. [Figure 591] 18 (a) is a diagram schematically showing the specified contents of the time-saving random number 18 table set in the ROM of the main control device in the 18th control example, and (b) is a diagram schematically showing the specified contents of the time-saving type selection 18 table set in the ROM of the main control device in the 18th control example. [Figure 592] 18th control example (a) is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 18th control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 18th control example. [Figure 593] 18 (a) is a block diagram showing the configuration of the performance mode selection table set in the ROM of the audio lamp control device of the pachinko machine in the 18th control example, and (b) is a diagram schematically showing the specified contents of the time-saving performance mode setting A table in the 18th control example, and (c) is a diagram schematically showing the specified contents of the time-saving performance mode setting B table in the 18th control example. [Figure 594] 18 is a diagram schematically showing the specified contents of the V icon acquisition performance setting table set in the ROM of the audio lamp control device of a pachinko machine in the 18th control example. [Figure 595] 11 is a diagram showing a game flow in the 18th control example. [Figure 596] 18 is a flow chart showing an update process 18 executed by the MPU in the main control device in the 18th control example. [Figure 597] 18 is a flow chart showing a small-stop time-saving update process 18 executed by the MPU in the main control device in the 18th control example. [Figure 598] 18 is a flow chart showing a start-up winning process 18 executed by an MPU within the main control device in the 18th control example. [Figure 599] 18 is a flow chart showing a preliminary process 18 executed by an MPU within the main control device in the 18th control example. [Figure 600] 18 is a flow chart showing a command determination process 18 executed by the MPU in the audio lamp control device in the 18th control example. [Figure 601] 18 is a flow chart showing jackpot related processing 18 executed by the MPU in the audio lamp control device in the 18th control example. [Figure 602] 11 is a flow chart showing a V icon acquisition performance setting process executed by the MPU in the audio lamp control device in the 18th control example. [Figure 603] 11 is a flow chart showing ending processes executed by the MPU in the audio lamp control device in the 18th control example. [Figure 604] 18 is a flow chart showing a variation display setting process 18 executed by the MPU in the audio lamp control device in the 18th control example. [Figure 605] 18 is a flow chart showing the performance mode selection process 18 executed by the MPU in the audio lamp control device in the 18th control example. [Figure 606] 11 is a flow chart showing time-saving performance mode setting processing executed by the MPU in the audio lamp control device in the 18th control example. [Figure 607]18th control example shows an example of a V icon acquisition performance screen displayed on the third pattern display device in the first modification of the 18th control example, and (b) shows an example of a performance screen when a V icon is activated during the special chart change of a small win A winning that is displayed on the third pattern display device in the first modification of the 18th control example. [Figure 608] 18th modification of the 18th modification of the 18th modification of the 18th modification of the 18th modification of the 18th modification of the 18th exemplary icon is activated when the V icon is activated during the special chart change of the small win B winning, and (b) is an example of the V icon activation cancellation performance screen when a new V hold is acquired during the special chart change of the 18th exemplary design of the 18th exemplary design of the 18th exemplary design of the 18th exemplary design of the 18th exemplary icon is activated. [Figure 609] 18th control example (a) is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the first modification of the 18th control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the first modification of the 18th control example. [Figure 610] 14 is a diagram schematically showing the specified contents of a V icon display mode setting table set in the ROM of the audio lamp control device of a pachinko machine in the first modification of the 18th control example. [Figure 611] 10 is a flow chart showing a V icon acquisition performance setting process a executed by the MPU in the audio lamp control device in the first modification of the 18th control example. [Figure 612] 10 is a flow chart showing an ending process a executed by the MPU in the audio lamp control device in the first modification of the 18th control example. [Figure 613] 10 is a flow chart showing time-saving performance mode setting process a executed by the MPU in the audio lamp control device in the first modification of the 18th control example. [Figure 614] 11 is a front view of a pachinko machine in a modified example of the 16th control example, in which the upper body is disposed at a protruding position. [Figure 615] 16th control example (a) shows an example of a performance mode in which a jackpot notification performance of a data display device linked to the other side of the 16th control example is performed, and a jackpot start is started while the upper role is placed at the overhang position, and (b) shows an example of a performance mode in which a jackpot notification performance of a data display device linked to the other side of the other side of the other is performed, and a jackpot notification performance of a data display device linked to the other side of the other is actually reported. [Figure 616] 15 (a) is a diagram showing an example of a performance screen in the second special mode state displayed on the third design display device in the first modification of the 15th control example, and (b) is a diagram showing an example of a performance screen in the second special mode state displayed on the third design display device in the 15th control example, when the second special mode state is finished. [Figure 617] 10 is a flow chart showing a state transition fluctuation discard process executed by an MPU within the main control device in the first modification of the 15th control example. [Figure 618] 10 is a flow chart showing a second special-mode state performance setting process 15a executed by the MPU in the audio lamp control device in the first modification of the 15th control example. [Figure 619] 19 (a) and 19 (b) are diagrams showing an example of a variable display mode that is executed on the third pattern display device when the lottery results correspond to the winning of a time-saving pattern in the normal situation in the 19th control example. [Figure 620] 10A and 10B are diagrams showing an example of an additional effect executed by the third pattern display device during the chance time in the 19th control example, and (b) shows an example of an end standby effect executed when the remaining number of chance times in the 19th control example is less than 10. [Figure 621] 11 is a diagram showing an example of the opportunity time ending effect displayed on the third pattern display device in the 19th control example. [Figure 622] 10 is a diagram showing the progress of the performance mode when a special pattern lottery was selected with a time-saving pattern of 50 times in a lottery that was executed 25 times before the number of ceiling lottery was reached in the 19th control example. [Figure 623] 19 (a) and 19 (b) are diagrams showing an example of a variation display mode for showing the lottery results of the special pattern executed first after the number of ceiling lottery numbers reached in the 19th control example. [Figure 624] 6A and 6B are diagrams showing an example of the ceiling-climaxing performance displayed on the third pattern display device in the 19th control example. [Figure 625] 11 is a diagram showing an example of a ceiling-cary inciting performance that is executed after at least one time is completed based on the reach of the ceiling lottery number in the 19th control example. [Figure 626] 19th control example (a) is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the 19th control example, and (b) is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the 19th control example. [Figure 627] 14 is a diagram schematically showing the specified contents of the first random number 19 table set in the ROM of the main control device in the 19th control example. [Figure 628] 19 (a) is a block diagram showing the structure of the 19th table of variation pattern selection 19th table set in the ROM of the main control device in the 19th control example, (b) is a diagram schematically showing the specified contents of the ceiling-stimulating table in the 19th control example, and (c) is a diagram schematically showing the specified contents of the ceiling-reaching table in the 19th control example. [Figure 629] 19 (a) is a diagram schematically showing the specified contents of the time-saving type selection 19 table set in the ROM of the main control device in the 19th control example, and (b) is a diagram schematically showing the specified contents of the fluctuation pattern scenario 19 table set in the ROM of the main control device in the 19th control example. [Figure 630] 19th control example (a) is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 19th control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 19th control example. [Figure 631] 11 is a flow chart showing a ceiling determination process 19 executed by an MPU within the main control device in the 19th control example. [Figure 632] 11 is a flow chart showing the startup process executed by the MPU in the main control device in the 19th control example. [Figure 633] 11 is a flow chart showing a setting value control process executed by an MPU within the main control device in the 19th control example. [Figure 634] 11 is a flow chart showing the performance mode setting process 19 executed by the MPU in the audio lamp control device in the 19th control example. [Figure 635] 11 is a flow chart showing a normal mode performance setting process 19 executed by the MPU in the audio lamp control device in the 19th control example. [Figure 636] 11 is a flow chart showing variation pattern setting processing executed by the MPU in the audio lamp control device in the 19th control example. [Figure 637] 11 is a flow chart showing ceiling-related performance setting processing executed by the MPU in the audio lamp control device in the 19th control example. [Figure 638] 10A and 10B are diagrams showing an example of a variation display mode in which the special chart lottery result executed the first time after turning on the power involving the RAM clear operation in the 20th control example is a small win. [Figure 639] 1 is a block diagram showing the configuration of a ROM within the main control device of a pachinko machine in the 20th control example. [Figure 640] 1 is a block diagram showing the configuration of RAM in the main control device of a pachinko machine in the 20th control example. [Figure 641] 10 is a block diagram showing the structure of the variation pattern scenario 20 table set in the ROM of the main control device in the 20th control example, and (b) is a diagram schematically showing the specified contents of the winning table in the 20th control example. [Figure 642] 10A (a) is a diagram schematically showing the contents of the table for reaching the ceiling in the 20th control example, and (b) is a diagram schematically showing the contents of the table for reaching the ceiling in the 20th control example. [Figure 643] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 20th control example. [Figure 644] 10 is a flow chart showing the first special pattern variation pattern selection process 20 executed by the MPU in the main control device in the 20th control example. [Figure 645] 11 is a flow chart showing ceiling determination processing 20 executed by the MPU in the main control device in the 20th control example. [Figure 646] 10 is a flow chart showing a special diagram 1 miss-stop process 20 executed by the MPU in the main control device in the 20th control example. [Figure 647] 10 is a flow chart showing the startup process executed by the MPU in the main control device in the 20th control example. [Figure 648] 10 is a flow chart showing a jackpot termination process 20 executed by the MPU in the main control device in the 20th control example. [Figure 649] 11 is a flow chart showing a normal state performance setting process 20 executed by the MPU in the audio lamp control device in the 20th control example. [Figure 650] 10 is a flow chart showing a special diagram 1 performance mode setting process 20 executed by the MPU in the audio lamp control device in the 20th control example. [Figure 651]10 is a diagram showing an example of the performance mode performed by the third pattern display device between the end of the chance time in the 21st control example, from the time when the chance time has ended and all of the holding balls of the second special pattern that have been held at the end of the chance time have been completed, and (b) shows an example of the performance mode performed by the third pattern display device between the time when the number of special pattern lottery times has been completed in the 21st control example, from the time when the chance time has been completed, within 20 times. [Figure 652] 10 is a diagram showing an example of a performance mode when the number of ceiling lottery numbers is reached during the special mode in the 21st control example. [Figure 653] 10 is a diagram showing the progression of the performance mode after the chance time has ended in the 21st control example. [Figure 654] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the 21st control example, and (b) is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the 21st control example. [Figure 655] 10.sub.10 is a block diagram showing the configuration of the variation pattern selection 21 table set in the ROM of the main control device in the 21st control example, and (b) is a diagram schematically showing the specified contents of the time-saving end notification table in the 21st control example, and (c) is a diagram schematically showing the specified contents of the time-saving end table in the 21st control example. [Figure 656] 10.sub.2 (a) is a block diagram showing the configuration of the variation pattern scenario 21 table set in the ROM of the main control device in the 21st control example, and (b) is a diagram schematically showing the specified contents of the after-hand table in the 21st control example, and (c) is a diagram schematically showing the specified contents of the after-hand table in the 21st control example. [Figure 657] 14 is a diagram schematically showing the specified contents of the time-saving table in the 21st control example. [Figure 658] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 21st control example. [Figure 659] 12 is a flow chart showing a special pattern variation pattern selection process 21 executed by the MPU in the main control device in the 21st control example. [Figure 660] 12 is a flow chart showing an update process 21 executed by the MPU in the main control device in the 21st control example. [Figure 661] 12 is a flow chart showing ceiling determination processing 21 executed by the MPU in the main control device in the 21st control example. [Figure 662] 10 is a flow chart showing the startup process executed by the MPU in the main control device in the 21st control example. [Figure 663] 10 is a flow chart showing the performance mode setting process 21 executed by the MPU in the audio lamp control device in the 21st control example. [Figure 664] 12 is a flow chart showing ceiling-related performance setting processing 21 executed by the MPU in the audio lamp control device in the 21st control example. [Figure 665] 1 is a front view of a pachinko machine in the 22nd control example. [Figure 666] 1 is a front view of the gaming board of the pachinko machine in the 22nd control example. [Figure 667] 1 is a rear view of a pachinko machine in the 22nd control example. [Figure 668] 10 (a) is a front view of the performance button of the pachinko machine in the 22nd control example, and (b) is a front view of the selection button of the pachinko machine 10 in the 22nd control example. [Figure 669] 10A is a schematic diagram showing a case in which the decorative movable object of the pachinko machine in the 22nd control example is in a storage state, and (b) is a schematic diagram showing a case in which the decorative movable object of the pachinko machine in the 22nd control example is in a movable state. [Figure 670] 1 is an exploded front perspective view of the V winning device in the 22nd control example. [Figure 671] 1 is an operational view of the V winning device in the 22nd control example seen from the rear side. [Figure 672] 10A (a) is a diagram showing an example of a display screen during special chart fluctuation in a state in which the role displayed on the third pattern display device in the 22nd control example is stored, and (b) is a diagram showing an example of a display screen 1 in the case where the role displayed on the third pattern display device in the 22nd control example is movable and the holding color is changed. [Figure 673] 10A (a) is a diagram showing an example of a display screen 2 in which the role displayed on the third pattern display device in the 22nd control example is movable and the holding color is changed, and (b) is a diagram showing an example of a display screen 3 in which the role displayed on the third pattern display device in the 22nd control example is movable and the holding color is changed. [Figure 674] 10A and 10B are diagrams showing an example of a display screen when a character is stored after the hold color displayed on the third pattern display device in the 22nd control example is variable, and (b) shows an example of a display screen 1 in the case where the handle displayed on the third pattern display device in the 22nd control example is movable, and part of the hold color is moved to the next hold. [Figure 675] 10A and 10B are diagrams showing an example of a display screen 2 in which the role displayed on the third pattern display device in the 22nd control example is movable, and part of the holding color is moved to the next hold, and (b) shows an example of a display screen when the role is stored after the hold color displayed on the third pattern display device in the 22nd control example is changed. [Figure 676] 10A and 10B are diagrams showing an example of a display screen in which the role displayed on the third pattern display device in the 22nd control example moves and the hold pattern changes independently, and (b) shows an example of a display screen in which the role is stored after the hold color displayed on the third pattern display device in the 22nd control example changes independently. [Figure 677] 10A (a) is a diagram schematically showing the relationship between the color of the hold pattern in the 22nd control example and the expected degree of winning a jackpot, and (b) is a diagram schematically showing the variable color pattern of the hold pattern in the 22nd control example. [Figure 678] 10A (a) is a diagram showing an example of a demo screen displayed on the third pattern display device in the 22nd control example, and (b) is a diagram showing an example of a light amount adjustment screen (with a character) displayed on the third pattern display device in the 22nd control example. [Figure 679] 10A is a diagram showing an example of the adjustment end screen when the decision button displayed on the third pattern display device in the 22nd control example is operated, and (b) shows an example of the display screen in the case where special chart fluctuations start during adjustment of the amount of light displayed on the third pattern display device in the 22nd control example. [Figure 680] 10 is a diagram showing an example of a light amount adjustment screen in the prohibition of the roles displayed on the third pattern display device in the 22nd control example. [Figure 681] 10A is a diagram showing an example of a display screen displayed on the third pattern display device in the 22nd control example when the shutter close reach is started, and (b) shows an example of a display screen displayed on the third pattern display device in the 22nd control example when the shutter close reach is continued, and is shown. [Figure 682] 10A is a diagram showing an example of a display screen in the fifth stage of shutter closing reach displayed on the third pattern display device in the 22nd control example, and (b) shows an example of a display screen in the sixth stage of shutter closing reach displayed on the third pattern display device in the 22nd control example. [Figure 683] 10A is a diagram showing an example of a display screen in which a capsule is acquired in the third stage of shutter closing reach displayed on the third pattern display device in the 22nd control example, and (b) shows an example of a display screen in which a capsule is acquired in the fifth stage of shutter closing reach displayed on the third pattern display device in the 22nd control example is opened. [Figure 684] 10A is a diagram showing an example of a display screen when a branching effect is performed during the reach performance displayed on the third pattern display device in the 22nd control example, and (b) shows an example of a display screen when a button operation is performed during the branching effect displayed on the third pattern display device in the 22nd control example. [Figure 685] 10 is a diagram showing an example of a display screen at the end of a special movie when a button is not operated during the branching performance displayed on the third pattern display device in the 22nd control example. [Figure 686] 1 is a timing chart that schematically illustrates the relationship between the performance time of the special movie in the 22nd control example and the variation time of the special chart, ie (a) is a timing chart in the case where a button is not operated during the branching performance in the 22nd control example, and (b) is a timing chart in the case where a button is operated during the branching performance in the 22nd control example. [Figure 687] 1 is a block diagram showing the electrical configuration of a pachinko machine in the 22nd control example. [Figure 688] 14 is a diagram schematically showing the structure of various counters in the 22nd control example. [Figure 689] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the main control device in the 22nd control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 22nd control example. [Figure 690] 14 is a diagram schematically showing the specified contents of the first random number table set in the ROM of the main control device in the 22nd control example. [Figure 691] 12A and 2B are diagrams schematically showing the specified contents of the first per-account type selection table set in the ROM of the main control device in the 22nd control example, and (b) are diagrams schematically showing the specified contents of the second per-account random number table in the 22nd control example. [Figure 692]1. (a) is a block diagram showing the configuration of the variation pattern selection table set in the ROM of the main control device in the 22nd control example, (b) is a diagram schematically showing the specified contents of the jackpot variation pattern table in the 22nd control example, (c) is a diagram schematically showing the specified contents of the deviation (normal) variation pattern table in the 22nd control example, and (d) is a diagram schematically showing the specified contents of the deviation (special mode, time-saving) variation pattern table in the 22nd control example. [Figure 693] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 22nd control example, and FIG. 10 is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 22nd control example. [Figure 694] 10. 10A is a diagram schematically showing the specified contents of the hold-change effect lottery table set in the ROM of the audio lamp control device of the pachinko machine in the 22nd control example, and (b) is a diagram schematically showing the specified contents of the hold-color selection table set in the ROM of the audio lamp control device of the pachinko machine in the 22nd control example. [Figure 695] 14 is a diagram schematically showing the specified contents of a pending change scenario selection table set in the ROM of the audio lamp control device of a pachinko machine in the 22nd control example. [Figure 696] 10 is a diagram schematically showing the specified contents of the shutter closure reach selection table set in the ROM of the audio lamp control device of a pachinko machine in the 22nd control example. [Figure 697] 14 is a diagram schematically showing the specified contents of the operation scenario table set in the ROM of the audio lamp control device of a pachinko machine in the 22nd control example. [Figure 698] 10 is a flow chart showing timer interrupt processing executed by the MPU in the main control device in the 22nd example of control. [Figure 699] 12 is a flow chart showing special pattern variation processing 22 executed by the MPU in the main control device in the 22nd control example. [Figure 700] 10 is a flow chart showing a special pattern jackpot determination process 22 executed by the MPU in the main control device in the 22nd control example. [Figure 701] 12 is a flow chart showing a special pattern variation pattern selection process 22 executed by the MPU in the main control device in the 22nd control example. [Figure 702] 12 is a flow chart showing an update process 22 executed by the MPU in the main control device in the 22nd control example. [Figure 703] 12 is a flow chart showing a start-up winning process 22 executed by an MPU within the main control device in the 22nd control example. [Figure 704] 12 is a flow chart showing a preliminary process 22 executed by an MPU within the main control device in the 22nd control example. [Figure 705] 12 is a flow chart showing a normal pattern change process 22 executed by an MPU within the main control device in the 22nd control example. [Figure 706] 12 is a flow chart showing a through gate passing process 22 executed by an MPU within the main control device in the 22nd control example. [Figure 707] 12 is a flow chart showing an NMI interruption process 22 executed by an MPU within the main control device in the 22nd control example. [Figure 708] 12 is a flow chart showing a startup process 22 executed by an MPU within the main control device in the 22nd control example. [Figure 709] 10 is a flow chart showing main processes executed by the MPU within the main control device in the 22nd control example. [Figure 710] 12 is a flow chart showing a jackpot control process 22 executed by an MPU within the main control device in the 22nd control example. [Figure 711] 12 is a flow chart showing a jackpot operation setting process 22 executed by an MPU within the main control device in the 22nd control example. [Figure 712] 10 is a flow chart showing a jackpot termination process 22 executed by the MPU in the main control device in the 22nd control example. [Figure 713] 12 is a flow chart showing an alert process 22 executed by the MPU in the main control device in the 22nd control example. [Figure 714] 12 is a flow chart showing a winning process 22 executed by the MPU in the main control device in the 22nd control example. [Figure 715] 10 is a flow chart showing processing 22 as it is executed by the MPU in the main control device in the 22nd control example. [Figure 716] 12 is a flow chart showing a startup process 22 executed by an MPU within the main control device in the 22nd control example. [Figure 717] 10 is a flow chart showing the main processing executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 718] 12 is a flow chart showing a command determination process 22 executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 719] 12 is a flow chart showing a state command reception process 22 executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 720] 12 is a flow chart showing a winning command process 22 executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 721] 10 is a flow chart showing a special chart winning information command process 22 executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 722] 12 is a flow chart showing a hold performance setting process 22 executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 723] 12 is a flow chart showing a composite hold change effect setting process 22 executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 724] 12 is a flow chart showing a stop command process 22 executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 725] 12 is a flow chart showing jackpot related processes 22 executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 726] 12 is a flow chart showing an ending process 22 executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 727] 12 is a flow chart showing a variation display setting process 22 executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 728] 12 is a flow chart showing a variational performance setting process 22 executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 729] 12 is a flow chart showing a normal state performance mode determination process 22 executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 730] 10 is a flow chart showing a hold-out effect execution process 22 executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 731] 12 is a flow chart showing frame button input monitoring and performance processing 22 executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 732] 12 is a flow chart showing a decision button operation process 22 executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 733] 12 is a flow chart showing the performance button operation process 22 executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 734] 12 is a flow chart showing the performance update process 22 executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 735] 10 is a diagram showing an example of a display screen when the operation to change to a chance-up mode during the second half of the variable performance when the normal mode displayed on the third pattern display device in the 23rd control example is set, and (b) shows an example of a display screen when the operation to change to a chance-up mode during the first half of the variable performance when the normal mode displayed on the third pattern display device in the 22nd control example is set. [Figure 736] 10A is a diagram showing an example of a display screen in which a mode is selected during a displacement change displayed on the third pattern display device in the 23rd control example, and (b) shows an example of a display screen in which a mode is selected during a big jackpot change displayed on the third pattern display device in the 22nd control example. [Figure 737] 10A (a) is a diagram schematically showing the configuration of the performance mode selection area during the outage fluctuation in the 23rd control example, and (b) is a diagram schematically showing the configuration of the performance mode selection area during the jackpot fluctuation in the 22nd control example. [Figure 738] 11 is a diagram showing an example of a performance in which a decision button is operated to switch to the chance-up mode during the second half of the period of the change in the jackpot fluctuations displayed on the third pattern display device in the 23rd control example. [Figure 739] 10A (a) is a diagram showing an example of a display screen in which the role is moved during the special chart change displayed on the third pattern display device in the 23rd control example, and (b) is a diagram showing an example of a display screen 1 in which the role displayed on the third pattern display device in the 23rd control example is completely closed. [Figure 740] 10 is a diagram showing an example of a display screen 2 when the role displayed on the third pattern display device in the 23rd control example is completely closed. [Figure 741] 10 is a timing chart showing a flow for setting a variable performance during special chart fluctuations when a performance custom selection operation is not performed during special chart fluctuations in the 23rd control example. [Figure 742] 10 is a timing chart showing the relationship between the flow of setting the variable performance during special chart fluctuations and the performance custom selection operation when a performance custom selection operation is performed during special chart fluctuations in the 23rd control example and the performance mode is changed during special chart fluctuations. [Figure 743] 10 is a timing chart showing the relationship between the flow of setting the variable performance during special chart fluctuations in the 23rd control example and the changeover operation during special chart fluctuations when a custom performance selection operation is performed and the changeover operation is switched from the next change. [Figure 744] 1 is a block diagram showing the configuration of a ROM within the audio lamp control device of a pachinko machine in the 23rd control example. [Figure 745] 14 is a diagram schematically showing the specified contents of the performance custom information table set in the ROM of the audio lamp control device of a pachinko machine in the 23rd control example. [Figure 746] 10 is a diagram schematically showing the specified contents of the second half preview performance selection table set in the ROM of the audio lamp control device of a pachinko machine in the 23rd control example. [Figure 747] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 23rd control example. [Figure 748] 12 is a flow chart showing a hold-out effect execution process 23 executed by the MPU in the audio lamp control device in the 23rd example of control. [Figure 749] 10 is a flow chart showing the execution pending change effect setting process 23 executed by the MPU in the audio lamp control device in the 23rd example of control. [Figure 750] 10 is a flow chart showing frame button input monitoring and performance processing 23 executed by the MPU in the audio lamp control device in the 23rd control example. [Figure 751] 12 is a flow chart showing the performance custom selection process 23 executed by the MPU in the audio lamp control device in the 23rd control example. [Figure 752] 12 is a flow chart showing a decision button operation process 23 executed by the MPU in the audio lamp control device in the 23rd control example. [Figure 753] 12 is a flow chart showing a performance custom execution process 23 executed by the MPU in the audio lamp control device in the 23rd control example. [Figure 754] 12 is a flow chart showing the performance update process 23 executed by the MPU in the audio lamp control device in the 23rd control example. [Figure 755] 12 is a flow chart showing a variation effect update process 23 executed by the MPU in the audio lamp control device in the 23rd control example. [Figure 756] 1 is a rear view of a pachinko machine in the 24th control example. [Figure 757] 10A to 10B are schematic diagrams showing a procedure for performing a setting change in the 24th control example, and (e) to (g) are schematic diagrams showing a procedure for performing a setting confirmation in the 24th control example. [Figure 758] 10A is a diagram showing an example of a performance in which a character corresponding to the previous stop pattern speaks when the change of the special chart executed in the 24th control example begins, and (b) shows an example of a setting suggestion performance in which the next change begins after the pattern is stopped due to a special combination (7 reach missed) executed in the 24th control example. [Figure 759] 10A is a diagram showing an example of a display screen in which a character corresponding to a stopping pattern speaks during the demo performance executed in the 24th control example, and (b) shows an example of a display screen in which a character speaks during the voice fixation in the demo performance executed in the 24th control example. [Figure 760] 10. The figure (a) is a diagram showing an example of a pre-release color change signal display screen displayed on the third pattern display device in the 24th control example, (b) is a diagram showing an example of a pre-release color change signal display screen (when special chart is stopped) displayed on the third pattern display device in the 24th control example, (c) is a diagram showing an example of a pre-release chance display screen 1 (jump) displayed on the third pattern display device in the 24th control example, and (d) is a diagram showing an example of a pre-release chance display screen 2 (high-speed) displayed on the third pattern display device in the 24th control example. [Figure 761] 1 is a block diagram showing the electrical configuration of a pachinko machine in the 24th control example. [Figure 762] 1 is a block diagram showing the configuration of a sound output device of a pachinko machine in the 24th control example. [Figure 763] 10 is a diagram schematically showing the specified contents of a special symbolic jackpot random number table set in the ROM of the main control device of a pachinko machine in the 24th control example. [Figure 764] 1 is a block diagram showing the configuration of RAM in the main control device of a pachinko machine in the 24th control example. [Figure 765] 1 is a block diagram showing the configuration of a ROM within the audio lamp control device of a pachinko machine in the 24th control example. [Figure 766] 14 is a diagram schematically showing the specified contents of the voice command selection table set in the ROM of the voice lamp control device of the pachinko machine in the 24th control example. [Figure 767] 14 is a diagram schematically showing the specified contents of a pending action selection table set in the ROM of the audio lamp control device of a pachinko machine in the 24th control example. [Figure 768] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 24th control example. [Figure 769] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the audio output device of the pachinko machine in the 24th control example, and (b) is a block diagram showing the configuration of the RAM within the audio output device of the pachinko machine in the 24th control example. [Figure 770] 12 is a flow chart showing a startup process 24 executed by an MPU within the main control device in the 24th control example. [Figure 771] 10 is a flow chart showing a setting value control process executed by the MPU within the main control device in the 24th control example. [Figure 772] 10 is a flow chart showing a startup process 24 executed by the MPU in the audio lamp control device in the 24th control example. [Figure 773] 10 is a flow chart showing the standby process executed by the MPU in the audio lamp control device in the 24th control example. [Figure 774] 11 is a flow chart showing a command determination process 24 executed by the MPU in the main control device in the 24th control example. [Figure 775] 12 is a flow chart showing a state command reception process 24 executed by the MPU in the main control device in the 24th control example. [Figure 776] 10 is a flow chart showing a stop pattern type setting process 24 executed by the MPU in the main control device in the 24th control example. [Figure 777] 10 is a flow chart showing a stop command process 24 executed by the MPU in the main control device in the 24th control example. [Figure 778] 11 is a flow chart showing a hold-out effect execution process 24 executed by the MPU in the main control device in the 24th control example. [Figure 779] 10 is a flow chart showing a pending action determination process executed by the MPU within the main control device in the 24th control example. [Figure 780] 10 is a flow chart showing the main processing executed by the MPU in the audio output device in the 24th control example. [Figure 781] 10 is a flow chart showing command determination processing executed by the MPU in the audio output device in the 24th control example. [Figure 782] 10 is a flow chart showing audio setting processing executed by the MPU in the audio output device in the 24th control example. [Figure 783] 10A is a diagram showing an example of a display screen displayed on the third pattern display device in the 25th control example at the start of a pattern stock reach, and (b) shows an example of a display screen displayed on the third pattern display device in the 25th control example at the completion of a pattern stock. [Figure 784] 10A (a) is a diagram showing an example of a display screen in which the stock pattern displayed on the third pattern display device in the 25th control example disappears from the screen, and (b) is a diagram showing an example of a display screen in which the reach pattern is switched with the stock pattern displayed on the third pattern display device in the 25th control example. [Figure 785] 10.sub.10 (a) is a diagram schematically showing the configuration of the liquid crystal display of the third pattern display device in the 25th control example, (b) is a diagram showing an example of a display screen displayed on the spare layer of the third pattern display device in the 25th control example, (c) is a diagram showing an example of a display screen displayed on the main layer of the third pattern display device in the 25th control example, and (d) is a diagram showing an example of a display screen displayed on the secondary layer of the third pattern display device in the 25th control example. [Figure 786]10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10 [Figure 787] 1 is a block diagram showing the configuration of a ROM within the audio lamp control device of a pachinko machine in the 25th control example. [Figure 788] 10 is a diagram schematically showing the specified contents of the design stock reach selection table set in the ROM of the audio lamp control device of a pachinko machine in the 25th control example. [Figure 789] 1 is a block diagram showing the electrical configuration within the display control device of a pachinko machine in the 25th control example. [Figure 790] 14 is a diagram schematically showing an example of a drawing list in the 25th control example. [Figure 791] 10 is a flow chart showing a normal state performance mode determination process 25 executed by the MPU in the audio lamp control device in the 25th control example. [Figure 792] 10 is a flow chart showing a command determination process 25 executed by the MPU in the display control device in the 25th control example. [Figure 793] 10 is a flow chart showing processing command processing executed by the MPU in the display control device in the 25th control example. [Figure 794] 10 is a flow chart showing a drawing process 25 executed by the MPU in the display control device in the 25th control example. [Figure 795] 10A is a diagram showing an example of a display screen displayed on the third pattern display device in the 25th control example at the start of a pattern stock reach, and (b) shows an example of a display screen displayed on the third pattern display device in the 25th control example at the completion of a pattern stock. [Figure 796] 10A (a) is a diagram showing an example of a display screen in which the stock pattern displayed on the third pattern display device in the 25th control example moves, and (b) is a diagram showing an example of a display screen in which a new reach line is formed from the stock pattern displayed on the third pattern display device in the 25th control example. [Figure 797] 10A (a) is a diagram showing a game machine in a movable state of the great sword role in a modified example of the 22nd control example, and (b) is a diagram showing an example of a display screen in which special chart changes are started while adjusting the amount of light displayed on the third pattern display device in the 22nd control example. [Figure 798] 10A and 10B are diagrams showing an example of a display screen when the shutter closed reach is displayed on the third display device in a modified example of the 22nd control example when the shutter closed reach is developed in a modified example, and (b) shows an example of a display screen when the shutter closed reach is developed in a modified example of the 22nd control example. [Figure 799] 10A (a) is a diagram showing an example of a display screen when the shutter closed reach is branched out as displayed on the third display device in a modified example of the 22nd control example, and (b) is a diagram showing an example of a display screen when the shutter displayed on the third pattern display device in a modified example of the 22nd control example is fully opened. [Figure 800] 10A (a) is a diagram showing an example of a battle performance start screen displayed on the third pattern display device in the 26th control example, and (b) is a diagram showing an example of a battle performance preemptive attack screen displayed on the third pattern display device in the 26th control example. [Figure 801] 10A (a) is a diagram showing an example of a battle performance button pressing instruction screen displayed on the third pattern display device in the 26th control example, and (b) is a diagram showing an example of a battle performance button pressing instruction screen displayed on the third pattern display device in the 26th control example. [Figure 802] 11 is a diagram showing an example of a screen in which a long press of the battle performance button is displayed on the third pattern display device in the 26th control example. [Figure 803] 6A and 6B are diagrams showing an example of the flow of reducing the gauge when repeatedly pressing buttons, displayed on the third pattern display device in the 26th control example. [Figure 804] 10A and 10B are diagrams showing an example of the flow of reducing the gauge when long pressing the button, displayed on the third pattern display device, in the 26th control example. [Figure 805] 10A and 10B are diagrams showing an example of a display screen displayed on the third pattern display device in the 26th control example at the start of a defeating performance, and (b) shows an example of a first start screen displayed on the third pattern display device in the 26th control example. [Figure 806] 10A (a) is a diagram showing an example of the first attack screen displayed on the third pattern display device in the 26th control example, and (b) is a diagram showing an example of the second start screen displayed on the third pattern display device in the 26th control example. [Figure 807] 10A (a) is a diagram showing an example of the second attack screen displayed on the third pattern display device in the 26th control example, and (b) is a diagram showing an example of the third start screen displayed on the third pattern display device in the 26th control example. [Figure 808] 10 is a diagram showing an example of the third attack screen displayed on the third pattern display device in the 26th control example. [Figure 809] 10 is a diagram showing an example of a chance-up effect screen during normal fluctuations displayed on the third pattern display device in the 26th control example. [Figure 810] 10 is a diagram showing the number of special pattern changes in the 26th control example and the contents of the opportunity-up effect executed. [Figure 811] 1 is a block diagram showing the configuration of a ROM within the audio lamp control device of a pachinko machine in the 26th control example. [Figure 812] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 26th control example. [Figure 813] 10 is a diagram schematically showing the prescribed contents of a long-press performance scenario table set in the ROM of the audio lamp control device of a pachinko machine in the 26th control example. [Figure 814] 10. (a) is a diagram schematically showing the specified contents of the final HP selection table when the discrepancy is set in the ROM of the voice lamp control device of the pachinko machine in the 26th control example, and (b) is a diagram schematically showing the specified contents of the entry lottery table set in the ROM of the voice lamp control device of the pachinko machine in the 26th control example. [Figure 815] 10 is a diagram schematically showing the rules of the cancellation lottery table set in the ROM of the audio lamp control device of a pachinko machine in the 26th control example. [Figure 816] 10 is a diagram schematically showing the specified contents of the additional reduction value selection table set in the ROM of the audio lamp control device of a pachinko machine in the 26th control example. [Figure 817] 10A (a) is a diagram schematically showing the specified contents of the chance preview lottery table set in the ROM of the voice lamp control device of the pachinko machine in the 26th control example, and (b) is a diagram schematically showing the specified contents of the chance mode selection table set in the ROM of the voice lamp control device of the pachinko machine in the 26th control example. [Figure 818] 11 is a flow chart showing a variational performance setting process 26 executed by the MPU in the audio lamp control device in the 26th control example. [Figure 819] 10 is a flow chart showing a time-saving state performance mode determination process 26 executed by the MPU in the audio lamp control device in the 26th control example. [Figure 820] 10 is a flow chart showing a process for determining the special state performance mode 26 executed by the MPU in the audio lamp control device in the 26th control example. [Figure 821] 11 is a flow chart showing a normal state performance mode determination process 26 executed by the MPU in the audio lamp control device in the 26th control example. [Figure 822] 11 is a flow chart showing a defeat reach performance determination process 26 executed by the MPU in the audio lamp control device in the 26th control example. [Figure 823] 11 is a flow chart showing a chance-up performance determination process 26 executed by the MPU in the audio lamp control device in the 26th control example. [Figure 824] 11 is a flow chart showing the performance button operation process 26 executed by the MPU in the audio lamp control device in the 26th control example. [Figure 825] 11 is a flow chart showing a long-pressing performance setting process 26 executed by the MPU in the audio lamp control device in the 26th control example. [Figure 826] 11 is a flow chart showing the performance update process 26 executed by the MPU in the audio lamp control device in the 26th control example. [Figure 827] 11 is a flow chart showing a long-pressing and pressing process 26 executed by the MPU in the audio lamp control device in the 26th control example. [Figure 828] 1 is a front view schematically showing the game board of a pachinko machine in the 27th control example. [Figure 829] 6A and 6B are diagrams showing an example of the opening performance of a jackpot displayed on the third pattern display device in the 27th control example. [Figure 830] 10A (a) is a diagram showing an example of the opening performance of a jackpot displayed on the third pattern display device in the 27th control example, and (b) is a diagram showing an example of the display mode displayed on the third pattern display device during the time-saving state in the 27th control example. [Figure 831]6A and 6B are diagrams showing an example of the display mode of the third pattern display device when an additional performance of remaining time is performed during the time-saving state in the 27th control example. [Figure 832] 6A and 6B are diagrams showing an example of the display mode of the third pattern display device when the continuity rate increase effect is performed during the time-saving state in the 27th control example. [Figure 833] 6A and 6B are diagrams showing an example of the display mode of the third pattern display device when the final judgement performance is performed after the time-saving state in the 27th control example is completed. [Figure 834] 10 is a diagram showing changes over time in the performance mode after winning the jackpot in the 27th control example. [Figure 835] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the 27th control example, and FIG. 10 is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the 27th control example. [Figure 836] 17. (a) is a diagram schematically showing the specified contents of the first random number 27 table set in the ROM of the main control device in the 27th control example, (b) is a diagram schematically showing the specified contents of the second random number 27 table set in the ROM of the main control device in the 27th control example, (c) is a diagram schematically showing the specified contents of the small random number 27 table set in the ROM of the main control device in the 27th control example, and (d) is a diagram schematically showing the specified contents of the direct hit table in the 27th control example. [Figure 837] 1 is a diagram schematically showing the specified contents of the V-ac-accepted table in the 27th control example. [Figure 838] 10 is a block diagram showing the structure of the variation pattern 27 table set in the ROM of the main control device in the 27th control example, and (b) is a diagram schematically showing the specified contents of the S rank table in the 27th control example. [Figure 839] 10A (a) is a diagram schematically showing the specified contents of the A-rank table in the 27th control example, and (b) is a diagram schematically showing the specified contents of the table in the 27th control example when one change occurs after the time-saving ends. [Figure 840] 10A is a diagram schematically showing the specified contents of the normal state fluctuation pattern scenario table set in the ROM of the main control device in the 27th control example, and (b) is a diagram schematically showing the lash performance for each rank. [Figure 841] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 27th control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 27th control example. [Figure 842] 10A (a) is a diagram schematically showing the specified content of the rank-up performance table set in the ROM of the voice lamp control device of the pachinko machine in the 27th control example, and (b) is a diagram schematically showing the specified content of the rank-up determination table set in the ROM of the voice lamp control device of the pachinko machine in the 27th control example. [Figure 843] 10 is a flow chart showing the first special pattern change start process 27 executed by the MPU in the main control device in the 27th control example. [Figure 844] 10 is a flow chart showing the first special pattern determination process 27 executed by the MPU in the main control device in the 27th control example. [Figure 845] 10 is a flow chart showing the first special pattern variation pattern selection process 27 executed by the MPU in the main control device in the 27th control example. [Figure 846] 10 is a flow chart showing a special diagram 1 game state update process executed by the MPU in the main control device in the 27th control example. [Figure 847] 10 is a flow chart showing the first special pattern change stop processing 27 executed by the MPU in the main control device in the 27th control example. [Figure 848] 10 is a flow chart showing a second special pattern change start process 27 executed by the MPU in the main control device in the 27th control example. [Figure 849] 10 is a flow chart showing a second special pattern determination process 27 executed by the MPU in the main control device in the 27th control example. [Figure 850] 10 is a flow chart showing a small win lottery process 27 executed by an MPU within the main control device in the 27th example of control. [Figure 851] 10 is a flow chart showing a second special pattern variation pattern selection process 27 executed by the MPU in the main control device in the 27th control example. [Figure 852] 10 is a flow chart showing a special diagram 2 game state update process executed by the MPU in the main control device in the 27th control example. [Figure 853] 10 is a flow chart showing a second special pattern change stop process 27 executed by the MPU in the main control device in the 27th control example. [Figure 854] 10 is a flow chart showing a special diagram 2 missing stop processing 27 executed by an MPU within the main control device in the 27th control example. [Figure 855] 10 is a flow chart showing a jackpot control process 27 executed by an MPU within the main control device in the 27th control example. [Figure 856] 10 is a flow chart showing the performance update process 27 executed by the MPU in the audio lamp control device in the 27th control example. [Figure 857] 10 is a flow chart showing the final judgement performance process executed by the MPU in the audio lamp control device in the 27th control example. [Figure 858] 10 is a flow chart showing time-saving performance setting processing executed by the MPU in the audio lamp control device in the 27th control example. [Figure 859] 10 is a flow chart showing jackpot related processing 27 executed by the MPU in the audio lamp control device in the 27th control example. [Figure 860] 10 is a flow chart showing the special diagram 1 performance mode setting process 27 executed by the MPU in the audio lamp control device in the 27th control example. [Figure 861] 10 is a flow chart showing the special diagram 22 performance mode setting process 27 executed by the MPU in the audio lamp control device in the 27th control example. [Figure 862] 1 is a front view schematically showing the gaming board of a pachinko machine in the 28th control example. [Figure 863] 10A and 10B are diagrams showing an example of a display mode displayed on the third pattern display device during the special mode state in the 28th control example, and (b) shows an example of a display mode of a third pattern display device when the special pattern display device changes during the special mode state in the 28th control example when the jackpot change of special diagram 1 begins during the special mode state in the 28th control example. [Figure 864] 10. (a) is a diagram showing an example of a display mode displayed on the third pattern display device when the change time of the special chart 1 jackpot changes occurs during the special change state in the 28th control example, and (b) is a diagram showing an example of a display mode displayed on the third pattern display device when the change time of the special chart 1 jackpot changes occurs during the special change state in the 28th control example, and when the change time of the special chart 2 small pattern display device has elapsed before the change time of the special chart 1 jackpot changes has elapsed before the change time of the special chart 1 jackpot changes has elapsed. [Figure 865] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the 28th control example, and (b) is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the 28th control example. [Figure 866] 18 is a diagram schematically showing the specified contents of the first random number 28 table set in the ROM of the main control device in the 28th control example, and (b) is a diagram schematically showing the specified contents of the jackpot type selection 28 table set in the ROM of the main control device in the 28th control example, and (c) is a diagram schematically showing the specified contents of the small random number 28 table set in the ROM of the main control device in the 28th control example. [Figure 867] 10 is a block diagram showing the structure of the variation pattern 28 table set in the ROM of the main control device in the 28th control example, and (b) is a diagram schematically showing the specified contents of the special-speed and time-saving table in the 28th control example. [Figure 868] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 28th control example. [Figure 869] 10 is a flow chart showing the first special pattern change start process 28 executed by the MPU in the main control device in the 28th control example. [Figure 870] 10 is a flow chart showing the first special pattern determination process 28 executed by the MPU in the main control device in the 28th control example. [Figure 871] 10 is a flow chart showing the first special pattern variation pattern selection process 28 executed by the MPU in the main control device in the 28th control example. [Figure 872] 11 is a flow chart showing the change start update process executed by the MPU in the main control device in the 28th control example. [Figure 873] 10A and 10B are diagrams showing the timing of subtracting the number of times of time reduction in the 28th control example. [Figure 874] 10 is a flow chart showing the first special pattern change stop process 28 executed by the MPU in the main control device in the 28th control example. [Figure 875] 11 is a flow chart showing the update process when fluctuation stops executed by the MPU in the main control device in the 28th control example. [Figure 876] 11 is a flow chart showing a second special pattern change start process 28 executed by the MPU in the main control device in the 28th control example. [Figure 877] 11 is a flow chart showing a second special pattern determination process 28 executed by the MPU in the main control device in the 28th control example. [Figure 878] 11 is a flow chart showing a second special pattern change stop process 28 executed by the MPU in the main control device in the 28th control example. [Figure 879] 10 is a flow chart showing a jackpot control process 28 executed by an MPU within the main control device in the 28th control example. [Figure 880] 11 is a flow chart showing the performance update process 28 executed by the MPU in the audio lamp control device in the 28th control example. [Figure 881] 10 is a flow chart showing the special diagram 1 performance mode setting process 28 executed by the MPU in the audio lamp control device in the 28th control example. [Figure 882] 10 is a flow chart showing a special diagram 22 performance mode setting process 28 executed by the MPU in the audio lamp control device in the 28th control example. [Figure 883] 10.sub.2 (a) is a diagram showing an example of a display mode displayed on the third pattern display device when the special change state is set in the 29th control example, when the special change in the 20th control example is in the case where the special change in the 20th control example is performed when the special change in the 20th control example is performed and a pinch effect is performed when the special change in the 20th control example is performed when the special change in the 20th control example is performed and a pinch effect is performed. [Figure 884] 10 is a diagram showing an example of the display mode of the third pattern display device at the end of the pinch effect executed based on the execution of the special diagram 2 small hit fluctuation during the zone of increasing the special change ratio in the 29th control example. [Figure 885] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the 29th control example, and FIG. 10 is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the 29th control example. [Figure 886] 10 is a diagram schematically showing the specified contents of the jackpot type selection 29 table set in the ROM of the main control device in the 29th control example. [Figure 887] 10.

[0011] FIG. 10 is a block diagram showing the structure of the variation pattern 29 table set in the ROM of the main control device in the 29th control example, FIG. 10 is a diagram schematically showing the specified contents of the zone table in the 29th control example, and FIG. 10 is a diagram schematically showing the specified contents of the special-speed and time-saving table in the 29th control example. [Figure 888] 14 is a diagram schematically showing the specified contents of a variation pattern scenario table set in the ROM of the main control device in the 29th control example. [Figure 889] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 29th control example. [Figure 890] 10 is a flow chart showing the first special pattern variation pattern selection process 29 executed by the MPU in the main control device in the 29th control example. [Figure 891] 10 is a flow chart showing a jackpot control process 29 executed by an MPU within the main control device in the 29th control example. [Figure 892] 11 is a flow chart showing the performance update process 29 executed by the MPU in the audio lamp control device in the 29th control example. [Figure 893] 10 is a flow chart showing the special diagram 1 performance mode setting process 29 executed by the MPU in the audio lamp control device in the 29th control example. [Figure 894] 10 is a flow chart showing a special diagram 22 performance mode setting process 29 executed by the MPU in the audio lamp control device in the 29th control example. [Figure 895] 10A and 10B are diagrams showing an example of a display mode displayed on the third pattern display device during the special state in the 30th control example, and (b) shows an example of a display mode displayed on the third pattern display device during the time-saving state in the 30th control example. [Figure 896] 10.

[0021] FIG. 10 (a) is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the 30th control example, and FIG. 10 (b) is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the 30th control example. [Figure 897] 10 is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 30th control example. [Figure 898] 10.

[0011] FIG. 10 is a block diagram showing the configuration of the variation pattern 30 table set in the ROM of the main control device in the 30th control example, FIG. 10 is a diagram schematically showing the specified contents of the time-saving table in the 30th control example, and FIG. 10 is a diagram schematically showing the specified contents of the special change table in the 30th control example. [Figure 899] 10 is a flow chart showing the first special pattern variation pattern selection process 30 executed by the MPU in the main control device in the 30th example of control. [Figure 900] 10 is a flow chart showing a change-initiated update process 30 executed by the MPU in the main control device in the 30th control example. [Figure 901] 10 is a flow chart showing the change-stop update process 30 executed by the MPU in the main control device in the 30th example of control. [Figure 902] 10 is a flow chart showing a jackpot control process 30 executed by an MPU within the main control device in the 30th control example. [Figure 903] 10 is a flow chart showing a state command reception process 30 executed by the MPU in the audio lamp control device in the 30th control example. [Figure 904] 10.

[0021] FIG. 1 (a) is a diagram showing an example of the display mode of the third pattern display device in a time-saving state set based on the occurrence of a time-saving pattern winning during the normal state in the first modification of the 27th control example, and FIG. 1 (b) is a diagram showing an example of the display mode of the third pattern display device in a time-saving state that is reset based on the occurrence of a time-saving pattern winning during the time-saving state in a time-saving state in a first modification of the 27th control example. [Figure 905] 6A and 6B are diagrams showing an example of the display mode of the third pattern display device when a time-saving pattern winning occurs during the time-saving state in the second modification of the 27th control example. [Figure 906] 10A and 10B are diagrams showing an example of the display mode of the third pattern display device in the second modification of the 27th control example, when a rank notification performance is performed during a time-saving state that is reset based on the fact that a time-saving pattern winning has occurred during a time-saving state. [Figure 907] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the second modification of the 27th control example. [Figure 908] 10 is a flow chart showing the special diagram 2 performance mode setting process 27A executed by the MPU in the audio lamp control device in the second modification of the 27th control example. [Figure 909] 10 is a flow chart showing a secret performance setting process executed by the MPU in the audio lamp control device in the second modification of the 27th control example. [Figure 910] 10 is a flow chart showing a non-confidential performance setting process executed by the MPU in the audio lamp control device in the second modification of the 27th control example. [Figure 911] 10A (a) is a diagram showing an example of a battle performance start screen displayed on the third pattern display device in the first performance modification of the 26th control example, and (b) is a diagram showing an example of a battle performance preemptive attack screen displayed on the third pattern display device in the first performance modification of the 26th control example. [Figure 912] 10A and 10B are diagrams showing an example of display of long buttons in the first performance modification of the 26th control example. [Figure 913] 10 is a flow chart showing a time-saving state performance mode determination process 26a executed by the MPU in the audio lamp control device in the first performance modification of the 26th control example. [Figure 914] 10A (a) is a diagram showing an example of an additional performance start screen displayed on the third design display device in the second performance modification of the 26th control example, and (b) is a diagram showing an example of an additional performance starting screen displayed on the third design display device in the second performance modification of the 26th control example. [Figure 915] 10. 10A (a) is a diagram showing an example of a pseudo-MAX jackpot performance start screen displayed on the third pattern display device in the second performance modification of the 26th control example, and (b) is a diagram showing an example of a pseudo-MAX jackpot performance during the performance modification of the 26th control example, and a diagram showing an example of a pseudo-MAX jackpot performance during the performance modification of the 26th control example. [Figure 916] 10A (a) is a diagram showing an example of a pseudo-hold continuous performance start screen displayed on the third pattern display device in the second performance modification of the 26th control example, and (b) is a diagram showing an example of a pseudo-hold continuous performance during performance displayed on the third pattern display device in the second performance modification of the 26th control example. [Figure 917] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the second performance modification of the 26th control example. [Figure 918] 10 is a flow chart showing a variable performance setting process 26a executed by the MPU in the audio lamp control device in the second performance modification of the 26th control example. [Figure 919]10 is a flow chart showing jackpot related processing 26a executed by the MPU in the audio lamp control device in the second performance modification of the 26th control example. [Figure 920] 10A (a) is a diagram showing an example of a performance screen in a special state displayed on the third pattern display device in the 31st control example, and (b) is a diagram showing an example of a Jackpot performance screen in a special state displayed on the third pattern display device in the 31st control example. [Figure 921] 10 is a block diagram showing the structure of a table of variation patterns 31 for special modes that are included in the ROM in the main control device of a pachinko machine in the 31st control example. [Figure 922] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 31st control example. [Figure 923] 10 is a flow chart showing a process for determining the special state performance mode 31 executed by the MPU in the audio lamp control device in the 31st control example. [Figure 924] 1 is a front view of the pachinko machine of the 32nd control example. [Figure 925] 1 is a front view of the gaming board of the pachinko machine of the 32nd control example. [Figure 926] 1 is a partial enlarged view of the gaming board of the pachinko machine of the 32nd control example. [Figure 927] 1 is a front perspective view of the V-winning device of the 32nd control example. [Figure 928] 1 is an exploded front perspective view of the V winning device of the 32nd control example. [Figure 929] 1 is an operational view of the V-winning device of the 32nd control example seen from the rear side. [Figure 930] 10 is a schematic view of the V-window of the V-window of the V-window of the V-window of the V-window of the 32nd control example in plan viewed in a state in which the opening / closing door is closed, and (b) is a schematic view of the V-window of the V-window of the V-window of the 32nd control example in plan viewed in plan view. [Figure 931] 10A is a front view of the performance button of the pachinko machine in the 32nd control example, and (b) is a front view of the selection button of the pachinko machine in the 32nd control example. [Figure 932] 1 is a rear view of the gaming board of the pachinko machine in the 32nd control example. [Figure 933] 10A is a diagram schematically showing area division settings and effective line settings of the display screen in the 32nd control example, and (b) is a diagram illustrating an example of an actual display screen in the 32nd control example. [Figure 934] 10A (a) is a diagram showing an example of a jackpot performance screen displayed on the third pattern display device in the 32nd control example after winning the jackpot after winning the normal state, and (b) is a diagram showing an example of an enemy performance screen displayed on the third pattern display device in the 32nd control example. [Figure 935] 10A (a) is a diagram showing an example of the screen during the interval after the second round, displayed on the third pattern display device in the 32nd control example, and (b) is a diagram showing an example of the screen during the successful screen during the six rounds (final round) displayed on the third pattern display device in the 32nd control example. [Figure 936] 10A (a) is a diagram showing an example of the third round performance screen displayed on the third pattern display device in the 32nd control example, and (b) is a diagram showing an example of the display screen displayed on the third pattern display device in the 32nd control example, when a button is pressed in FIG. 936(a) displayed on the third pattern display device in the 32nd control example. [Figure 937] 10A (a) is a diagram showing an example of a display screen in which a button is not pressed in FIG. 936(a) displayed on the third pattern display device in the 32nd control example, and (b) is a diagram showing an example of a successful revival performance screen in the six rounds (final round) displayed on the third pattern display device in the 32nd control example. [Figure 938] 10A (a) is a diagram showing an example of a display screen in the time-saving state (in a rush) displayed on the third pattern display device in the 32nd control example, and (b) is a diagram showing an example of a hit screen in the time-saving state (in a rush) displayed on the third pattern display device in the 32nd control example. [Figure 939] 10A (a) is a diagram showing an example of a small-hit game screen in a time-saving state (during rush) displayed on the third pattern display device in the 32nd control example, and (b) is a diagram showing an example of a display screen in the case where V displayed on the third pattern display device in the 32nd control example is aimed and V is won during the first performance period. [Figure 940] 10 is a diagram showing an example of a display screen after the first performance period has passed since FIG. 939(b) displayed on the third pattern display device in the 32nd control example. [Figure 941] 10A is a diagram showing an example of a display screen for the final change (off) of the time-saving state (distance) displayed on the third pattern display device in the 32nd control example, and (b) shows an example of a pull-back performance screen after the time-saving state is completed, displayed on the third pattern display device in the 32nd control example. [Figure 942] 10A (a) is a diagram showing an example of a pull-back performance end screen displayed on the third pattern display device in the 32nd control example, and (b) is a diagram showing an example of a lash result display screen displayed on the third pattern display device in the 32nd control example. [Figure 943] 10. (a) is a diagram showing an example of a NEXT performance screen (2nd round of rush jackpots) displayed on the third pattern display device in the 32nd control example, and (b) is a diagram showing an example of a NEXT performance result screen (without hold consecutive or no round promotion) displayed on the third pattern display device in the 32nd control example. [Figure 944] 10A (a) is a diagram showing an example of a NEXT performance result screen (with round promotion) displayed on the third pattern display device in the 32nd control example, and (b) is a diagram showing an example of a NEXT performance result screen (with hold consecutive) displayed on the third pattern display device in the 32nd control example. [Figure 945] 10A (a) is a diagram showing an example of a small win game screen in a hold-continued state displayed on the third pattern display device in the 32nd control example, and (b) is a diagram showing an example of a NEXT performance screen in a hold-continued state displayed on the third pattern display device in the 32nd control example, and a diagram showing an example of a NEXT performance screen in a hold-continued state displayed on the third pattern display device in the 32nd control example. [Figure 946] 10 is a diagram showing an example of a display screen when the number of display rounds exceeds MAX (9 rounds) in the continuous hold sequence displayed on the third pattern display device in the 32nd control example. [Figure 947] 10A (a) is a diagram showing an example of a display screen in the standby state displayed on the third pattern display device in the 32nd control example, and (b) is a diagram showing an example of a display mode selection screen displayed on the third pattern display device in the 32nd control example. [Figure 948] 10A (a) is a diagram showing an example of a stage transition performance screen during special chart changes displayed on the third pattern display device in the 32nd control example, and (b) is a diagram showing an example of a stage fixed operation screen during special chart changes displayed on the third pattern display device in the 32nd control example. [Figure 949] 10 is a diagram showing the game flow of a pachinko machine in the 32nd control example. [Figure 950] 1 is a block diagram showing the electrical configuration of a pachinko machine in the 32nd control example. [Figure 951] 14 is a diagram schematically showing the structure of various counters in the 32nd control example. [Figure 952] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the main control device in the 32nd control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 32nd control example. [Figure 953] 1. (a) is a block diagram showing the structure of the first random number table set in the ROM of the main control device in the 32nd control example, and (b) is a diagram schematically showing the specified contents of the special symbol 1 random number table set in the ROM of the main control device in the 32nd control example, and (c) is a diagram schematically showing the specified contents of the special symbol 2 random number table set in the ROM of the main control device in the 32nd control example. [Figure 954] 10.

[0011] FIG. 10 is a block diagram showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 32nd control example, and FIG. 10 is a diagram showing the specified contents of the time-saving grant table set in the ROM of the main control device in the 32nd control example. [Figure 955] 14 is a diagram schematically showing the specified contents of a small hit type selection table set in the ROM of the main control device in the 32nd control example. [Figure 956] 10 is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the 32nd control example, and (b) is a diagram schematically showing the specified contents of the normal variation pattern table set in the ROM of the main control device in the 32nd control example. [Figure 957] 12A and 32 are diagrams schematically showing the specified contents of the time-saving fluctuation pattern table set in the ROM of the main control device in the 32nd control example, and (b) are diagrams schematically showing the specified contents of the special time-saving fluctuation pattern table set in the ROM of the main control device in the 32nd control example, and (c) are diagrams schematically showing the specified contents of the time-saving final time-saving fluctuation pattern table set in the ROM of the main control device in the 32nd control example. [Figure 958] 14 is a diagram schematically showing the specified contents of a variation pattern scenario table set in the ROM of the main control device in the 32nd control example. [Figure 959] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the audio lamp control device in the 32nd control example, and (b) is a block diagram showing the configuration of the RAM of the audio lamp control device in the 32nd control example. [Figure 960]10A (a) is a diagram schematically showing the specified contents of the defeat number selection table set in the ROM of the voice lamp control device in the 32nd control example, and (b) is a diagram schematically showing the specified contents of the defeat performance mode selection table set in the ROM of the voice lamp control device in the 32nd control example. [Figure 961] 14 is a diagram schematically showing the specified contents of the additional reduction value selection table set in the ROM of the audio lamp control device in the 32nd control example. [Figure 962] 10A (a) is a diagram schematically showing the specified contents of the performance stage data table set in the ROM of the audio lamp control device in the 32nd control example, and (b) is a diagram schematically showing the specified contents of the game environment data table set in the ROM of the audio lamp control device in the 32nd control example. [Figure 963] 10 is a flow chart showing timer interrupt processing executed by the MPU in the main control device in the 32nd control example. [Figure 964] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 32nd control example. [Figure 965] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the 32nd control example. [Figure 966] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the 32nd control example. [Figure 967] 10 is a flow chart showing a small hit start setting process executed by the MPU in the main control device in the 32nd control example. [Figure 968] 10 is a flow chart showing time-saving update processing executed by the MPU in the main control device in the 32nd example of control. [Figure 969] 10 is a flow chart showing a small-ticket time-saving update process executed by an MPU within the main control device in the 32nd example of control. [Figure 970] 10 is a flow chart showing the start-up winning process executed by the MPU in the main control device in the 32nd control example. [Figure 971] 10 is a flow chart showing a preliminary reading process executed by an MPU within the main control device in the 32nd control example. [Figure 972] 10 is a flow chart showing normal pattern variation processing executed by the MPU within the main control device in the 32nd control example. [Figure 973] 10 is a flow chart showing a process of passing through gates executed by the MPU within the main control device in the 32nd control example. [Figure 974] 10 is a flow chart showing V inlet passing processing executed by the MPU in the main control device in the 32nd control example. [Figure 975] 10 is a flow chart showing V-passing processing executed by the MPU within the main control device in the 32nd control example. [Figure 976] 10 is a flow chart showing NMI processing executed by the MPU in the main control device in the 32nd control example. [Figure 977] 10 is a flow chart showing the startup process executed by the MPU in the main control device in the 32nd control example. [Figure 978] 10 is a flow chart showing the main processing executed by the MPU within the main control device in the 32nd control example. [Figure 979] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the 32nd control example. [Figure 980] 10 is a flow chart showing small hit control processing executed by the MPU in the main control device in the 32nd control example. [Figure 981] 10 is a flow chart showing the startup process executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 982] 10 is a flow chart showing the main processing executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 983] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 984] 10 is a flow chart showing pending information-related processing executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 985] 10 is a flow chart showing status command processing executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 986] 10 is a flow chart showing hit-related processes executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 987] 10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 988] 10 is a flow chart showing an in-round performance process executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 989] 10 is a flow chart showing initial jackpot related processing executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 990] 10 is a flow chart showing a process for determining the defeat performance mode executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 991] 10 is a flow chart showing the initial jackpot round performance process executed by the MPU in the audio lamp control device in the 32nd example of control. [Figure 992] 10 is a flow chart showing the initial interval performance process executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 993] 10 is a flow chart showing small hit-related processes executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 994] 10 is a flow chart showing variation display setting processing executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 995] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 996] 10 is a flow chart showing time-saving performance setting processing executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 997] 10 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 998] 10 is a flow chart showing the update process during small-hit games executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 999] 10 is a flow chart showing frame button input monitoring and performance processing executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 1000] 10 is a flow chart showing fixed mode setting processing executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 1001] 10 is a flow chart showing the performance button operation process executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 1002] 10. (a) is a diagram showing an example of a small win game screen (in the case of special 2 hold 0) of the hold players displayed on the third pattern display device in the 33rd control example, and (b) is a diagram showing an example of a small win game screen (in the case of special 2 hold acquisition) of the hold players displayed on the third pattern display device in the 33rd control example. [Figure 1003] 10 is a flow chart showing time-saving update processing 2 executed by the MPU in the main control device in the 33rd example of control. [Figure 1004] 10 is a flow chart showing a small hit control process 2 executed by the MPU in the main control device in the 33rd example of control. [Figure 1005] 10 is a flow chart showing a small-ticket time-saving update process 2 executed by the MPU in the main control device in the 33rd example of control. [Figure 1006] 10 is a flow chart showing pending information-related processing 2 executed by the MPU in the audio lamp control device in the 33rd example of control. [Figure 1007] 10 is a flow chart showing a small hit and medium hold acquisition process executed by the MPU in the audio lamp control device in the 33rd example of control. [Figure 1008] 10 is a flow chart showing small hit-related processing 2 executed by the MPU in the audio lamp control device in the 33rd example of control. [Figure 1009] 10 is a flow chart showing a small-stop guide mode setting process executed by the MPU in the audio lamp control device in the 33rd example of control. [Figure 1010] 10. (a) is a diagram showing an example of a display screen in which a third special chart hold is obtained during the change in special chart 1 displayed on the third pattern display device in the 34th control example, and (b) is a diagram showing an example of a display screen in which only the third special chart hold pattern displayed on the third pattern display device in the 34th control example, the action is shifted. [Figure 1011] 10A and 10B are diagrams showing an example of a special diagram 1 stop display screen displayed on the third pattern display device in the 34th control example, and (b) shows an example of a special diagram 1st order change start screen displayed on the third pattern display device in the 34th control example. [Figure 1012]10.

[0021] FIG. 10A is a diagram showing an example of a hold change action display screen displayed on the third pattern display device in the 34th control example, and (b) is a diagram showing an example of a hold change display screen displayed on the third pattern display device in the 34th control example, and (c) is a diagram showing an example of a hold shift display screen displayed on the third pattern display device in the 34th control example. [Figure 1013] 10A and 10B are diagrams showing an example of a display screen before stage change when synchronizing the hold pattern action displayed on the third pattern display device in the 34th control example, and (b) shows an example of a display screen after stage change when synchronizing the hold pattern action displayed on the third pattern display device in the 34th control example. [Figure 1014] 10.

[0021] FIG. 1 (a) is a diagram showing an example of a display screen before stage change during asynchronous pending pattern action displayed on the third pattern display device in the 34th control example, and (b) is a diagram showing an example of a display screen during stage change during asynchronous pending pattern action displayed on the third pattern display device in the 34th control example, and (c) is a diagram showing an example of a display screen after stage change during asynchronous pending pattern action displayed on the third pattern display device in the 34th control example. [Figure 1015] 1 is a block diagram showing the configuration of a ROM of the audio lamp control device in the 34th control example. [Figure 1016] 14 is a diagram schematically showing the specified contents of a pending action data table set in the ROM of the main control device in the 34th control example. [Figure 1017] 1 is a block diagram showing the configuration of the RAM of the audio lamp control device in the 34th control example. [Figure 1018] 11 is a flow chart showing command determination processing 3 executed by the MPU in the audio lamp control device in the 34th control example. [Figure 1019] 10 is a flow chart showing the winning command processing 3 executed by the MPU in the audio lamp control device in the 34th control example. [Figure 1020] 11 is a flow chart showing a variation effect setting process 3 executed by the MPU in the audio lamp control device in the 34th control example. [Figure 1021] 10 is a flow chart showing a hold mode determination process 3 executed by the MPU in the audio lamp control device in the 34th control example. [Figure 1022] 11 is a flow chart showing the performance update process 3 executed by the MPU in the audio lamp control device in the 34th control example. [Figure 1023] 10 is a flow chart showing a hold-effect update process executed by the MPU in the audio lamp control device in the 34th control example. [Figure 1024] 10 is a flow chart showing a fluctuating stage transition process executed by the MPU in the audio lamp control device in the 34th control example. [Figure 1025] 10 is a flow chart showing a special mode determination process executed by the MPU in the audio lamp control device in the 34th control example. [Figure 1026] 1 is a front view of the gaming board of the pachinko machine in the 35th control example. [Figure 1027] 1 is a partial enlarged view of the gaming board of the pachinko machine in the 35th control example. [Figure 1028] 1 is a front perspective view of the V winning device in the 35th control example. [Figure 1029] 1 is an exploded front perspective view of the V winning device in the 35th control example. [Figure 1030] 1 is an operational view of the V winning device in the 35th control example seen from the rear side. [Figure 1031] 10 is a schematic view of the V-window of the V-window of the V-window of the V-window of the V-window of the 35th control example in plan viewed in a state in which the opening / closing door is closed, and (b) is a schematic view of the V-window of the V-window of the V-window of the 35th control example in plan viewed in plan view of the V-window of the V-window of the V-window of the V-window of the 35th control example in plan viewed in FIG. [Figure 1032] 10A is a schematic diagram showing the state in which the decorative movable object in the 35th control example is in the storage position, and (b) is a schematic diagram showing the state in which the decorative movable object in the 35th control example is at a lower limit. [Figure 1033] 10. (a) is a schematic diagram showing the right-centered piece of the decorative movable vehicle in the 35th control example, and (b) is a schematic diagram showing the right-centered piece of the decorative movable vehicle in the 35th control example, and the left-centered piece of the decorative movable vehicle in the 35th control example. [Figure 1034] 1 is an exploded front perspective view of the decorative movable vehicle in the 35th control example. [Figure 1035] 1 is an exploded rear perspective view of the decorative movable vehicle in the 35th control example. [Figure 1036] 1 is an exploded front perspective view of the bar function in the 35th control example. [Figure 1037] 1 is an exploded rear perspective view of the bar function in the 35th control example. [Figure 1038] 1 is an exploded front perspective view of a rotor body in the 35th control example. [Figure 1039] 1 is an exploded rear perspective view of the rotor body in the 35th control example. [Figure 1040] 10A and 10B are diagrams showing the structure of the third pattern row in the 35th control example, and (b) to (e) are diagrams schematically showing the stopping patterns of the rotary body parts in the 35th control example. [Figure 1041] 10A (a) is a diagram showing an example of a display screen when the special drawing is temporarily stopped displayed on the third pattern display device in the 35th control example, and (b) is a diagram showing an example of a display screen when the relief chance presentation is started, displayed on the third pattern display device in the 35th control example. [Figure 1042] 10A is a diagram showing an example of a case in which the relief opportunity presentation displayed on the third pattern display device in the 35th control example is successful, and (b) shows an example of a case in which the relief opportunity presentation displayed on the third pattern display device in the 35th control example is failed. [Figure 1043] 1 is a block diagram showing the electrical configuration of a pachinko machine in the 35th control example. [Figure 1044] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the audio lamp control device in the 35th control example, and (b) is a block diagram showing the configuration of the RAM of the audio lamp control device in the 35th control example. [Figure 1045] 10.

[0011] FIG. 10 is a block diagram showing the configuration of the four tables of variation pattern selection set in the ROM of the audio lamp control device in the 35th control example, and FIG. 10 is a diagram schematically showing the specified contents of the four tables of variation pattern selection set in the ROM of the audio lamp control device in the 35th control example. [Figure 1046] 10.

[0011] FIG. 1 (a) is a diagram schematically showing the specified contents of the time-saving variation pattern selection table set in the ROM of the voice lamp control device in the 35th control example, and (b) is a diagram schematically showing the specified contents of the special time-saving variation pattern selection table set in the ROM of the voice lamp control device in the 35th control example, and (c) is a diagram schematically showing the specified contents of the time-saving final time-saving variation pattern selection table set in the ROM of the voice lamp control device in the 35th control example. [Figure 1047] 14 is a diagram schematically showing the specified contents of the operation scenario selection table set in the ROM of the audio lamp control device in the 35th control example. [Figure 1048] 10A (a) is a diagram showing the specified contents of operation scenario A (bar function up and down drive) set in the ROM of the audio lamp control device in the 35th control example, and (b) is a diagram showing the specified contents of operation scenario A (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 35th control example. [Figure 1049] 10A (a) is a diagram showing the specified contents of operation scenario B (bar function up and down drive) set in the ROM of the audio lamp control device in the 35th control example, and (b) is a diagram showing the specified contents of operation scenario B (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 35th control example. [Figure 1050] 10A is a diagram showing the specified contents of operation scenario C (bar function up and down drive) set in the ROM of the voice lamp control device in the 35th control example, and (b) is a diagram showing the specified contents of operation scenario C (rotary body function left and right drive, rotation drive) set in the ROM of the voice lamp control device in the 35th control example. [Figure 1051] 10A and 10B are diagrams showing the specified contents of operation scenario D (bar function up and down drive) set in the ROM of the audio lamp control device in the 35th control example, and (b) schematically illustrates the specified contents of operation scenario D (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 35th control example. [Figure 1052] 10A (a) is a diagram showing the specified contents of operation scenario E (bar function up and down drive) set in the ROM of the audio lamp control device in the 35th control example, and (b) is a diagram showing the specified contents of operation scenario E (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 35th control example. [Figure 1053] 10A and 10B are diagrams showing the specified contents of operation scenario F (bar function up and down drive) set in the ROM of the audio lamp control device in the 35th control example, and (b) schematically illustrates the specified contents of operation scenario F (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 35th control example. [Figure 1054]10A and 10B are diagrams showing the specified contents of operation scenario G (bar function up and down drive) set in the ROM of the voice lamp control device in the 35th control example, and (b) schematically illustrates the specified contents of operation scenario G (rotary body function left and right drive, rotation drive) set in the ROM of the voice lamp control device in the 35th control example. [Figure 1055] 10A and 10B are diagrams showing the specified contents of operation scenario H (bar function up and down drive) set in the ROM of the voice lamp control device in the 35th control example, and (b) schematically illustrates the specified contents of operation scenario H (rotary body function left and right drive, rotation drive) set in the ROM of the voice lamp control device in the 35th control example. [Figure 1056] 10 is a flow chart showing the main processing executed by the MPU in the audio lamp control device in the 35th control example. [Figure 1057] 11 is a flow chart showing command determination processing 4 executed by the MPU in the audio lamp control device in the 35th control example. [Figure 1058] 11 is a flow chart showing a design determination command process 4 executed by the MPU in the audio lamp control device in the 35th control example. [Figure 1059] 10 is a flow chart showing a variation display setting process 4 executed by the MPU in the audio lamp control device in the 35th control example. [Figure 1060] 10 is a flow chart showing the performance mode setting process 4 executed by the MPU in the audio lamp control device in the 35th control example. [Figure 1061] 10 is a flow chart showing the me-liquid crystal performance execution management process 4 executed by the MPU in the audio lamp control device in the 35th control example. [Figure 1062] 10 is a flow chart showing the relief opportunity presentation start process executed by the MPU in the audio lamp control device in the 35th control example. [Figure 1063] 10 is a flow chart showing a process during execution of a special scenario executed by an MPU in the audio lamp control device in the 35th control example. [Figure 1064] 10 is a flow chart showing a process during execution of a relief opportunity performance executed by the MPU in the audio lamp control device in the 35th control example. [Figure 1065] 10A (a) is a diagram showing an example of a display screen at the start of relief opportunity presentation displayed on the third pattern display device in the first modification of the 35th control example, and (b) is a diagram showing an example of a display screen at the successful successful relief opportunity presentation displayed on the third pattern display device in the first modification of the 35th control example. [Figure 1066] 1 is a front view of the gaming board of the pachinko machine in the 36th control example. [Figure 1067] 1 is a front view of the decorative movable vehicle operating unit in the 36th control example. [Figure 1068] 10A is a schematic diagram of the operating unit of the logo character in the 36th control example, and (b) is a schematic diagram of the operating unit of the A logo character in the 36th control example. [Figure 1069] 1 is a schematic diagram of an operating unit of a shutter function in the 36th control example. [Figure 1070] 10 is a diagram showing a state in which the logo function in the 36th control example is at a lower limit. [Figure 1071] 10 is a diagram showing a right-centered one-piece drop in the logo function in the 36th control example. [Figure 1072] 10 is a diagram showing the right-centered piece drop and left-handed piece drop of the logo character in the 36th control example. [Figure 1073] 10 is a diagram showing a state in which the atomic object is at an elevation limit in the 36th control example. [Figure 1074] 10 is a diagram showing the closed state of the shutter function in the 36th control example. [Figure 1075] 10 is a diagram showing a case in which all the decorative movable elements in the 36th control example are in a movable state. [Figure 1076] 1 is an exploded front perspective view of the logo function in the 36th control example. [Figure 1077] 1 is an exploded rear perspective view of the logo function in the 36th control example. [Figure 1078] 1 is an exploded front perspective view of the bar function in the 36th control example. [Figure 1079] 1 is an exploded rear perspective view of the bar function in the 36th control example. [Figure 1080] 1 is an exploded front perspective view of a rotor body in the 36th control example. [Figure 1081] 1 is an exploded rear perspective view of the rotor body in the 36th control example. [Figure 1082] 1 is an exploded front perspective view of the operating unit of the atomic object in the 36th control example. [Figure 1083] 1 is an exploded rear perspective view of the operating unit of the atomic object in the 36th control example. [Figure 1084] 1 is an exploded front perspective view of the rising role in the 36th control example. [Figure 1085] 1 is an exploded rear perspective view of the rising body in the 36th control example. [Figure 1086] 1 is an exploded front perspective view of the operating unit of the shutter function in the 36th control example. [Figure 1087] 1 is an exploded front perspective view of the shutter function in the 36th control example. [Figure 1088] 1 is an exploded rear perspective view of the shutter function in the 36th control example. [Figure 1089] 10.sub.3 (a) is a diagram showing an example of a display screen after 3 seconds has elapsed since the start of the composite performance of the normal pattern displayed on the third pattern display device in the 36th control example, and (b) is a diagram showing an example of a display screen after 5 seconds has elapsed since the start of the composite performance of the normal pattern displayed on the third pattern display device in the 36th control example. [Figure 1090] 10. (a) is a diagram showing an example of a display screen after 7 seconds has passed since the start of the composite performance of the normal pattern displayed on the third pattern display device in the 36th control example, and (b) is a diagram showing an example of a display screen after 3 seconds has passed since the start of the performance when the composite performance is started during the reach performance displayed on the third pattern display device in the 36th control example. [Figure 1091] 10. (a) is a diagram showing an example of a display screen after 5 seconds has passed since the start of the compound performance of the alternative pattern 1 displayed on the third pattern display device in the 36th control example, and (b) is a diagram showing an example of a display screen after 7 seconds has passed since the start of the compound performance of the alternative pattern 1 displayed on the third pattern display device in the 36th control example. [Figure 1092] 10.sub.3 (a) is a diagram showing an example of a display screen after 3 seconds has elapsed since the start of the compound performance of the alternative pattern 2 displayed on the third pattern display device in the 36th control example, and (b) is a diagram showing an example of a display screen after 5 seconds has elapsed since the start of the compound performance of the alternative pattern 2 displayed on the third pattern display device in the 36th control example. [Figure 1093] 10 is a diagram showing an example of a display screen after 7 seconds have passed since the start of the composite performance of the alternative pattern 2 displayed on the third pattern display device in the 36th control example. [Figure 1094] 10 is a timing chart when a complex performance is performed during the pre-reach performance period in the 36th control example. [Figure 1095] 10 is a timing chart when a compound performance of alternative pattern 1 is performed during the reach performance period in the 36th control example. [Figure 1096] 10 is a timing chart when a compound performance of alternative pattern 2 is performed during the reach performance period in the 36th control example. [Figure 1097] 1 is a block diagram showing the electrical configuration of a pachinko machine in the 36th control example. [Figure 1098] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the main control device in the 36th control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 36th control example. [Figure 1099] 10.

[0011] FIG. 10 is a block diagram showing the configuration of the 5 tables for selecting variation patterns set in the ROM of the audio lamp control device in the 36th control example, and FIG. 10 is a diagram schematically showing the specified contents of the 5 tables for selecting variation patterns set in the ROM of the audio lamp control device in the 36th control example. [Figure 1100] 16A and 36th control example are diagrams schematically showing the specified contents of the time-saving variation pattern selection 5 table set in the ROM of the voice lamp control device in the 36th control example, and (b) schematically shows the specified contents of the special time-saving variation pattern selection 5 table set in the ROM of the voice lamp control device in the 36th control example, and (c) schematically shows the specified contents of the time-saving final time-saving variation pattern selection 5 table set in the ROM of the voice lamp control device in the 36th control example. [Figure 1101] 10A is a diagram showing the specified contents of the combined performance operation scenario table (bar function up and down drive) set in the ROM of the audio lamp control device in the 36th control example, and (b) is a diagram showing the specified contents of the combined performance operation scenario table (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 36th control example. [Figure 1102] 10A is a diagram showing the specified contents of the combined performance operation scenario table (a-bearing up and down drive) set in the ROM of the audio lamp control device in the 36th control example, and (b) is a diagram showing the specified contents of the combined performance operation scenario table (a-bearing left and right drive) set in the ROM of the audio lamp control device in the 36th control example. [Figure 1103]10A and 10B are diagrams showing the specified contents of the first alternative operation scenario table (bar function up and down drive) set in the ROM of the audio lamp control device in the 36th control example, and (b) schematically illustrates the specified contents of the first alternative operation scenario table (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 36th control example. [Figure 1104] 10A and 10B are diagrams showing the specified contents of the first alternative performance operation scenario table (a-bearing up and down drive) set in the ROM of the audio lamp control device in the 36th control example, and (b) schematically illustrates the specified contents of the first alternative operation scenario table (a-bearing left and right drive) set in the ROM of the audio lamp control device in the 36th control example. [Figure 1105] 10A and 10B are diagrams showing the specified contents of the second alternative operation scenario table (bar function up and down drive) set in the ROM of the audio lamp control device in the 36th control example, and (b) schematically illustrates the specified contents of the second alternative operation scenario table (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 36th control example. [Figure 1106] 10A is a diagram showing the specified contents of the second alternative performance operation scenario table (a-bearing up and down drive) set in the ROM of the audio lamp control device in the 36th control example, and (b) is a diagram showing the specified contents of the second alternative operation scenario table (a-bearing left and right drive) set in the ROM of the audio lamp control device in the 36th control example. [Figure 1107] 10 is a flow chart showing the main processing executed by the MPU in the audio lamp control device in the 36th control example. [Figure 1108] 11 is a flow chart showing a variation display setting process 5 executed by the MPU in the audio lamp control device in the 36th control example. [Figure 1109] 10 is a flow chart showing the performance mode setting process 5 executed by the MPU in the audio lamp control device in the 36th control example. [Figure 1110] 10 is a flow chart showing a me-liquid crystal performance execution management process 5 executed by the MPU in the audio lamp control device in the 36th control example. [Figure 1111] 10 is a flow chart showing a composite performance start process executed by the MPU in the audio lamp control device in the 36th control example. [Figure 1112] 10 is a flow chart showing first operation processing executed by the MPU in the audio lamp control device in the 36th control example. [Figure 1113] 10 is a flow chart showing second operation processing executed by the MPU in the audio lamp control device in the 36th control example. [Figure 1114] 10 is a flow chart showing the movable role processing executed by the MPU in the audio lamp control device in the 36th control example. [Figure 1115] 10A (a) is a diagram showing an example of a combined performance of a geisha performance and a character role executed by the third design display device in the first modification of the 36th control example, and (b) is a diagram showing an example of a display screen during the geisha performance being executed, which is displayed on the third design display device in the first modification of the 36th control example. [Figure 1116] 10A (a) is a diagram showing a case in which the character role in the first modification of the 36th control example is movable, and (b) is a diagram showing a case in which the character role in the first modification of the 36th control example is movable. [Figure 1117] 10A (a) is a diagram showing an example of a composite performance in which the character role is placed on the front side of the key role displayed on the third pattern display device in the first modification of the 36th control example, and (b) is a diagram showing an example of a composite performance in which the character role is placed on the back side of the key role displayed on the third pattern display device in the first modification of the 36th control example. [Figure 1118] 1 is a block diagram showing the configuration of a ROM of the main control device in the 37th control example. [Figure 1119] 1 is a block diagram showing the configuration of the RAM of the main control device in the 37th control example. [Figure 1120] 10.sub.10 is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the 37th control example, and (b) is a diagram schematically showing the specified contents of the normal variation pattern 1 table set in the ROM of the main control device in the 37th control example. [Figure 1121] 10A (a) is a diagram schematically showing the specified contents of the normal variation pattern 2 table set in the ROM of the main control device in the 37th control example, and (b) is a diagram schematically showing the specified contents of the normal variation pattern 3 table set in the ROM of the main control device in the 37th control example. [Figure 1122] 10A (a) is a diagram schematically showing the specified contents of the time-saving variation pattern 1 table set in the ROM of the main control device in the 37th control example, and (b) is a diagram schematically showing the specified contents of the time-saving variation pattern 2 table set in the ROM of the main control device in the 37th control example. [Figure 1123] 14 is a diagram schematically showing the specified contents of the time-saving variation pattern 3 table set in the ROM of the main control device in the 37th control example. [Figure 1124] 1. (a) is a block diagram showing the configuration of a state transition table set in the ROM of the main control device in the 37th control example, (b) is a diagram schematically showing the specified contents of the state transition 1 table set in the ROM of the main control device in the 37th control example, (c) is a diagram schematically showing the specified contents of the state transition 2 table set in the ROM of the main control device in the 37th control example, and (d) is a diagram schematically showing the specified contents of the state transition 3 table set in the ROM of the main control device in the 37th control example. [Figure 1125] 1. (a) is a diagram schematically showing the specified contents of the state transition 4 table set in the ROM of the main control device in the 37th control example, and (b) is a diagram schematically showing the specified contents of the state transition 5 table set in the ROM of the main control device in the 37th control example, and (c) is a diagram schematically showing the specified contents of the state transition 6 table set in the ROM of the main control device in the 37th control example. [Figure 1126] 10 is a diagram schematically showing the specified contents of the jackpot transition setting table set in the ROM of the main control device in the 37th control example. [Figure 1127] 10 is a flow chart showing special pattern variation processing 8 executed by the MPU in the main control device in the 37th control example. [Figure 1128] 10 is a flow chart showing a special pattern variation pattern selection process 8 executed by the MPU in the main control device in the 37th example of control. [Figure 1129] 10 is a flow chart showing the number of variation subtraction process executed by the MPU in the main control device in the 37th example of control. [Figure 1130] 10 is a block diagram showing the configuration of the variation pattern selection table set in the ROM of the main control device in the 38th control example, and (b) is a diagram schematically showing the specified contents of the normal main variation pattern table set in the ROM of the main control device in the 38th control example. [Figure 1131] 10A (a) is a diagram schematically showing the specified contents of the time-saving main fluctuation pattern table set in the ROM of the main control device in the 38th control example, and (b) is a diagram schematically showing the specified contents of the normal-saving main fluctuation pattern table set in the ROM of the main control device in the 38th control example. [Figure 1132] 1 is a block diagram showing the configuration of the RAM of the main control device in the 38th control example. [Figure 1133] 14 is a block diagram showing the configuration of a variation time counter set in the RAM of the main control device in the 38th control example. [Figure 1134] 11 is a flow chart showing special pattern variation processing 9 executed by the MPU in the main control device in the 38th control example. [Figure 1135] 11 is a flow chart showing a special pattern variation pattern selection process 9 executed by the MPU in the main control device in the 38th example of control. [Figure 1136] 10 is a flow chart showing a variation time update process executed by the MPU in the main control device in the 38th control example. [Figure 1137] 10A (a) is a diagram showing an example of a display screen during the third pattern change displayed on the third pattern display device in the 39th control example, and (b) is a diagram showing an example of a display screen when the delayed performance is started, displayed on the third pattern display device in the 39th control example. [Figure 1138] 10A (a) is a diagram showing an example of a display screen for the expansion performance displayed on the third pattern display device in the 39th control example, and (b) is a diagram showing an example of a display screen for the horizontal rotation performance displayed on the third pattern display device in the 39th control example. [Figure 1139] 1 is a block diagram showing the configuration of a ROM of the audio lamp control device in the 39th control example. [Figure 1140] 14 is a diagram schematically showing the specified contents of the chance mode selection table set in the ROM of the audio lamp control device in the 39th control example. [Figure 1141] 10 is a flow chart showing a variation effect setting process 10 executed by the MPU in the audio lamp control device in the 39th control example. [Figure 1142] 10 is a flow chart showing normal performance setting processing executed by the MPU in the audio lamp control device in the 39th control example. [Figure 1143]10 is a flow chart showing variation pattern command processing 10 executed by the MPU in the audio lamp control device in the 39th control example. [Figure 1144] 14 is an explanatory diagram showing the structure of a box pattern displayed on the third pattern display device in the 39th control example. [Figure 1145] 10A (a) is a diagram showing the correspondence between box patterns and numerical patterns in the 39th control example, and (b) is a diagram showing the numerical pattern sequence display pattern in the 39th control example. [Figure 1146] 6A to 6B are diagrams showing an example of the symbol data set in the numerical symbol sequence in the 39th control example. [Figure 1147] 10A (a) is a diagram showing an example of a display screen displayed on the third pattern display device in the 39th control example when the missed pattern is stopped, and (b) is a diagram showing an example of a display screen showing a horizontal rotation effect displayed on the third pattern display device in the 39th control example. [Figure 1148] 10 is a diagram showing an example of the ending screen of a jackpot game displayed on the third pattern display device in the 39th control example. [Figure 1149] 1 is a front view of the gaming board of the pachinko machine of the 40th control example. [Figure 1150] 10A is a diagram showing an example of the performance mode when a time-saving pattern winning occurs in the normal state of the 40th control example, and (b) shows an example of the performance mode for the chance-time standby performance that is executed during the period from when the second time-saving pattern in the 40th control example is shifted to when the hold ball of the first special pattern is extracted. [Figure 1151] 10 is a diagram showing an example of the performance mode when 10 times of time savings are notified in the chance time standby performance of the 40th control example, and (b) shows an example of the performance mode when a hold ball with the first special pattern is selected as a big jackpot during the execution period of the chance time standby performance of the 40th control example. [Figure 1152] 10 is a diagram showing an example of the performance mode of the variable display performance when winning a normal map B during the chance time in the 40th control example, and (b) shows an example of the performance mode of the first suggestive performance that is executed during the game of the 40th control example when winning a normal map B during the chance time in the 40th control example. [Figure 1153] 6A and 6B are diagrams showing an example of the performance mode of the variable display performance corresponding to the second special pattern in the 40th control example. [Figure 1154] 10A and 10B are diagrams showing an example of the performance mode of the second suggestion performance performed during the small-hit game of the second special pattern in the 40th control example, and (b) shows an example of the performance mode set during the lash state in the 40th control example. [Figure 1155] 6A and 6B are diagrams showing an example of the performance mode when the through gate passes during the lash state in the 40th control example. [Figure 1156] 10 is a diagram showing the progression of performance modes before and after chance times in the 40th control example. [Figure 1157] 6A and 6B are diagrams showing the correspondence between the state of the special pattern during the chance time in the 40th control example and the state of the ordinary pattern. [Figure 1158] 10 is a diagram showing a method for transitioning between each game state in the 40th control example. [Figure 1159] 10.

[0031] FIG. 10 is a block diagram showing the configuration of the ROM of the main control device in the 40th control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 40th control example. [Figure 1160] 10. (a) is a diagram schematically showing the specified contents of the special pattern 1 random number table in the 40th control example, (b) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the 40th control example, and (c) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 40th control example. [Figure 1161] 10. (a) is a diagram schematically showing the specified contents of the second random number table set in the ROM of the main control device in the 40th control example, and (b) is a block diagram showing the configuration of the variation pattern selection table set in the ROM of the main control device in the 40th control example, and (c) is a diagram schematically showing the specified contents of the normal table in the 40th control example. [Figure 1162] 10A (a) is a diagram schematically showing the specified contents of the time-saving table in the 40th control example, and (b) is a diagram schematically showing the specified contents of the time-saving table in the 40th control example. [Figure 1163] 10. (a) is a diagram schematically showing the specified contents of the small-stop type selection table set in the ROM of the main control device in the 40th control example, (b) is a diagram schematically showing the specified contents of the time-saving type selection table set in the ROM of the main control device in the 40th control example, and (c) is a diagram schematically showing the specified contents of the ordinary-stop type selection table set in the ROM of the main control device in the 40th control example. [Figure 1164] 10.

[0044] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 40th control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 40th control example. [Figure 1165] 10 is a diagram schematically showing the specified contents of the standby performance selection table set in the ROM of the audio lamp control device of the pachinko machine in the 40th control example. [Figure 1166] 10 is a flow chart showing special pattern variation processing 40 executed by the MPU in the main control device in the forty-third control example. [Figure 1167] 10 is a flow chart showing a special pattern determination process 40 executed by the MPU in the main control device in the forty-third control example. [Figure 1168] 10 is a flow chart showing a missed process 40 executed by an MPU within the main control device in the forty-third control example. [Figure 1169] 10 is a flow chart showing a special pattern variation pattern selection process 40 executed by the MPU in the main control device in the forty-third control example. [Figure 1170] 10 is a flow chart showing a miss-time type determination process 40 executed by the MPU in the main control device in the forty-thousand example. [Figure 1171] 10 is a flow chart showing a time-saving update process 40 executed by an MPU within the main control device in the forty-third control example. [Figure 1172] 10 is a flow chart showing a normal pattern variation process 40 executed by an MPU within the main control device in the forty-third control example. [Figure 1173] 10 is a flow chart showing the processing for when a normal chart is executed by the MPU in the main control device in the 40th control example, and (b) shows the processing for determining the third termination condition executed by the MPU in the main control device in the 40th control example. [Figure 1174] 10 is a flow chart showing a command determination process 40 executed by the MPU in the audio lamp control device in the forty-fourth control example. [Figure 1175] 10 is a flow chart showing a state command process 40 executed by the MPU in the audio lamp control device in the forty-third control example. [Figure 1176] 10 is a flow chart showing a standby performance setting process executed by the MPU in the audio lamp control device in the forty-fourth control example. [Figure 1177] 10 is a flow chart showing jackpot related processing 40 executed by the MPU in the audio lamp control device in the forty-third control example. [Figure 1178] 10 is a flow chart showing a small hit-related process 40 executed by the MPU in the audio lamp control device in the forty-third control example. [Figure 1179] 10 is a flow chart showing a command processing per-picture executed by an MPU in the audio lamp control device in the 40th control example. [Figure 1180] 10 is a flow chart showing a variational performance setting process 40 executed by the MPU in the audio lamp control device in the forty-fourth control example. [Figure 1181] 10 is a flow chart showing the performance setting process during chance time executed by the MPU in the audio lamp control device in the 40th control example. [Figure 1182] 10 is a flow chart showing the performance update process 40 executed by the MPU in the audio lamp control device in the forty-third control example. [Figure 1183] 1 is a front view of the gaming board of the pachinko machine of the 41st control example. [Figure 1184] 10A is a diagram showing an example of the performance mode in which the 41st control example moves to the time-saving state A after the first hit, and (b) shows an example of the performance mode in which the first change display of the second special pattern is started in the time-saving state A. [Figure 1185] 11. FIG. 10A is a diagram showing an example of a performance mode in which, after the first hit in the 41st control example, the set number of hold balls for the second special symbol is accumulated and the time-saving end condition is satisfied. FIG. 10B is a diagram showing an example of a performance mode in which the second special symbol is displayed in the first time after the time-saving state B is set in the 41st control example. [Figure 1186] 10A is a diagram showing an example of the performance mode when the MAX bonus is won in the 41st control example, and (b) shows an example of the performance mode for the simulated interval performance that is executed during the time-saving state C in the 41st control example. [Figure 1187]10 is a diagram showing the correspondence between the trends in the performance mode after the first hit in the 41st control example and the state of the second special pattern. [Figure 1188] 10 is a diagram showing the progression of the performance mode from the time when the time-saving limit count is reached in the 41st control example, and the time-saving limit is reached and the normal mode B is moved. [Figure 1189] 10 is a diagram showing a method for transitioning between each game state in the 41st control example. [Figure 1190] 11. FIG. 10A is a block diagram showing the configuration of the ROM of the main control device in the 41st control example, and FIG. 10B is a block diagram showing the configuration of the RAM of the main control device in the 41st control example. [Figure 1191] 11. (a) is a diagram schematically showing the specified contents of the special pattern 1 random number table in the 41st control example, (b) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the 41st control example, and (c) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 41st control example. [Figure 1192] 11. (a) is a diagram schematically showing the specified contents of the second random number table set in the ROM of the main control device in the 41st control example, and (b) is a block diagram showing the configuration of the variation pattern selection table set in the ROM of the main control device in the 41st control example, and (c) is a diagram schematically showing the specified contents of the normal table in the 41st control example. [Figure 1193] 11. (a) is a diagram schematically showing the specified contents of the time-saving table in the 41st control example, and (b) is a diagram schematically showing the specified contents of the MAX bonus table in the 41st control example. [Figure 1194] 11. (a) is a diagram schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the 41st control example, and (b) is a diagram schematically showing the specified contents of the small-jack type selection table set in the ROM of the main control device in the 41st control example. [Figure 1195] 10.

[0044] FIG. 10 is a block diagram showing the configuration of a ROM within the audio lamp control device of a pachinko machine in the 41st control example, and (b) is a diagram schematically showing the specified contents of the attack icon selection table set in the ROM of the audio lamp control device of a pachinko machine in the 41st control example. [Figure 1196] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 41st control example. [Figure 1197] 10 is a flow chart showing a special pattern determining process 41 executed by the MPU in the main control device in the 41st control example. [Figure 1198] 10 is a flow chart showing a special pattern variation pattern selection process 41 executed by the MPU in the main control device in the 41st control example. [Figure 1199] 10 is a flow chart showing a time-saving update process 41 executed by the MPU in the main control device in the 41st control example. [Figure 1200] 10 is a flow chart showing a small-ticket time-saving update process 41 executed by the MPU in the main control device in the 41st control example. [Figure 1201] 10 is a flow chart showing a start-up winning process 41 executed by an MPU within the main control device in the 41st control example. [Figure 1202] 10 is a flow chart showing a processing for determining the number of pending balls executed by the MPU in the main control device in the 41st control example. [Figure 1203] 10 is a flow chart showing a normal pattern variation process 41 executed by an MPU within the main control device in the 41st control example. [Figure 1204] 12 is a flow chart showing a V-passing process 41 executed by an MPU within the main control device in the 41st control example. [Figure 1205] 10 is a flow chart showing a jackpot control process 41 executed by an MPU within the main control device in the 41st control example. [Figure 1206] 10 is a flow chart showing a jackpot end process 41 executed by an MPU in the main control device in the 41st control example. [Figure 1207] 10 is a flow chart showing a command determination process 41 executed by the MPU in the audio lamp control device in the 41st control example. [Figure 1208] 10 is a flow chart showing a winning information command process 41 executed by the MPU in the audio lamp control device in the 41st control example. [Figure 1209] 10 is a flow chart showing jackpot related processes 41 executed by the MPU in the audio lamp control device in the 41st control example. [Figure 1210] 10 is a flow chart showing an ending command process 41 executed by the MPU in the audio lamp control device in the 41st control example. [Figure 1211] 10 is a flow chart showing a variational performance setting process 41 executed by the MPU in the audio lamp control device in the 41st control example. [Figure 1212] 10 is a diagram showing a method for transitioning between game states in the first modification of the 41st control example. [Figure 1213] 1 is a block diagram showing the configuration of the RAM of the main control device in the first modification of the 41st control example. [Figure 1214] 10A (a) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the first modification of the 41st control example, and (b) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the first modification of the 41st control example. [Figure 1215] 10A and 10B are diagrams schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the first modification of the 41st control example. [Figure 1216] 6A and 6B are diagrams showing an example of a performance mode in which the second modification of the 41st control example is shifted to the time-saving state A after the first hit. [Figure 1217] 10A and 10B show an example of the performance mode when the time-saving mode or pull-back mode is switched in the second modification of the 41st control example, and (b) shows an example of the performance mode when the hit-variation performance is performed in the time-saving state C, just before the time-saving limit count is reached after the time-saving mode is switched to the MAX bonus mode in the second modification of the 41st control example. [Figure 1218] 10 is a diagram showing correspondence between displaying a change in a normal pattern, a game of winning a normal pattern, and a display of a special pattern in a second modification of the 41st control example in a time-saving state; [Figure 1219] 10 is a diagram showing a method for transitioning between the game states in the second modification of the 41st control example. [Figure 1220] 10A (a) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the second modification of the 41st control example, and (b) is a diagram schematically showing the specified contents of the second random number table set in the ROM of the main control device in the second modification of the 41st control example. [Figure 1221] 14 is a diagram schematically showing the specified contents of the normal table in the second modification of the 41st control example. [Figure 1222] 10A (a) is a diagram schematically showing the specified contents of the time-saving table in the second modification of the 41st control example, and (b) is a diagram schematically showing the specified contents of the MAX bonus table in the second modification of the 41st control example. [Figure 1223] 14 is a diagram schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the second modification of the 41st control example. [Figure 1224] 10 is a flow chart showing special pattern variation processing 41B executed by the MPU in the main control device in the second modification of the 41st control example. [Figure 1225] 10 is a flow chart showing a special pattern determining process 41B executed by the MPU in the main control device in the second modification of the 41st control example. [Figure 1226] 10 is a flow chart showing a miss-time process 41B executed by an MPU within the main control device in the second modification of the 41st control example. [Figure 1227] 10 is a flow chart showing a special pattern variation pattern selection process 41B executed by the MPU in the main control device in the second modification of the 41st control example. [Figure 1228] 10 is a flow chart showing the miss-time type determination process 41B executed by the MPU in the main control device in the second modification of the 41st control example. [Figure 1229] 10 is a flow chart showing the normal pattern variation process 41B executed by the MPU in the main control device in the second modification of the 41st control example. [Figure 1230] 10 is a flow chart showing a variational performance setting process 41B executed by the MPU in the audio lamp control device in the second modification of the 41st control example. [Figure 1231] 10 is a flow chart showing the performance update process 41B executed by the MPU in the audio lamp control device in the second modification of the 41st control example. [Figure 1232] 6A and 6B are diagrams showing an example of the performance mode of the remaining stock performance performed in a jackpot game other than the first hit in the 42nd control example. [Figure 1233] 10A (a) is a diagram showing an example of the performance mode at the time when a lash is started in the 42nd control example, and (b) is a diagram showing an example of the performance mode at the time when a reach occurs during the lash in the 42nd control example. [Figure 1234]10A is a diagram showing an example of the performance mode in which a non-V small win is selected during the lashing of the 42nd control example, and (b) shows an example of the performance mode in which a non-V small win is selected during the lashing of the 42nd control example, when the remaining portions corresponding to all non-V small wins become zero. [Figure 1235] 6A and 6B are diagrams showing an example of the performance mode of the remaining recovery performance that is executed when the remaining increase condition is satisfied during the lashing in the 42nd control example. [Figure 1236] 10A is a diagram showing an example of the performance mode during which the reserved special chart 2 after the rush is completed in the 42nd control example, and (b) shows an example of the performance mode when a hold of the hold has been acquired after the start of the final time-saving fluctuation in the 42nd control example. [Figure 1237] 10 is a diagram showing an example of a performance mode in the invincible mode in the 42nd control example. [Figure 1238] 10 is a diagram showing a method for transitioning between the game states in the 42nd control example. [Figure 1239] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the main control device in the 42nd control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 42nd control example. [Figure 1240] 12A and 12B are diagrams schematically showing the specified contents of the special pattern 2 random number table in the 42nd control example, and 12B are diagrams schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 42nd control example. [Figure 1241] 10A is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the 42nd control example, and (b) is a diagram schematically showing the specified contents of the normal table in the 42nd control example. [Figure 1242] 12A and 12B are diagrams schematically showing the specified contents of the time-saving table in the 42nd control example, and (b) are diagrams schematically showing the specified contents of the time-saving final fluctuation table in the 42nd control example. [Figure 1243] 14 is a diagram schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the 42nd control example. [Figure 1244] 14 is a diagram schematically showing the specified contents of the small hit type selection table set in the ROM of the main control device in the 42nd control example. [Figure 1245] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 42nd control example. [Figure 1246] 12 is a flow chart showing a special pattern variation pattern selection process 42 executed by the MPU in the main control device in the 42nd control example. [Figure 1247] 12 is a flow chart showing a time-saving update process 42 executed by the MPU in the main control device in the 42nd control example. [Figure 1248] 12 is a flow chart showing ceiling determination processing 42 executed by the MPU in the main control device in the 42nd control example. [Figure 1249] 10 is a flow chart showing a small-ticket time-saving update process 42 executed by the MPU in the main control device in the 42nd example of control. [Figure 1250] 12 is a flow chart showing a variational performance setting process 42 executed by the MPU in the audio lamp control device in the 42nd control example. [Figure 1251] 12 is a flow chart showing time-saving performance setting processing 42 executed by the MPU in the audio lamp control device in the 42nd control example. [Figure 1252] 10 is a flow chart showing non-V small hit processing executed by the MPU in the audio lamp control device in the 42nd control example. [Figure 1253] 1 is a front view of the gaming board of the pachinko machine of the 43rd control example. [Figure 1254] 10A (a) is a diagram showing an example of a performance screen in the advantageous mode displayed on the third pattern display device in the 43rd control example, and (b) is a diagram showing an example of a performance screen in the disadvantage mode displayed on the third pattern display device in the 43rd control example. [Figure 1255] 10. [00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 [Figure 1256] 10. 10 is a diagram showing an example of a performance screen when a time-saving B (time-saving) is selected during the normal mode displayed on the third pattern display device in the 43rd control example, and (b) shows an example of a performance screen when a time-saving B (time-saving) is selected during the advantageous mode displayed on the third pattern display device in the 43rd control example. [Figure 1257] 6A and 6B are diagrams showing an example of the performance during the remaining reserved period after the time-saving pattern is stopped, displayed on the third pattern display device in the 43rd control example. [Figure 1258] 10A (a) is a diagram showing an example of a time-saving performance screen displayed on the third pattern display device in the 43rd control example, and (b) is a diagram showing an example of a time-saving performance screen displayed on the third pattern display device in the 43rd control example, when a small win is won while the time-saving performance screen displayed on the third pattern display device in the 43rd control example. [Figure 1259] 10A is a diagram showing an example of a performance screen during ceiling reaching fluctuations in the normal mode displayed on the third pattern display device in the 43rd control example, and (b) shows an example of a performance screen during ceiling reaching fluctuations in the advantageous mode displayed on the third pattern display device in the 43rd control example. [Figure 1260] 10 is a diagram showing a method for transitioning between each game state in the 43rd control example. [Figure 1261] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the main control device in the 43rd control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 43rd control example. [Figure 1262] 1. (a) is a diagram schematically showing the specified contents of the special pattern 1 random number 43 table in the 43rd control example, and (b) is a diagram schematically showing the specified contents of the special pattern 2 random number 43 table in the 43rd control example, and (c) is a diagram schematically showing the specified contents of the jackpot type selection 43 table set in the ROM of the main control device in the 43rd control example. [Figure 1263] 10 is a block diagram showing the configuration of the variation pattern selection table set in the ROM of the main control device in the 43rd control example, and (b) is a diagram schematically showing the specified contents of the normal 43 table in the 43rd control example. [Figure 1264] 14 is a diagram schematically showing the specified contents of the time-saving 43 table in the 43rd control example. [Figure 1265] 14 is a diagram schematically showing the specified contents of the time-saving grant 43 table set in the ROM of the main control device in the 43rd control example. [Figure 1266] 10A (a) is a diagram schematically showing the specified contents of the small-same-type selection table set in the ROM of the main control device in the 43rd control example, and (b) is a diagram schematically showing the specified contents of the time-saving type selection table set in the ROM of the main control device in the 43rd control example. [Figure 1267] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 43rd control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 43rd control example. [Figure 1268] 10 is a diagram schematically showing the specified contents of the background mode selection table set in the ROM of the audio lamp control device of the pachinko machine in the 43rd control example. [Figure 1269] 10 is a diagram schematically showing the specified contents of the performance pattern selection table set in the ROM of the audio lamp control device of the pachinko machine in the 43rd control example. [Figure 1270] 10 is a flow chart showing special pattern variation processing 43 executed by the MPU in the main control device in the 43rd example of control. [Figure 1271] 10 is a flow chart showing a special pattern determination process 43 executed by the MPU in the main control device in the 43rd example of control. [Figure 1272] 12 is a flow chart showing a missed process 43 executed by an MPU within the main control device in the 43rd example of control. [Figure 1273] 10 is a flow chart showing a special pattern variation pattern selection process 40 executed by the MPU in the main control device in the 43rd example of control. [Figure 1274] 10 is a flow chart showing a miss-time type determination process 40 executed by the MPU in the main control device in the 43rd example of control. [Figure 1275] 10 is a flow chart showing a time-saving update process 43 executed by an MPU within the main control device in the 43rd example of control. [Figure 1276] 12 is a flow chart showing the ceiling update process 43 executed by the MPU in the main control device in the 43rd example of control. [Figure 1277] 12 is a flow chart showing a command determination process 43 executed by the MPU in the audio lamp control device in the 43rd control example. [Figure 1278] 12 is a flow chart showing a state command process 43 executed by the MPU in the audio lamp control device in the 43rd example of control. [Figure 1279] 12 is a flow chart showing a standby performance setting process 43 executed by the MPU in the audio lamp control device in the 43rd example of control. [Figure 1280]12 is a flow chart showing a variational performance setting process 43 executed by the MPU in the audio lamp control device in the 43rd control example. [Figure 1281] 4 is a flow chart showing the time-saving pattern winning performance setting process executed by the MPU in the audio lamp control device in the 43rd example of control. [Figure 1282] 10 is a flow chart showing the time-saving pattern determination process for performance executed by the MPU in the audio lamp control device in the 43rd control example. [Figure 1283] 12 is a flow chart showing the performance update process 43 executed by the MPU in the audio lamp control device in the 43rd control example. [Figure 1284] 1 is a front view of the gaming board of the pachinko machine of the 44th control example. [Figure 1285] 10A (a) is a diagram showing an example of a time-saving, per-time fluctuation screen displayed on the third pattern display device in the 44th control example, during which time-saving, during which time-saving, is not reached, and (b) is a diagram showing an example of a time-saving, per-time fluctuation screen displayed on the third pattern display device in the 44th control example, during which time-saving, per-time fluctuation screen displayed on the third pattern display device in the 44th control example. [Figure 1286] 10A (a) is a diagram showing an example of a performance screen during the simulated left-handed play displayed on the third pattern display device in the 44th control example (difference chart 2 is changing), and (b) is a diagram showing an example of a performance screen indicating that the time-saving state has ended during the simulated left-handed play displayed on the third pattern display device in the 44th control example. [Figure 1287] 1 is a block diagram showing the configuration of a ROM of the main control device in the 44th control example. [Figure 1288] 1 is a block diagram showing the configuration of the RAM of the main control device in the 44th control example. [Figure 1289] 14 is a block diagram showing the structure of a variation pattern selection table set in the ROM of the main control device in the 44th control example. [Figure 1290] 14 is a diagram schematically showing the specified contents of the normal state fluctuation pattern 44 table in the 44th control example. [Figure 1291] 14 is a diagram schematically showing the specified contents of the time-saving state fluctuation pattern 44 table in the 44th control example. [Figure 1292] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 44th control example. [Figure 1293] 10 is a flow chart showing special pattern variation processing 44 executed by the MPU in the main control device in the 44th control example. [Figure 1294] 10 is a flow chart showing the first special pattern change start process 44 executed by the MPU in the main control device in the 44th control example. [Figure 1295] 10 is a flow chart showing the first special pattern determination process 44 executed by the MPU in the main control device in the 44th control example. [Figure 1296] 10 is a flow chart showing the first special pattern variation pattern selection process 44 executed by the MPU in the main control device in the 44th control example. [Figure 1297] 14 is a flow chart showing a special diagram 1 time-saving lottery process 44 executed by the MPU in the main control device in the 44th control example. [Figure 1298] 12 is a flow chart showing a game state update process 44 executed by the MPU in the main control device in the 44th control example. [Figure 1299] 10 is a flow chart showing a first special pattern change execution process 44 executed by the MPU in the main control device in the 44th control example. [Figure 1300] 10 is a flow chart showing the first special pattern variation stop processing 44 executed by the MPU in the main control device in the 44th control example. [Figure 1301] 10 is a flow chart showing the special diagram 1 forced stopping process 44 executed by the MPU in the main control device in the 44th control example. [Figure 1302] 12 is a flow chart showing a time-saving setting process 44 executed by the MPU in the main control device in the 44th control example. [Figure 1303] 10 is a flow chart showing a second special pattern change start process 44 executed by the MPU in the main control device in the 44th control example. [Figure 1304] 10 is a flow chart showing a second special pattern determination process 44 executed by the MPU in the main control device in the 44th control example. [Figure 1305] 10 is a flow chart showing a small win lottery process 44 executed by an MPU within the main control device in the 44th control example. [Figure 1306] 10 is a flow chart showing a second special pattern variation pattern selection process 44 executed by the MPU in the main control device in the 44th control example. [Figure 1307] 10 is a flow chart showing a second special pattern change execution process 44 executed by the MPU in the main control device in the 44th control example. [Figure 1308] 10 is a flow chart showing a second special pattern change stop process 44 executed by the MPU in the main control device in the 44th control example. [Figure 1309] 10 is a flow chart showing a forced stopping process 44 of Special Diagram 2 executed by the MPU in the main control device in the 44th control example. [Figure 1310] 10 is a flow chart showing a special diagram 2 small hit stop process 44 executed by the MPU in the main control device in the 44th control example. [Figure 1311] 10 is a flow chart showing a jackpot control process 44 executed by an MPU within the main control device in the 44th control example. [Figure 1312] 10 is a flow chart showing a jackpot termination process 44 executed by the MPU in the main control device in the 44th control example. [Figure 1313] 10 is a flow chart showing a time-saving limit update process 44 executed by the MPU in the main control device in the 44th control example. [Figure 1314] 12 is a flow chart showing a variational performance setting process 44 executed by the MPU in the audio lamp control device in the 44th control example. [Figure 1315] 10 is a flow chart showing a special diagram 2 variational performance setting process executed by the MPU in the audio lamp control device in the 44th control example. [Figure 1316] 10 is a flow chart showing a special diagram 1 variational performance setting process executed by the MPU in the audio lamp control device in the 44th control example. [Figure 1317] 10. 10 is a diagram showing an example of a performance screen when a time-saving A1 (once-time-saving) is won during normal mode displayed on the third pattern display device in the 45th control example, and (b) shows an example of a performance screen (when a time-saving A2 is won) in the high accuracy mode displayed on the third pattern display device in the 45th control example. [Figure 1318] 10. 10 is a diagram showing an example of a performance screen when the time-saving group A is won in the high accuracy mode displayed on the third pattern display device in the 45th control example, and (b) shows an example of a performance screen (internal second time-saving remaining 20 times) displayed on the high accuracy mode displayed on the third pattern display device in the 45th control example, and FIG. [Figure 1319] 10 is a diagram showing an example of a high accuracy mode transition screen displayed on the third pattern display device in the 45th control example when the screen is out of normal mode. [Figure 1320] 10A and 10B are diagrams showing the flow of games and performance in the 45th control example. [Figure 1321] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 45th control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 45th control example. [Figure 1322] 10 is a diagram schematically showing the specified contents of the second performance pattern selection table set in the ROM of the audio lamp control device of the pachinko machine in the 45th control example. [Figure 1323] 10 is a diagram schematically showing the specified contents of the ceiling information selection table set in the ROM of the audio lamp control device of the pachinko machine in the 45th control example. [Figure 1324] 10 is a flow chart showing a command determination process 45 executed by the MPU in the audio lamp control device in the 45th control example. [Figure 1325] 10 is a flow chart showing a determination command process 45 executed by the MPU in the audio lamp control device in the 45th control example. [Figure 1326] 10 is a flow chart showing a variational performance setting process 45 executed by the MPU in the audio lamp control device in the 45th control example. [Figure 1327] 10 is a flow chart showing a second performance pattern setting process executed by the MPU in the audio lamp control device in the 45th control example. [Figure 1328] 10 is a flow chart showing a ceiling information notification setting process 45 executed by the MPU in the audio lamp control device in the 45th control example. [Figure 1329] 1 is a front view of the gaming board of the pachinko machine of the 46th control example. [Figure 1330] 10A (a) is a diagram showing an example of a performance screen in the chance zone displayed on the third pattern display device in the 46th control example, and (b) is a diagram showing an example of a performance screen in the case where left-handed-handed, in the chance zone displayed on the third pattern display device in the 46th control example, is passed thr...

Claims

1. A ball entry means through which a game ball can be entered; a control setting means for setting one of a plurality of controls including at least a first control and a second control that makes it easier for the game ball to enter the ball entry means than the first control, based on the establishment of a predetermined setting condition; a switching means for switching from the second control to the first control based on the establishment of a predetermined specific condition in a state in which the second control is set, A gaming machine characterized in that, in a predetermined gaming state set by the second control, playing using a first gaming method is more likely to result in a higher degree of advantage than playing using a second gaming method different from the first gaming method.

2. A gaming machine as described in claim 1, characterized in that in the first gaming state in which the second control is set, the period until the specific condition is met is more likely to be longer when playing using the second gaming method than when playing using the first gaming method.

3. a game state setting means for setting one of a plurality of game states including at least the first game state and a second game state in which at least the second control is set and which is different from the first game state, based on the establishment of a first setting condition; The first gaming state is configured such that playing a game using the first gaming method is more likely to result in a higher degree of advantage than playing a game using the second gaming method, 3. The gaming machine according to claim 2, characterized in that the second gaming state is configured such that playing using the second gaming method is more likely to result in a higher degree of advantage than playing using the first gaming method.

4. A state having a lower degree of advantage than the first gaming state can be formed based on the specific condition being established in the first gaming state, 4. The gaming machine according to claim 3, wherein a state that is more advantageous than the second gaming state can be created based on the specific condition being met in the second gaming state.

5. The game machine includes a launching means capable of launching the game ball in any one of a plurality of directions including at least a first direction and a second direction different from the first direction, The ball entry means is provided at a position where it is difficult for a game ball launched in the first direction to enter the ball hole and where it is possible for a game ball launched in the second direction to enter the ball hole, the first gaming method is a gaming method of shooting a gaming ball in the first direction, 5. The gaming machine according to claim 1, wherein the second gaming method is a gaming method of shooting a gaming ball in the second direction.

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