Direction for wide-angle intra-prediction

Abstract

A method and apparatus for using wide-angle intra prediction because rectangular blocks allow for larger prediction angles. Wide-angle intra prediction allows for intra prediction direction angles beyond the traditional 45 degrees and -135 degrees. In one embodiment, when a video block being coded or decoded is non-square, additional intra prediction directions are enabled in the direction of the longer block edges, allowing for more reference samples to be utilized along the edges. An index is used to indicate the prediction direction, and the index is adapted according to the additional intra prediction in the longer direction, with correspondingly fewer prediction directions being used along the shorter block edges. This keeps the number of prediction modes that need to be indexed and allows their angles to correspond to the shape of the block.

Description

Technical Field

[0001] At least one of the embodiments generally relates to methods or apparatus for video encoding or decoding, compression or decompression.

Background Art

[0002] To achieve high compression efficiency, image and video coding schemes typically utilize prediction, including motion vector prediction, and transform to exploit spatial and temporal redundancies within video content. Generally, intra or inter prediction is used to exploit intra or inter-frame correlations, and then the difference between the original image and the predicted image, often called the prediction error or prediction residual, is transformed, quantized, and entropy coded. To reconstruct the video, the compressed data is decoded by an inverse process corresponding to entropy coding, quantization, transform, and prediction.

[0003] In the development of the Versatile Video Coding (VVC) standard, a larger number of intra coding modes are utilized.

Summary of the Invention

Problems to be Solved by the Invention

[0004] Relates to methods or apparatus for video encoding or decoding, compression or decompression.

Means for Solving the Problems

[0005] At least one of the embodiments generally relates to methods or apparatus for video encoding or decoding, and more particularly, to methods or apparatus for interaction between a maximum transform size and a transform coding tool in a video encoder or a video decoder.

[0006] According to a first aspect, a method is provided. The method includes the steps of predicting a sample of a rectangular video block using at least one of N reference samples from the upper row of the rectangular video block or at least one of M reference samples from the left column of the rectangular video block, wherein the reference samples are based on a number of wide angles that increases in proportion to the aspect ratio of the rectangular block, and encoding the rectangular video block using the prediction in an intra-encoding mode.

[0007] A second aspect provides a method for predicting a sample of a rectangular video block using at least one of N reference samples from the upper row of the rectangular video block or at least one of M reference samples from the left column of the rectangular video block, wherein the reference samples are based on a number of wide angles that increases in proportion to the aspect ratio of the rectangular block; and a step of decoding the rectangular video block using the prediction in an intra-encoding mode.

[0008] In another embodiment, an apparatus is provided. The apparatus comprises a processor. The processor can be configured to encode blocks of video or decode a bitstream by performing one of the methods described above.

[0009] A device is provided comprising an apparatus according to one embodiment of decoding, and at least one of the following: (i) an antenna configured to receive a signal, the signal including a video block; (ii) a band limiter configured to limit the received signal to a bandwidth of frequencies including the video block; or (iii) a display configured to display an output representing the video block.

[0010] According to another general aspect of at least one embodiment, a non-temporary computer-readable medium containing data content generated according to any of the described encoding embodiments or variations is provided.

[0011] According to another general aspect of at least one embodiment, a signal is provided which includes video data generated according to any of the described encoding embodiments or variations.

[0012] According to another general aspect of at least one embodiment, the bitstream is formatted to include data content generated according to any of the described encoding embodiments or variations.

[0013] According to another general aspect of at least one embodiment, a computer program product is provided which, when the program is executed by a computer, includes instructions causing the computer to execute one of the described decoding embodiments or variations.

[0014] These and other aspects, features, and advantages of the general embodiment will become apparent from the following detailed description of the exemplary embodiment, which should be read in conjunction with the accompanying drawings. [Brief explanation of the drawing]

[0015] [Figure 1] (a) Mode 35 and Mode 36 replace Mode 2 and Mode 3, respectively, and (b) Wide-angle prediction directions with 65 directions labeled from 02 to 66 angles. [Figure 2] (a) A diagram of a W=2H block where the starting angle is slightly below the second diagonal and the ending angle is slightly above it, and (b) an example of a reference array on the left that requires a small expansion. [Figure 3] This diagram illustrates an example of a block with H=2W, where (a) the starting angle is slightly above the second diagonal and the ending angle is slightly below it, and (b) the upper reference array requires a small extension. [Figure 4] This figure shows a standard, general-purpose video compression scheme. [Figure 5] This diagram shows a standard and general-purpose video decompression scheme. [Figure 6] This figure shows an exemplary processor-based subsystem that implements a generally described embodiment. [Figure 7] This figure shows one embodiment of the method under the described aspect. [Figure 8] This figure shows another embodiment of the method under the described aspect. [Figure 9] This figure shows an exemplary apparatus under the described embodiment. [Modes for carrying out the invention]

[0016] The embodiments described herein are in the field of video compression and generally relate to video compression, as well as video encoding and decoding. At least one of these embodiments relates more specifically to video encoding and decoding relating to transform coding of intra-predictive residuals, in which enhanced multiple transforms and / or quadratic transforms are used in combination with wide-angle intra-prediction.

[0017] To achieve high compression efficiency, image and video coding schemes typically leverage spatial and temporal redundancy within video content by utilizing prediction, including motion vector prediction, and transformation. Generally, intra or inter-frame prediction is used to leverage intra or inter-frame correlation, and then the difference between the original image and the predicted image, often called the prediction error or prediction residual, is transformed, quantized, and entropy-encoded. To reconstruct the video, the compressed data is decoded by the reverse process, corresponding to entropy encoding, quantization, transformation, and prediction.

[0018] In the HEVC (High Efficiency Video Coding, ISO / IEC 23008-2, ITU-T H.265) video compression standard, motion-compensated temporal prediction is utilized to exploit the redundancy existing between consecutive pictures of a video.

[0019] To do so, motion vectors are associated with each prediction unit (PU). Each coding tree unit (CTU) is represented by a coding tree within the compressed region. This is a quadtree partitioning of the CTU, and each leaf is called a coding unit (CU).

[0020] After that, each CU is given some intra or inter prediction parameters (prediction information). To do so, it is spatially divided into one or more prediction units (PU), and each PU is assigned some prediction information. The intra or inter coding mode is assigned at the CU level.

[0021] In the JVET (Joint Video Exploration Team) proposal for a new video compression standard, known as the Joint Exploration Model (JEM), it has been proposed to accept a quadtree-binary tree (QTBT) block partitioning structure for high compression performance. A block in a binary tree (BT) can be divided into two sub-blocks of equal size by splitting it horizontally or vertically at the center. As a result, BT blocks can have a rectangular shape with unequal width and height, unlike the blocks in QT where the block always has a square with equal height and width. In HEVC, the angular intra prediction directions are defined over 180 degrees from 45 degrees to -135 degrees, and they are maintained in JEM, making the definition of the angular direction independent of the target block shape.

[0022] To encode these blocks, intra-prediction is used to provide an estimated version of the block using previously reconstructed neighboring samples. The difference between the source block and the prediction is then encoded. In the classic codec described above, a single line of reference samples is used on the left and above the current block.

[0023] In HEVC (High Efficiency Video Coding, H.265), the encoding of frames in a video sequence is based on a quadtree (QT) block partitioning structure. Frames are divided into square coding tree units (CTUs), which are all subjected to quadtree-based partitioning into multiple coding units (CUs) based on a rate-distortion (RD) criterion. Each CU is intra-predicted, i.e., spatially predicted from its causative neighboring CUs, or inter-predicted, i.e., temporally predicted from an already decoded reference frame. In I-slices, all CUs are intra-predicted, while in P-slices and B-slices, CUs can be predicted both intra- and inter-. For intra-prediction, HEVC defines 35 prediction modes, including one planar mode (indexed as mode 0), one DC mode (indexed as mode 1), and 33 angular modes (indexed as modes 2-34). The angular mode is associated with the prediction direction, ranging from 45 degrees to -135 degrees in a clockwise direction. Since HEVC supports a quadtree (QT) block partitioning structure, all prediction units (PUs) have a square shape. Therefore, the definition of prediction angles from 45 degrees to -135 degrees is reasonable in terms of PU (prediction unit) shape. For a target prediction unit of size N × N pixels, the top reference array and left reference array each have 2N+1 samples of size, and are required to cover the aforementioned angular range for all target pixels. Given that the height and width of the PU are of equal length, it also makes sense that the lengths of the two reference arrays are equal.

[0024] For the next generation of video encoding standards, JVET's attempt as a Joint Research Model (JEM) proposes using 65 angle-intra-prediction modes in addition to planar and DC modes. However, the prediction direction is defined over the same angular range, i.e., from 45 degrees to -135 degrees clockwise. For a target block of size W×H pixels, the upper and left reference arrays are each of size (W+H+1) pixels, and are required to cover the aforementioned angular range for all target pixels. This definition of angles in JEM was done for simplification rather than for any other particular reason. However, in doing so, some inefficiencies were introduced. In recent research, wide-angle intra-prediction has been proposed, which allows for intra-prediction direction angles higher than the conventional 45 degrees.

[0025] Figure 1 shows the wide-angle prediction directions. Here, modes 35 and 36 have replaced modes 2 and 3, respectively (a). Note that in Figure 1, the arrows point to the opposite direction associated with either mode. Note that in this figure, the angles are labeled from 02 to 34, which correspond to the angle names before the adoption of 65 prediction directions in the VVC software. Currently, there are 65 directions (b), and the angles are labeled from 02 to 66.

[0026] Wide-Angle Intra Prediction (WAIP) was adopted for use in the next-generation multi-purpose video compression (VVC) standard, also known as H.266. WAIP refers to the use of additional prediction directions beyond the usual 45-degree and -135-degree ranges used in intra-prediction. When the target block is rectangular, depending on the block shape, several normal prediction directions are replaced by an equal number of wide-angle directions in the opposite direction. In VVC / H.266, up to 10 wide-angle directions can be used, resulting in 20 wide-angle directions beyond the usual 45-degree to -135-degree range for prediction directions. To support these wide-angle directions, the Reference Array Length is appropriately defined.

[0027] One problem with the adopted WAIP is that the defined wide angles are derived from existing normal angles. These normal angles are optimized for square block shapes but not for rectangular blocks. As a result, the angles defined for rectangular blocks are not aligned along the diagonals. Depending on the rectangular block shape, the diagonals may deviate by some small amount from these directions. The problem with this is that the required length of the reference array is not exactly twice the length of the corresponding side of the block. On the smaller side of the block, the reference array is longer than twice the side length. The length of the smaller extension is a function of the block shape. Furthermore, when the number of wide angles is limited to 10, as adopted in VVC / H.266[1], the extension length may be large for rectangular blocks with aspect ratios of 8, 16, and 32. This disclosure provides several methods such that extension on the smaller side is not required when the number of wide angles is not limited to 10.

[0028] The general aspects described propose several methods for unifying the design of intra-prediction directions for square and rectangular blocks. It aims to use angles appropriate to the shape of rectangular blocks, rather than angles simply derived from the case of square blocks. Thus, the range of prediction directions extends precisely along the second diagonal of the target block. This design requires that the lengths of the top and left reference arrays be exactly twice the lengths of the corresponding sides of the target block. Therefore, if the number of wide angles is expanded from 20 to 28 (14 per side), the small expansion required on the smaller side is not needed. This aligns it with intra-prediction without WAIP, where the total number of reference samples on the top and left sides is equal to twice the sum of the height and width of the target block. If the number of wide angles is limited to 10, as adopted in VVC / H.266, rectangular blocks with aspect ratios of 8:1, 16:1, and 32:1 still require the expansion on the smaller side of the references to support the defined prediction directions.

[0029] Wide-angle intra-prediction (WAIP) was adopted for use in the next-generation multi-purpose video compression (VVC) standard, also known as H.266. WAIP refers to the use of additional predictive directions beyond the usual 45-degree and -135-degree ranges used in intra-prediction. When the target block is rectangular, depending on the block shape, several normal predictive directions are replaced by an equal number of wide-angle directions in the opposite direction. Thus, when the target block is flat, i.e., its width is greater than its height, several horizontal directions close to 45 degrees are replaced by an equal number of vertical directions greater than -135 degrees. Similarly, when the target block is tall, i.e., its height is greater than its width, several vertical directions close to -135 degrees are replaced by several horizontal directions greater than 45 degrees. This is illustrated in Figure 1, where 35 angular modes are used, as in the early versions of VVC (also in HEVC). In the current version of VVC, the number of angle modes between 45 and -135 degrees has increased to 65. Note that in Figure 1, the arrows point in the opposite direction associated with each mode.

[0030] In VVC / H.266, up to 10 wide-angle directions can be used, resulting in 20 wide-angle directions beyond the usual 45 to -135 degree range for prediction directions. Therefore, the total number of angle modes used is 85 (=65+20), of which only 65 are used for a given target block. If the target block is square-shaped, the usual 65 modes between 45 and -135 degrees are used for prediction.

[0031] Two problems exist with the current WAIP specification. The first problem stems from the fact that the defined wide angle is derived from an existing angle that is optimized for a square block shape. As a result, the predicted angle for a rectangular block is not optimized with respect to the length of the reference array in the same way that the original angle is for a square block. This is illustrated in Figures 2 and 3.

[0032] In the example in Figure 2, W = 2H. In (a) for the flat block, the starting angle (normal) is slightly below the second diagonal, and the ending angle (wide angle) is slightly above it. In (b), the left reference array requires a small extension (shown as Ext).

[0033] In the example in Figure 3, H = 2W. In (a) for the tall block, the starting angle (wide angle) is slightly above the second diagonal, and the ending angle (normal) is slightly below it. In (b), the upper reference array requires a small extension (shown as Ext).

[0034] The start and end angles for rectangular blocks are slightly offset from the second diagonal. For flat rectangular blocks, the start angle has an intraPredAngle equal to (32 × H / W) + 1 (also called angle parameter A), and the end angle has an intraPredAngle equal to round(1024 / ((32 × H / W) + 1)), corresponding to an inverse angle. Similarly, for tall rectangular blocks, the end angle has an intraPredAngle equal to (32 × H / W) + 1, and the start angle has an intraPredAngle equal to round(1024 / ((32 × H / W) + 1)), corresponding to an inverse angle. Due to this small offset from the second diagonal, the length of the reference array on the shorter side of the target block (without a reference sample in the upper left corner) is slightly greater than twice the length of the side. Simultaneously, the reference array on the longer side (without a reference sample at the upper left corner), whose length is twice that of the block's side, contains several redundant samples towards the end of the array, and these samples are never used for any prediction mode. This makes the design of the defined prediction angle suboptimal.

[0035] The second problem with the current WAIP specification stems from limiting the number of wide angles to 10 per side (i.e., 10 more angles beyond the standard angle). This number is optimized for target rectangular blocks with an aspect ratio equal to 4:1 (ratio of the long side to the short side). For such blocks, as mentioned above, the start and end angles are close to the second diagonal. However, the current VVC standard also supports rectangular blocks with aspect ratios of 8:1, 16:1, and 32:1. In these cases, the start and end angles deviate significantly from the second diagonal, which in turn requires a much larger extension of the shorter reference array (more than twice the side length) and makes the longer reference array redundant, with only a larger number of samples at the end that are not used in any prediction mode. Therefore, it has been proposed to extend the number of wide angles to 14 per side, which supports all rectangular blocks up to an aspect ratio of 32:1. This will be discussed in more detail later in the text.

[0036] The fundamental idea behind wide-angle prediction is to adapt the prediction directions according to the block shape while keeping the total number of prediction modes the same. This is done by adding some prediction directions on the larger sides of the block and reducing them on the shorter sides. The overall goal is to improve prediction accuracy and result in higher compression efficiency. The newly introduced directions are called wide-angle directions because they extend beyond the usual 180-degree range from 45 degrees to -135 degrees.

[0037] This disclosure assumes 65 intra-prediction modes for the target block, as adopted by the current VVC standard. When the target block is square, the defined modes for the block remain unchanged, and wide-angle modes have no role to play. When the target block is flat, i.e., its width W is greater than its height H, several modes close to 45 degrees are removed, and an equal number of wide-angle modes greater than -135 degrees are added. The added directions are indexed as prediction modes 67, 68, ..., etc. Similarly, when the target block is tall, several modes close to -135 degrees are removed, and an equal number of wide-angle modes greater than 45 degrees are added. Prediction modes 0 and 1 are reserved for planar and DC prediction, and the added directions are indexed as prediction modes -1, -2, ..., etc. Table 1 shows the number of normal modes replaced by wide-angle modes for different block shapes. This parameter is called modeShift.

[0038] [Table 1]

[0039] For each target block, the mapping from the normal mode to the wide-angle mode that is replaced is performed as follows: modeShift = (Min(2, Abs(Log2(W / H))) << 2) + 2; if W > H and 1 < predMode < 2 + modeShift predMode = predMode + 65; else if H > W and (66 - modeShift) < predMode <= 66 predMode = predMode - 67;

[0040] When viewing the predicted direction clockwise (see Table 1), it is clear that for flat rectangular blocks, the direction starts in normal mode and ends in wide-angle mode. On the other hand, for tall rectangular blocks, the direction starts in wide-angle mode but ends in normal mode.

[0041] The wide-angle parameter (intraPredAngle) is derived from the normal mode's angle parameter, which replaces it, as follows:

[0042] W > H, and A n However, when representing the value of intraPredAngle for the mode #n that is replaced, the wide-angle mode that is replaced is round

[0043]

number

[0044] It has an intraPredAngle equal to A n+1 This represents the intraPredAngle for mode #(n+1). Similarly, H > W and A n However, when representing the value of intraPredAngle for the mode #n that is replaced, the wide-angle mode that is replaced is, pop

[0045]

number

[0046] It has an intraPredAngle equal to A n-1 This represents the intraPredAngle for mode #(n-1). As an example, Table 2 shows the intraPredAngle values ​​for W / H=4.

[0047] [Table 2]

[0048] As another example, Table 3 shows the intraPredAngle values ​​for W / H=1 / 4.

[0049] [Table 3]

[0050] In both cases, the inverse angle parameter invAngle for the new mode is given as round(8192 / intraPredAngle).

[0051] To support wide-angle prediction mode, the lengths of the upper and left reference arrays are obtained as follows: refW = 2 * W; refH = 2 * H; if W > H refH = H + (W >> whRatio) + Ceil(W / 32); else if H > W refW = W + (H >> whRatio) + Ceil(H / 32); Here, whRatio = Min(Abs(Log2(W / H)), 2). The above algorithm can be expressed equivalently as follows: refW = 2 * W; refH = 2 * H; if W > H, refH = refH + ((W >> whRatio) - H) + Ceil(W / 32); else if H > W, refW = refW + ((H >> whRatio) - W) + Ceil(H / 32);

[0052] From the above determination, it is clear that the length of the shorter reference array is longer than twice the length of the side. For example, when W>H, the left reference array is longer than 2×H. Similarly, when H>W, the upper reference array is longer than 2×W. The difference is the sum of two terms resulting from two different causes. The first term results from limiting the number of wide angles to 10 (whRatio has a maximum value equal to 2, which corresponds to W / H≧4 or W / H≦1 / 4). For W / H≦4 or W / H≧1 / 4, the first term is equal to zero, but for W / H>4 or W / H<1 / 4, the first term is a non-zero positive. The second term (represented by the ceiling function) results from the fact that the starting angle (for W>H) or the ending angle (for H>W) does not align along the second diagonal of the block. The embodiments described below present several exemplary ways of eliminating these terms.

[0053] If there is no restriction to the number of wide angles being 10, as in the current VVC standard, the first term can be zero. The number of wide angles can be increased in proportion to the aspect ratio of the rectangular block. The number of modes that can be replaced and the corresponding wide angles for different block shapes are given in Table 4 below. Note that a maximum of 14 wide angles on either side (28 wide angles in total) is sufficient to cover all block sizes permitted in the current VVC standard.

[0054] [Table 4]

[0055] The following embodiments present several exemplary methods aimed at aligning the predicted start and end directions for a block along its second diagonal. The application of these methods eliminates the second term (in the equation given in the previous section). Any of these methods can be considered an exemplary embodiment.

[0056] Method 1: Truncate In this method, the specified prediction direction remains unchanged. For each target rectangular block, only the two outermost directions are aligned with its diagonal.

[0057] For flat blocks, i.e., W>H, the starting normal mode has an intraPredAngle angle parameter equal to (32×H / W)+1, and the ending wide-angle mode has an intraPredAngle equal to round(1024 / ((32×H / W)+1)). Similarly, for tall blocks, i.e., H>W, the ending normal mode has an intraPredAngle equal to (32×W / H)+1, and the starting wide-angle mode has an intraPredAngle equal to round(1024 / ((32×W / H)+1)). The simplest way to align these directions with the diagonal of the block is to truncate them as follows: If, W > H and predMode = 2 + modeShift intraPredAngle = (32 * H / W) else if, H > W and predMode = 66 - modeShift intraPredAngle = (32 * W / H) These two statements make the second term zero. Optionally, to align the last (first) wide corner with the second diagonal of the flat (tall) block, we suggest the following changes: If W > H and predMode = 66 + modeShift, intraPredAngle = (32 * W / H) else if H > W and predMode = -modeShift intraPredAngle = (32 * H / W) In all cases, the inverse angle parameter invAngle is derived as follows: invAngle=round(8132 / intraPredAngle) For example, Tables 5(a) and 5(b) show the intraPredAngle values ​​for the start and end directions for W / H=2 and W / H=4, respectively. The red numbers indicate changes made due to truncation.

[0058] [Table 5]

[0059] [Table 6]

[0060] Similarly, Tables 6(a) and 6(b) show the intraPredAngle values ​​for the start and end directions for W / H=1 / 2 and W / H=1 / 4, respectively.

[0061] [Table 7]

[0062] [Table 8]

[0063] Method 2: Dyadic Alignment In this method, the prediction direction is modified so that the angle parameters, i.e., the set of intraPredAngle values, include all 32 factors (factors of 32). Correspondingly, the corresponding wide angles also become multiples of 32. In the process, some existing intraPredAngle values ​​are replaced. The new set of angle parameters is used for all block shapes, including square blocks. As a variation, the new set can be used only for rectangular blocks. The angle values ​​here are derived assuming there is no restriction that limits the number of wide angles to 10.

[0064] [Table 9]

[0065] Note that since the intraPredAngle value 2 already exists, the modeShift value will also be slightly modified. Also, for the case of VVC / H.266 in the All_INTRA configuration, for aspect ratios up to 16:1, only 14 wide angles need to be added on either side.

[0066] [Table 10]

[0067] Method 3: A new orientation for all block shapes Dyadic insertion of angles makes the distribution of angle values ​​somewhat irregular due to the unequal spacing of the angle values; therefore, we suggest modifying other angle values ​​to make the spacing somewhat more even. Note that there is no unique way to distribute angles, as even slight changes to any one value will yield almost the same result. As a variation, the new set can be used only for rectangular blocks, and the original values ​​can be used for square target blocks, as in the standard. As an example, we suggest the following angle values.

[0068] [Table 11]

[0069] [Table 12]

[0070] In the example above, the modeShift value also needs to be slightly modified, as shown in Table 8.

[0071] Finally, note that if the number of wide angles is still limited to 10, as in VVC / H.266 coding, the method described above still results in zero for the second term. For flat blocks with W / H ≤ 4, or tall blocks with W / H ≥ 1 / 4, the first term is zero. Therefore, for flat blocks with W / H > 4, or tall blocks with W / H < 1 / 4, the shorter reference array still requires an extension of more than twice the side length.

[0072] One advantage of the proposed invention is that they eliminate the suboptimality in current WAIP designs by aligning the predictive direction to suit the block shape. This optimization means that the reference array length (excluding the upper left reference sample) only needs to be twice the length of the corresponding side of the block.

[0073] One embodiment of Method 700 under the general aspects described herein is shown in Figure 7. The Method begins in a start block 701, and the control proceeds to block 710 for predicting samples of a rectangular video block using at least one of N reference samples from the top row of the rectangular video block or at least one of M reference samples from the left column of the rectangular video block, where the number of reference samples is based on a wide angle, increasing in proportion to the aspect ratio of the rectangular block. From block 710, the control proceeds to block 720 for encoding the rectangular video block using the prediction in intra-encoding mode.

[0074] Another embodiment of Method 800 under the general aspects described herein is shown in Figure 8. The Method begins in a starting block 801, and the control proceeds to block 810 for predicting samples of a rectangular video block using at least one of N reference samples from the upper row of the rectangular video block or at least one of M reference samples from the left column of the rectangular video block, where the reference samples are based on a wide-angle number that increases in proportion to the aspect ratio of the rectangular block. From block 810, the control proceeds to block 820 for decoding the rectangular video block using the prediction in intra-encoding mode.

[0075] Figure 9 shows one embodiment of a device 900 for encoding, decoding, compressing, or decompressing video data using wide-angle intra-prediction. The device comprises a processor 910 which can be interconnected to memory 920 through at least one port. The processor 910 and memory 920 may together have one or more additional interconnections to external connections.

[0076] The processor 910 is also configured to insert or receive information into a bitstream and to compress, encode, or decode it using any of the described embodiments.

[0077] This document describes various aspects, including tools, features, embodiments, models, and methods. Many of these aspects are described in detail and often in a manner that may seem restrictive, at least to illustrate their individual characteristics. However, this is for clarity in the description and does not limit the application or scope of those aspects. In fact, all different aspects can be combined and interchangeable to provide further aspects. Furthermore, aspects can likewise be combined and interchangeable with aspects described in prior applications.

[0078] The embodiments described and intended in this document can be implemented in many different forms. Figures 4, 5, and 6 below provide some embodiments, but other embodiments are intended, and the description of Figures 4, 5, and 6 does not limit the scope of implementation. At least one of the embodiments generally relates to video encoding and decoding, and at least one other embodiment generally relates to the transmission of a generated or encoded bitstream. These and other embodiments can be implemented as a computer-readable storage medium storing thereon instructions for encoding or decoding video data according to any of the methods, apparatus, or described methods, and / or a computer-readable storage medium storing thereon a bitstream generated according to any of the described methods.

[0079] In this application, the terms “reconstructed” and “decoded” are interchangeable, the terms “pixel” and “sample” are interchangeable, and the terms “image,” “picture,” and “frame” are interchangeable. While not always necessary, the term “reconstructed” is typically used on the encoder side, and “decoded” is typically used on the decoder side.

[0080] In this specification, various methods are described, each of which includes one or more steps or actions for achieving the described method. The order and / or use of any particular steps and / or actions may be changed or combined unless a specific order of steps or actions is required for the proper operation of the method.

[0081] The intra-predictive module, entropy coding module, and / or decoding module (160, 360, 145, 330) of the video encoder 100 and decoder 200, as shown in Figures 4 and 5, can be modified using the various methods and other embodiments described herein. Furthermore, these embodiments are not limited to VVC or HEVC and can be applied to other standards and recommendations, whether existing or future, and to extensions of any such standards and recommendations (including VVC and HEVC). Unless otherwise noted or technically excluded, the embodiments described herein can be used individually or in combination.

[0082] In this document, various numerical values ​​are used, such as {{1,0}, {3,1}, {1,1}}, etc. These specific values ​​are for illustrative purposes only, and the embodiments described are not limited to these specific values.

[0083] Figure 4 illustrates encoder 100. While variations of encoder 100 are intended, encoder 100 will be described below without explaining all expected variations for clarity.

[0084] Before encoding, the video sequence may undergo a pre-encoding process (101) which involves, for example, applying a color conversion to the input color picture (e.g., converting from RGB 4:4:4 to YCbCr 4:2:0) or performing a remapping of the input picture components to obtain a signal distribution that is more resilient to compression (e.g., using histogram equalization of one of the color components). Metadata may be associated with the pre-processing and attached to the bitstream.

[0085] In encoder 100, the picture is encoded by encoder elements as described below. The picture to be encoded is divided (102) and processed, for example, in units of CUs. Each unit is encoded using, for example, either intra-mode or inter-mode. When a unit is encoded in intra-mode, it performs intra-prediction (160). In inter-mode, motion estimation (175) and compensation (170) are performed. The encoder determines either intra-mode or inter-mode to use to encode the unit (105), and indicates the intra / inter decision, for example, by a prediction mode flag. The prediction residual is calculated, for example, by subtracting the predicted block from the original image block (110).

[0086] Subsequently, the predicted residual is transformed (125) and quantized (130). The quantized transformation coefficients, as well as the motion vector and other syntactic elements, are entropi-encoded (145) to output a bitstream. The encoder can skip the transformation and apply quantization directly to the untransformed residual signal. The encoder can bypass both the transformation and quantization, i.e., the residual is encoded directly without the application of a transformation or quantization process.

[0087] The encoder decodes the encoded blocks to provide a reference for further prediction. The quantized transformation coefficients are inversely quantized (140) and inversely transformed (150) to decode the prediction residuals. The image blocks are reconstructed by combining the decoded prediction residuals and the predicted blocks (155). For example, to perform deblocking / SAO (sample adaptive offset) filtering, an in-loop filter (165) is applied to the reconstructed picture to reduce encoding artifacts. The filtered image is stored in a reference picture buffer (180).

[0088] Figure 5 illustrates a block diagram of the video decoder 200. In the decoder 200, the bitstream is decoded by the decoder elements as described below. The video decoder 200 generally performs a decoding path which is the opposite of the encoding path described in Figure 4. The encoder 100 also generally performs video decoding as part of encoding the video data.

[0089] In particular, the decoder input includes a video bitstream that can be generated by the video encoder 100. The bitstream is first entropi-decoded (230) to obtain transformation coefficients, motion vectors, and other encoded information. Picture segmentation information indicates how the picture is segmented. Thus, the decoder can segment the picture (235) according to the segmentation information of the decoded picture. The transformation coefficients are inversely quantized (240) and inversely transformed (250) to decode the prediction residuals. The image blocks are reconstructed by combining the decoded prediction residuals and the predicted blocks (255). The predicted blocks can be obtained (270) from intra-prediction (260) or motion-compensated prediction (i.e., inter-prediction) (275). An in-loop filter (265) is applied to the reconstructed image. The filtered image is stored in a reference picture buffer (280).

[0090] The decoded picture can then undergo a post-decoding process (285), such as an inverse color conversion (e.g., conversion from YCbCr 4:2:0 to RGB 4:4:4), or a reverse remapping process that performs the reverse of the remapping process performed in the pre-encoding process (101). The post-decoding process can use metadata derived in the pre-encoding process and signaled in the bitstream.

[0091] Figure 6 illustrates a block diagram of an example system in which various embodiments are implemented. System 1000 can be materialized as a device comprising various components described below and configured to perform one or more of the embodiments described herein. Examples of such devices include, but are not limited to, various electronic devices such as personal computers, laptop computers, smartphones, tablet computers, digital multimedia set-top boxes, digital television receivers, personal video recording systems, connected consumer electronics, and servers. The elements of System 1000 can be materialized individually or in combination as a single integrated circuit, multiple ICs, and / or individual components. For example, in at least one embodiment, the processing and encoder / decoder elements of System 1000 are distributed across multiple ICs and / or individual components. In various embodiments, System 1000 is communicably coupled to other similar systems or other electronic devices, for example, via a communication bus or through dedicated input and / or output ports. In various embodiments, System 1000 is configured to perform one or more of the embodiments described herein.

[0092] System 1000 includes at least one processor 1010 configured to execute instructions loaded therein, for example, to implement various embodiments described in this document. The processor 1010 may include embedded memory, input / output interfaces, and various other circuits known in the art. System 1000 includes at least one memory 1020 (e.g., a volatile memory device and / or a non-volatile memory device). System 1000 includes a storage device 1040 which may include, but not limited to, EEPROM, ROM, PROM, RAM, DRAM, SRAM, flash memory, magnetic disk drives, and / or optical disk drives, and which may include non-volatile and / or volatile memory. The storage device 1040 may, in non-limiting examples, include an internal storage device, a mounted storage device, and / or a network-accessible storage device.

[0093] System 1000 includes, for example, an encoder / decoder module 1030 configured to process data and provide encoded or decoded video, the encoder / decoder module 1030 may include its own processor and memory. The encoder / decoder module 1030 represents a module that can be included in a device to perform encoding and / or decoding functions. As is known, a device may include one or both of an encoding module and a decoding module. In addition, the encoder / decoder module 1030 may be implemented as a separate element of System 1000, or it may be incorporated into the processor 1010 as a combination of hardware and software, as is known to those skilled in the art.

[0094] To perform the various embodiments described herein, program code loaded onto the processor 1010 or encoder / decoder 1030 can be stored in the storage device 1040 and then loaded into memory 1020 for execution by the processor 1010. According to various embodiments, one or more of the processor 1010, memory 1020, storage device 1040, and encoder / decoder module 1030 can store one or more of various items during the execution of the processes described herein. Such stored items may include, but are not limited to, input video, decoded video or a portion of decoded video, bitstreams, matrices, variables, and intermediate or final results from the processing of equations, formulas, operations, and operational logic.

[0095] In some embodiments, internal memory of the processor 1010 and / or encoder / decoder module 1030 is used to store instructions and provide working memory for processing required during encoding or decoding. However, in other embodiments, external memory of the processing device (for example, the processing device can be either the processor 1010 or the encoder / decoder module 1030) is used for one or more of these functions. The external memory can be memory 1020 and / or storage device 1040, for example, dynamic volatile memory and / or non-volatile flash memory. In some embodiments, external non-volatile flash memory is used to store the television's operating system. In at least one embodiment, high-speed external dynamic volatile memory, such as RAM, is used as working memory for video encoding and decoding operations, such as MPEG-2, HEVC, or VVC (Variable-Purpose Video Coding).

[0096] Inputs to the elements of system 1000 can be provided through various input devices, as shown in block 1130. Such input devices include, but are not limited to, (i) an RF unit that receives RF signals, for example, transmitted wirelessly by a broadcasting station, (ii) a composite input terminal, (iii) a USB input terminal, and / or (iv) an HDMI input terminal.

[0097] In various embodiments, the input devices of block 1130 have associated input processing elements, as known in the Art. For example, the RF section may be associated with elements for (i) selecting a desired frequency (also said to select a signal, or band-limit a signal to a frequency band), (ii) down-converting the selected signal, (iii) again band-limiting to a narrower frequency band to select a signal frequency band (e.g., which may be called a channel in some embodiments), (iv) demodulating the down-converted and band-limited signal, (v) performing error correction, and (vi) demultiplexing to select a desired stream of data packets. The RF section of various embodiments may include one or more elements for performing these functions, e.g., frequency selectors, signal selectors, band limiters, channel selectors, filters, downconverters, demodulators, error correctors, and demultiplexers. The RF section may include a tuner that performs various of these functions, including, for example, down-converting a received signal to a lower frequency (e.g., an intermediate frequency or near-baseband frequency) or to the baseband. In one embodiment of the set-top box, the RF section and its associated input processing elements perform frequency selection by receiving an RF signal transmitted over a wired (e.g., cable) medium, filtering it to a desired frequency band, downconverting it, and filtering it again. Various embodiments rearrange the order of the elements described above (and others), remove some of these elements, and / or add other elements that perform similar or different functions. Adding elements may include inserting elements between existing elements, for example, inserting amplifiers and analog-to-digital converters. In various embodiments, the RF section includes an antenna.

[0098] In addition, the USB and / or HDMI terminals may include their respective interface processors for connecting the system 1000 to other electronic devices via USB and / or HDMI connections. It should be understood that various aspects of input processing, such as Reed-Solomon error correction, can be implemented, for example, within a separate input processing IC or within the processor 1010. Similarly, aspects of USB or HDMI interface processing can be implemented within a separate interface IC or within the processor 1010. The demodulated, error-corrected, and demultiplexed streams are provided to various processing elements, including, for example, the processor 1010 and the encoder / decoder 1030, which operate in combination with memory and storage elements to process the data stream for presentation on an output device.

[0099] Various elements of system 1000 can be provided within an integrated housing. Within the integrated housing, the various elements are interconnected and can transmit data between them using an internal bus known in the art, such as an I2C bus, wiring, and printed circuit board, which is a suitable connection configuration 1140.

[0100] System 1000 includes a communication interface 1050 that enables communication with other devices via a communication channel 1060. The communication interface 1050 may include, but is not limited to, transceivers configured to transmit and receive data on the communication channel 1060. The communication interface 1050 may include, but is not limited to, a modem or a network card, and the communication channel 1060 may be implemented, for example, within a wired and / or wireless medium.

[0101] In various embodiments, data is streamed to system 1000 using a wireless network such as IEEE 802.11. The wireless signals in these embodiments are received over a communication channel 1060 and a communication interface 1050, adapted, for example, for Wi-Fi communication. In these embodiments, communication channel 1060 is typically connected to an access point or router that provides access to an external network, including the Internet, to enable streaming applications and other over-the-top communications. Other embodiments provide the streaming data to system 1000 using a set-top box that distributes data over the HDMI connection of input block 1130. Yet another embodiment provides the streaming data to system 1000 using the RF connection of input block 1130.

[0102] System 1000 can provide output signals to various output devices, including a display 1100, a speaker 1110, and other peripheral devices 1120. In various embodiments, the other peripheral devices 1120 include one or more of a standalone DVR, a disc player, a stereo system, a lighting system, and other devices that provide functions based on the output of System 1000. In various embodiments, control signals are signaled between System 1000 and the display 1100, the speaker 1110, or other peripheral devices 1120 using signaling such as AV.Link, CEC, or other communication protocols that enable inter-device control with or without user intervention. The output devices can be communicatively coupled to System 1000 via dedicated connections through their respective interfaces 1070, 1080, and 1090. Alternatively, the output devices can be connected to System 1000 using communication channel 1060 via communication interface 1050. The display 1100 and speaker 1110 can be integrated into a single unit along with other components of the system 1000 in an electronic device, such as a television. In various embodiments, the display interface 1070 includes a display driver, such as a timing controller (TCon) chip.

[0103] Alternatively, for example, if the RF section of input 1130 is part of a separate set-top box, the display 1100 and speaker 1110 can be isolated from one or more of the other components. In various embodiments where the display 1100 and speaker 1110 are external components, the output signal can be provided via a dedicated output connection, including, for example, an HDMI port, a USB port, or a COMP output.

[0104] The embodiments can be implemented by computer software implemented by the processor 1010, by hardware, or by a combination of hardware and software. In a non-limiting example, the embodiments can be implemented by one or more integrated circuits. The memory 1020 can be any type appropriate for the technical environment and, in a non-limiting example, can be implemented using any appropriate data storage technology such as optical memory devices, magnetic memory devices, semiconductor-based memory devices, fixed memory, and removable memory. The processor 1010 can be any type appropriate for the technical environment and, in a non-limiting example, can include one or more of microprocessors, general-purpose computers, dedicated computers, and processors based on multicore architectures.

[0105] Various implementations include decoding. As used in this application, “decoding” can encompass all or part of a process performed on, for example, an received encoded sequence to produce a final output suitable for display. In various embodiments, such a process typically includes one or more processes performed by a decoder, e.g., entropy decoding, inverse quantization, inverse transform, and differential decoding. In various embodiments, such a process also includes, or alternatively, extracting weight indices used for various intra-predictive reference arrays, e.g., processes performed by a decoder in the various implementations described in this application.

[0106] As further examples, in one embodiment, “decoding” refers only to entropy decoding; in another embodiment, “decoding” refers only to differential decoding; and in yet another embodiment, “decoding” refers to a combination of entropy decoding and differential decoding. Whether the term “decoding process” is intended to refer specifically to a subset of operations or to a broader decoding process in general will be clear from the context of the specific description and will be well understood by those skilled in the art.

[0107] Various implementations include encoding. As with the above-mentioned description of “decoding,” “encoding,” as used in this application, can encompass all or part of a process performed, for example, on an input video sequence to produce an encoded bitstream. In various embodiments, such a process typically includes one or more processes performed by an encoder, e.g., splitting, differential encoding, transformation, quantization, and entropy encoding. In various embodiments, such a process also includes, or alternatively, processes performed by an encoder in the various implementations described in this application, e.g., weighting of an intra-predictive reference array.

[0108] As further examples, in one embodiment, “encoding” refers only to entropy encoding; in another embodiment, “encoding” refers only to differential encoding; and in yet another embodiment, “encoding” refers to a combination of differential encoding and entropy encoding. Whether the term “encoding process” is intended to refer specifically to a subset of operations or to a broader encoding process in general will be clear from the context of the specific description and will be well understood by those skilled in the art.

[0109] Note that syntactic elements, when used herein, are descriptive terms; therefore, they do not preclude the use of other syntactic element names.

[0110] Please understand that when a diagram is presented as a flow chart, it also provides a block diagram of the corresponding device. Similarly, please understand that when a diagram is presented as a block diagram, it also provides a flow chart of the corresponding method / process.

[0111] Various embodiments refer to rate-distortion calculation or rate-distortion optimization. In particular, during the encoding process, often constrained by computational complexity, a balance or trade-off between rate and distortion is usually considered. Rate-distortion optimization is usually formulated as minimizing a rate-distortion function, which is a weighted sum of rate and distortion. Different methods exist for solving the rate-distortion optimization problem. For example, a method can be based on extensive testing of all encoding options, including all considered mode or encoding parameter values, with a complete evaluation of the encoding cost and the associated distortion of the reconstructed signal after encoding and decoding. Faster methods can also be used to reduce encoding complexity, in particular by using approximate distortion calculations based on predicted or predicted residual signals rather than reconstructed ones. A mixture of these two methods can also be used, for example, by using approximate distortion for only some of the possible encoding options and full distortion for others. Other methods evaluate only a subset of the possible encoding options. More generally, many methods employ one of several techniques to perform optimization, but optimization is not necessarily a complete evaluation of both the coding cost and the associated distortions.

[0112] The implementations and embodiments described herein may be implemented, for example, by methods or processes, apparatus, software programs, data streams, or signals. Even if a feature described is described only in relation to a single form of implementation (for example, only as a method), the implementation of that feature may also be implemented in other forms (for example, apparatus or programs). Apparatus may be implemented, for example, by appropriate hardware, software, and firmware. Methods may be implemented by processors, for example, which generally refer to processing devices, including, for example, computers, microprocessors, integrated circuits, or programmable logic devices. Processors also include communication devices, such as, for example, computers, cell phones, portable / personal digital assistants ("PDAs"), and other devices that facilitate the transmission of information between end users.

[0113] References to “one embodiment” or “embodiment,” or “one implementation” or “implementation,” and other variations thereof, mean that certain features, structures, and characteristics described in relation to the embodiments are included in at least one embodiment. Therefore, appearances of the phrases “in one embodiment” or “in one embodiment,” or “in one implementation” or “in implementation,” and any other variations, appearing in various places throughout this document do not necessarily all refer to the same embodiment.

[0114] In addition, this document may refer to "determining" various types of information. Determining information can include one or more of the following: estimating information, calculating information, predicting information, or retrieving information from memory.

[0115] Furthermore, this document may refer to "accessing" various types of information. Accessing information may include one or more of the following: receiving information, retrieving information (e.g., from memory), storing information, moving information, copying information, computing information, determining information, predicting information, or estimating information.

[0116] In addition, this document may refer to "receiving" various types of information. Receiving is intended to be a broad term, similar to "accessing." Receiving information may include, for example, accessing information or retrieving information (for example, from memory). Furthermore, "receiving" is generally included in various ways during operations such as, for example, storing information, processing information, transmitting information, moving information, copying information, erasing information, calculating information, determining information, predicting information, or estimating information.

[0117] For example, in the cases of "A / B", "A and / or B", and "at least one of A and B", please understand that the use of any of the following " / ", "and / or", and "at least one" is intended to encompass the selection of only the first enumerated option (A), or only the second enumerated option (B), or both options (A and B). As a further example, in the cases of "A, B, and / or C", and "at least one of A, B, and C", such phrasing is intended to encompass the selection of only the first enumerated option (A), or only the second enumerated option (B), or only the third enumerated option (C), or only the first and second enumerated options (A and B), or only the first and third enumerated options (A and C), or only the second and third enumerated options (B and C), or all three options (A, B, and C). This can be expanded to the number of items listed, as will be obvious to those skilled in the art and those skilled in the relevant technical fields.

[0118] Furthermore, as used herein, the term "signal" refers, among other things, to indicating something to a corresponding decoder. For example, in one embodiment, an encoder signals one particular weight among several weights used for an intra predictive reference array. Thus, in this embodiment, the same parameter is used on both the encoder and decoder sides. Therefore, for example, an encoder can send a particular parameter to a decoder so that the decoder can use the same particular parameter (explicit signaling). Conversely, if the decoder already has a particular parameter or other, signaling can be used without transmission, simply allowing the decoder to know and select that particular parameter (implicit signaling). Bit saving is achieved in various embodiments by avoiding the transmission of either actual function. It should be understood that signaling can be achieved in various ways. For example, in various embodiments, one or more syntactic elements and flags, etc., are used to signal information to a corresponding decoder. The above concerns the verb form of the word "signal," but the word "signal" can also be used as a noun in this specification.

[0119] As will be apparent to those skilled in the art, the implements can generate a variety of signals, for example, formatted to carry information that can be stored or transmitted. The information may include, for example, instructions for performing the method or data generated by one of the described implements. For example, a signal may be formatted to carry a bitstream of the described embodiment. Such a signal may be formatted, for example, as an electromagnetic wave (using, for example, the radio frequency portion of the spectrum) or as a baseband signal. Formatting may include, for example, encoding a data stream and modulating a carrier using the encoded data stream. The information carried by the signal may be, for example, analog information or digital information. The signal may be transmitted over a variety of different wired or wireless links, as is known. The signal may be stored on a processor-readable medium.

[0120] The above description illustrates several embodiments. These and further embodiments include, individually or in any combination, the following optional features across various different claim categories and types.

[0121] - During encoding and decoding, use prediction directions greater than -135 degrees and 45 degrees during intra-prediction.

[0122] - To extend the interaction between wide-angle mode and PDPC (Prediction-Dependent Prediction Combination).

[0123] - In order to maintain an equal number of directions, remove some directions in the opposite direction, Extending the prediction direction in the horizontal or vertical direction.

[0124] --Expand the number of directions for angles exceeding 135 degrees and 45 degrees.

[0125] - Combining PDPC and wide-angle intra-prediction for samples within a block.

[0126] - Signaling from the encoder to the decoder which prediction direction is being used.

[0127] - Use a subset of the prediction direction.

[0128] - The block must be a rectangular CU.

[0129] - The reference sample is obtained from an adjacent block.

[0130] - A bitstream or signal containing one or more of the described syntactic elements, or variations thereof.

[0131] - Inserting syntactic elements into the signaling that allow the decoder to process the bitstream in the reverse manner that the encoder did.

[0132] - To create, and / or transmit, and / or receive, and / or decode, a bitstream or signal containing one or more of the described syntactic elements, or variations thereof.

[0133] - A television, set-top box, cell phone, tablet, or other electronic device that performs any of the described embodiments.

[0134] - A television, set-top box, cell phone, tablet, or other electronic device that performs any of the described embodiments and displays the resulting image (for example, using a monitor, screen, or other type of display).

[0135] - A television, set-top box, cell phone, tablet, or other electronic device that tunes its channel (for example, using a tuner) to receive a signal containing an encoded image and performs one of the embodiments described.

[0136] - A television, set-top box, cell phone, tablet, or other electronic device that receives a signal containing an encoded image (for example, using an antenna) and performs any of the embodiments described.

[0137] -Various other generalized and specific functionalities are also supported and intended throughout this disclosure.

Claims

1. A step of predicting a sample of a rectangular video block based on a prediction mode, using at least one sample of a reference array associated with the rectangular video block, The rectangular video block has a number of wide angles determined based on the aspect ratio of the rectangular video block, The start and end prediction directions associated with the prediction mode are aligned along the second diagonal of the rectangular video block. The length of the reference array is twice the length of the corresponding side of the rectangular video block. The angle parameter values ​​used for prediction include steps 0, 1, 2, 3, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 28, 32, 37, 42, 47, 52, 57, 64, 73, 85, 102, 128, 171, 256, 341, and 512. In intra encoding mode, the steps include encoding the rectangular video block using the predicted samples and A method for providing this.

2. Based on the prediction mode, a sample of the rectangular video block is predicted using at least one sample from the reference array associated with the rectangular video block. The rectangular video block has a number of wide angles determined based on the aspect ratio of the rectangular video block, The start and end prediction directions associated with the prediction mode are aligned along the second diagonal of the rectangular video block. The length of the reference array is twice the length of the corresponding side of the rectangular video block. The angle parameter values ​​used for prediction include 0, 1, 2, 3, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 28, 32, 37, 42, 47, 52, 57, 64, 73, 85, 102, 128, 171, 256, 341 and 512. In intra encoding mode, the rectangular video block is encoded using the predicted samples. Processor configured in such a way A device equipped with.

3. A step of predicting a sample of a rectangular video block based on a prediction mode, using at least one sample of a reference array associated with the rectangular video block, The rectangular video block has a number of wide angles determined based on the aspect ratio of the rectangular video block, The start and end prediction directions associated with the prediction mode are aligned along the second diagonal of the rectangular video block. The length of the reference array is twice the length of the corresponding side of the rectangular video block. The angle parameter values ​​used for prediction include steps 0, 1, 2, 3, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 28, 32, 37, 42, 47, 52, 57, 64, 73, 85, 102, 128, 171, 256, 341, and 512. In intra encoding mode, the steps include: decoding the rectangular video block using the predicted samples; A method for providing this.

4. Based on the prediction mode, a sample of the rectangular video block is predicted using at least one sample from the reference array associated with the rectangular video block. The rectangular video block has a number of wide angles determined based on the aspect ratio of the rectangular video block, The start and end prediction directions associated with the prediction mode are aligned along the second diagonal of the rectangular video block. The length of the reference array is twice the length of the corresponding side of the rectangular video block. The angle parameter values ​​used for prediction include 0, 1, 2, 3, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 28, 32, 37, 42, 47, 52, 57, 64, 73, 85, 102, 128, 171, 256, 341 and 512. In intra coding mode, the rectangular video block is decoded using the predicted samples. Processor configured in such a way A device equipped with.

5. The method according to claim 1 or 3, wherein the prediction direction for the rectangular video block is extended beyond -135 degrees and 45 degrees.

6. The method according to claim 1 or 3, wherein the predicted direction for the rectangular video block is extended in the horizontal or vertical direction while removing some of the opposite directions in order to maintain an equal number of directions.

7. The method according to claim 1 or 3, wherein the rectangular video block is an encoding unit having a rectangular shape.

8. The method according to claim 1 or 3, wherein the sample of the reference array is selected from an adjacent block.

9. The method according to claim 1 or 3, wherein the set of angle parameters includes 32 factors.

10. The method according to claim 9, wherein the angle values ​​are modified to allow for equal intervals between angles.

11. The apparatus according to claim 4, (i) an antenna configured to receive a signal, wherein the signal includes the rectangular video block; (ii) a band limiter configured to limit the received signal to a bandwidth of frequencies including the rectangular video block; and (iii) at least one of a display configured to display an output representing the video block. A device equipped with the following features.

12. A non-temporary computer-readable medium comprising instructions that can be implemented by at least one processor, carrying out the method according to claims 1, 3, and any one of claims 5 to 10.

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