Transistors and display devices
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- SEMICON ENERGY LAB CO LTD
- Filing Date
- 2026-05-01
- Publication Date
- 2026-06-16
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Figure 0007874815000001_ABST
Abstract
Claims
1. A transistor having a semiconductor layer, a gate, and a gate insulating layer, The semiconductor layer includes a composite oxide semiconductor having a first region and a second region. The first region has a plurality of first clusters containing In, element M, Zn, and O, The second region has a plurality of second clusters containing In, element M, Zn, and O, The element M is Al, Ga, Y, or Sn. The first region has a higher atomic ratio of In to element M than the second region. The first region has a portion where the plurality of first clusters are connected to each other. The second region has a portion where the plurality of second clusters are connected to each other. Off-current is 1 x 10 -19 A transistor with an A rating of 0.
2. A transistor having a semiconductor layer, a gate, and a gate insulating layer, The semiconductor layer includes a composite oxide semiconductor having a first region and a second region. The first region has a plurality of first clusters containing In, element M, Zn, and O, The second region has a plurality of second clusters containing In, element M, Zn, and O, The element M is Al, Ga, Y, or Sn. The first region has a higher atomic ratio of In to element M than the second region. One of the plurality of first clusters is connected to another of the plurality of first clusters via one of the remaining plurality of first clusters. One of the plurality of second clusters is connected to another of the plurality of second clusters via one of the remaining plurality of second clusters, Off-current is 1 x 10 -19 A transistor with an A rating of 0.
3. In claim 1 or claim 2, The first region is a transistor that is surrounded by the second region.
4. In claim 1 or claim 2, A transistor in which one of the plurality of first clusters is connected to another of the plurality of first clusters via one of the plurality of second clusters.
5. In any one of claims 1 to 4, The second cluster is a transistor with a wider band gap than the first cluster.
6. In any one of claims 1 to 5, The transistor having a first cluster size of 0.5 nm or more and 1.5 nm or less.
7. The substrate has a pixel section and a drive circuit section for driving the pixel section, The pixel portion has a first transistor, The aforementioned drive circuit section has a second transistor, A display device having the first transistor and the second transistor, respectively, as described in any one of claims 1 to 6.
8. The substrate has a pixel section and a drive circuit section for driving the pixel section, The pixel portion is a display device having a transistor according to any one of claims 1 to 6.
9. The substrate has a pixel section and a drive circuit section for driving the pixel section, The drive circuit section is a display device having a transistor according to any one of claims 1 to 6.