Communication method and related apparatus
By using the first n-1 level registers in the n-level registers in the communication method for signal detection, the problem of high storage complexity in the prior art is solved, and the number of bit memory units is reduced and the efficiency is improved.
WO2025060863A1 Publication Date: 2025-03-27HUAWEI TECH CO LTD
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Patent Information
- Application Number
- PCT/CN2024/116120
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-09-22
- Filing Date
- 2024-08-30
- Publication Date
- 2025-03-27
AI Technical Summary
Technical Problem
In the prior art, when performing correlation detection of preamble, postamble or mid-amble signals in uplink and downlink signals, more bit memory units are required, resulting in high storage complexity.
Method used
By detecting the signal of the first sequence of included first sequence using the first n-1 registers in the n-level register, the dependence on the n-level registers is reduced and the number of bit memory cells is reduced.
Benefits of technology
The number of bit memory units required during the relevant detection process is reduced, the storage complexity is reduced, and efficiency is improved.
✦ Generated by Eureka AI based on patent content.
Abstract
Provided in the present application are a communication method and a related apparatus, which can reduce the number of bit memory cells required for related detection of a preamble, a postamble or a mid-amble. The method comprises: a first device determining a first signal on the basis of a first sequence, and sending the first signal, wherein the first sequence has a preset relationship with a first generalized Gray sequence, an n-stage register is used for generating the first generalized Gray sequence, the storage depth of a kth-stage register in the n-stage register is (I), the value of Pk is an integer between 0 and n-1, the value of Pn is n-1, in the case of i≠j and Pi≠Pj, the values of i and j are integers between 0 and n-1, the value of k is any integer between 1 and n, n is a positive integer, the length of the first sequence is N, and N=2n; and the first device receiving the first signal, using first-stage through (n-1)th-stage registers in the n-stage register to perform detection on the first signal, and determining a starting position and / or an ending position of the first sequence in the first signal.
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