Detection of an error condition on a serial data bus

The controller addresses the challenge of detecting CE1 error conditions in serial communication protocols by using an external logic circuit to monitor and compare data on the SDA line, disabling the output SDA pad buffer, and asserting a stop condition, thereby ensuring reliable data transfer and preventing data conflicts.

WO2025064038A1 Publication Date: 2025-03-27MICROCHIP TECHNOLOGY INC
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Patent Information

Application Number
PCT/US2024/037983
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-01-11
Filing Date
2024-07-15
Publication Date
2025-03-27

AI Technical Summary

Technical Problem

Existing serial communication protocols, such as I3C, face challenges in detecting and handling the CE1 error condition, where a controller detects mismatched data on the serial data bus during write transactions, leading to potential data conflicts and inefficiencies.

Method used

A controller with an external logic circuit that monitors data on the SDA line, compares it with the output data, and detects the CE1 error condition by disabling the output SDA pad buffer and asserting a stop condition on the data bus to prevent data conflicts.

Benefits of technology

Effectively detects and mitigates CE1 error conditions, preventing data conflicts and ensuring reliable data transfer on the serial data bus, thereby enhancing the robustness and efficiency of serial communication protocols.

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Abstract

A controller is provided that includes a serial data (SDA) line interface to connect the controller to an SDA line of a two-wire, shared, serial data bus. The controller includes a circuitry to provide output data for transfer on to the SDA line via the output SDA pad buffer. The controller includes a logic circuit that is external to the circuitry, and that monitors data on the SDA line while the output data is transferred on to the SDA line. The logic circuit compares the monitored data on the SDA line and the output data to detect an error condition when the monitored data and the output data differ. The logic circuit disables an output SDA pad buffer of the SDA line interface for a current byte of the output data provided by the circuitry, and then causes a stop condition on the data bus.
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