Techniques for configuring base graph and lifting structures for low density parity check code
By configuring LDPC codes with a core structure of minimum degree three and extending it to larger sizes, the encoding complexity is reduced, and a low error floor is achieved, addressing the limitations of accumulative chain structures in wireless communication systems.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- QUALCOMM INC
- Filing Date
- 2024-12-11
- Publication Date
- 2026-06-18
AI Technical Summary
Existing LDPC encoding schemes using accumulative chain structures face challenges with high encoding complexity and adverse error floors, limiting their application to specific use cases, and in wireless communication systems, changing channel conditions complicate precomputation of coding configurations.
Configuring base graphs and lifting structures for LDPC codes with a core structure having a minimum variable node degree of three, ensuring invertibility and full rank, and extending this structure to larger sizes using degree-1 and triangular extensions, eliminating degree-2 nodes to reduce encoding complexity and achieve a low error floor.
This approach enables efficient LDPC encoding with a low error floor, supporting high reliability in dynamic wireless environments and reducing encoding complexity, suitable for diverse channel conditions and use cases.
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Figure CN2024138351_18062026_PF_FP_ABST
Abstract
Description
TECHNIQUES FOR CONFIGURING BASE GRAPH AND LIFTING STRUCTURES FOR LOW DENSITY PARITY CHECK CODEFIELD OF THE DISCLOSURE
[0001] Aspects of the present disclosure generally relate to wireless communication and specifically relate to techniques, apparatuses, and methods associated with configuring base graph and lifting structures for low density parity check codes. DESCRIPTION OF RELATED ART
[0002] Wireless communication systems are widely deployed to provide various services, which may involve carrying or supporting voice, text, other messaging, video, data, and / or other traffic. Typical wireless communication systems may employ multiple-access radio access technologies (RATs) capable of supporting communication among multiple wireless communication devices including user devices or other devices by sharing the available system resources (for example, time domain resources, frequency domain resources, spatial domain resources, and / or device transmit power, among other examples) . Such multiple-access RATs are supported by technological advancements that have been adopted in various telecommunication standards, which define common protocols that enable different wireless communication devices to communicate on a local, municipal, national, regional, or global level.
[0003] An example telecommunication standard is New Radio (NR) . NR, which may also be referred to as 5G, is part of a continuous mobile broadband evolution promulgated by the Third Generation Partnership Project (3GPP) . NR (and other RATs beyond NR) may be designed to better support enhanced mobile broadband (eMBB) access, Internet of things (IoT) networks or reduced capability device deployments, and ultra-reliable low latency communication (URLLC) applications. To support these verticals, NR systems may be designed to implement a modularized functional infrastructure, a disaggregated and service-based network architecture, network function virtualization, network slicing, multi-access edge computing, millimeter wave (mmWave) technologies including massive multiple-input multiple-output (MIMO) , licensed and unlicensed spectrum access, non-terrestrial network (NTN) deployments, sidelink and other device-to-device direct communication technologies (for example, cellular vehicle-to-everything (CV2X) communication) , multiple-subscriber implementations, high-precision positioning, and / or radio frequency (RF) sensing, among other examples. As the demand for connectivity continues to increase, further improvements in NR may be implemented, and other RATs, such as 6G and beyond, may be introduced to enable new applications and facilitate new use cases.
[0004] To support use cases that may demand high data rates, high reliability, low latency, and / or low power consumption, channel coding may be used in a wireless communication system to ensure reliable and efficient communication. For example, channel coding generally involves an encoding operation performed at a transmitter to selectively add redundancy to transmitted data, and a decoding operation at a receiver where the additional redundancy is used to detect and / or correct errors that may occur during transmission and / or reception. For example, because wireless communication channels tend to be noisy and / or unreliable, data can be corrupted during transmission due to factors such as noise, interference, and / or channel fading, among other examples. When errors in transmitted data cannot be corrected at the receiver, the transmitted data may be lost or retransmissions may be performed to provide the correct data to the receiver. Accordingly, because lost data reduces reliability and retransmissions increase latency and power consumption, channel coding techniques are used in wireless communication systems to ensure that received data is the same as transmitted data. For example, channel coding techniques may use polar codes, Reed-Muller codes, repetition codes, and / or simplex codes for control channels or other channels with low to moderate payload sizes, and turbo codes or low density parity check (LDPC) codes for data channels or other channels that tend to have relatively larger payload sizes.
[0005] In this way, channel coding techniques may offer various performance improvements in wireless communication systems. For example, channel coding techniques provide error detection and error correction capabilities that may increase a likelihood that transmitted data is reliably received despite noise, interference, and / or fading conditions that may be present in a wireless channel. In addition, channel coding may reduce an error rate and increase reliability for wireless transmission, which may mitigate errors, reduce retransmissions, and improve overall throughput. Furthermore, although encoding and decoding operations may add some processing delay, efficient channel coding schemes may reduce the processing delay and the improved error detection and correction capabilities may reduce retransmissions, which reduces overall latency. Channel coding techniques may also extend wireless coverage because a network node may transmit data in a reliable manner over a longer distance and / or in a challenging radio environment, improve spectral efficiency by minimizing the impact that errors have on the use of available frequency spectrum, and / or improve energy efficiency at network nodes and user devices by supporting efficient encoding and / or decoding schemes and / or reducing retransmissions, among other examples.SUMMARY
[0006] Some aspects described herein relate to a method of wireless communication performed by a transmitter. The method may include constructing a base graph according to a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two. The method may include constructing a set of lifting values for the core structure. The method may include transmitting a low density parity check (LDPC) code to a receiver, wherein the LDPC code is associated with the base graph and the set of lifting values.
[0007] Some aspects described herein relate to a method of wireless communication performed by a receiver. The method may include receiving an LDPC code associated with a base graph that includes a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two. The method may include decoding the LDPC code in accordance with the base graph and a set of lifting values associated with the core structure.
[0008] Some aspects described herein relate to a transmitter for wireless communication. The transmitter may include one or more memories and one or more processors coupled to the one or more memories. The one or more processors may be configured to construct a base graph according to a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two. The one or more processors may be configured to construct a set of lifting values for the core structure. The one or more processors may be configured to transmit an LDPC code to a receiver, wherein the LDPC code is associated with the base graph and the set of lifting values.
[0009] Some aspects described herein relate to a receiver for wireless communication. The receiver may include one or more memories and one or more processors coupled to the one or more memories. The one or more processors may be configured to receive an LDPC code associated with a base graph that includes a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two. The one or more processors may be configured to decode the LDPC code in accordance with the base graph and a set of lifting values associated with the core structure.
[0010] Some aspects described herein relate to a non-transitory computer-readable medium that stores a set of instructions for wireless communication by a transmitter. The set of instructions, when executed by one or more processors of the transmitter, may cause the transmitter to construct a base graph according to a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two. The set of instructions, when executed by one or more processors of the transmitter, may cause the transmitter to construct a set of lifting values for the core structure. The set of instructions, when executed by one or more processors of the transmitter, may cause the transmitter to transmit an LDPC code to a receiver, wherein the LDPC code is associated with the base graph and the set of lifting values.
[0011] Some aspects described herein relate to a non-transitory computer-readable medium that stores a set of instructions for wireless communication by a receiver. The set of instructions, when executed by one or more processors of the receiver, may cause the receiver to receive an LDPC code associated with a base graph that includes a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two. The set of instructions, when executed by one or more processors of the receiver, may cause the receiver to decode the LDPC code in accordance with the base graph and a set of lifting values associated with the core structure.
[0012] Some aspects described herein relate to an apparatus for wireless communication. The apparatus may include means for constructing a base graph according to a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two. The apparatus may include means for constructing a set of lifting values for the core structure. The apparatus may include means for transmitting an LDPC code to a receiver, wherein the LDPC code is associated with the base graph and the set of lifting values.
[0013] Some aspects described herein relate to an apparatus for wireless communication. The apparatus may include means for receiving an LDPC code associated with a base graph that includes a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two. The apparatus may include means for decoding the LDPC code in accordance with the base graph and a set of lifting values associated with the core structure.
[0014] Aspects of the present disclosure may generally be implemented by or as a method, apparatus, system, computer program product, non-transitory computer-readable medium, user equipment, base station, network node, network entity, wireless communication device, and / or processing system as substantially described with reference to, and as illustrated by, this specification and accompanying drawings.
[0015] The foregoing paragraphs of this section have broadly summarized some aspects of the present disclosure. These and additional aspects and associated advantages will be described hereinafter. The disclosed aspects may be used as a basis for modifying or designing other aspects for carrying out the same or similar purposes of the present disclosure. Such equivalent aspects do not depart from the scope of the appended claims. Characteristics of the aspects disclosed herein, both their organization and method of operation, together with associated advantages, will be better understood from the following description when considered in connection with the accompanying drawings.BRIEF DESCRIPTION OF THE DRAWINGS
[0016] The appended drawings illustrate some aspects of the present disclosure but are not limiting of the scope of the present disclosure because the description may enable other aspects. Each of the drawings is provided for purposes of illustration and description, and not as a definition of the limits of the claims. The same or similar reference numbers in different drawings may identify the same or similar elements.
[0017] Fig. 1 is a diagram illustrating an example of a wireless communication network, in accordance with the present disclosure.
[0018] Fig. 2 is a diagram illustrating an example disaggregated network node architecture, in accordance with the present disclosure.
[0019] Fig. 3 is a diagram illustrating an example of communication using low density parity check (LDPC) codes, in accordance with the present disclosure.
[0020] Fig. 4 is a diagram illustrating an example of an LDPC base matrix and an LDPC base graph, in accordance with the present disclosure.
[0021] Fig. 5 is a diagram illustrating an example of a parity check matrix associated with an LDPC code, in accordance with the present disclosure.
[0022] Fig. 6 is a diagram illustrating an example of lifting for a quasi-cyclic LDPC code, in accordance with the present disclosure.
[0023] Fig. 7 is a diagram illustrating an example of degree-2 chain structures that may be used to simplify LDPC encoding, in accordance with the present disclosure.
[0024] Figs. 8A-8C are diagrams illustrating examples associated with configuring base graph and lifting structures for LDPC codes, in accordance with the present disclosure.
[0025] Fig. 9 is a diagram illustrating an example process performed, for example, at a transmitter or an apparatus of a transmitter, in accordance with the present disclosure.
[0026] Fig. 10 is a diagram illustrating an example process performed, for example, at a receiver or an apparatus of a receiver, in accordance with the present disclosure.
[0027] Figs. 11-12 are diagrams of example apparatuses for wireless communication, in accordance with the present disclosure.DETAILED DESCRIPTION
[0028] Various aspects of the present disclosure are described hereinafter with reference to the accompanying drawings. However, aspects of the present disclosure may be embodied in many different forms. The present disclosure is not to be construed as limited to any specific aspect illustrated by or described with reference to an accompanying drawing or otherwise presented in this disclosure. Rather, these aspects are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art. One skilled in the art may appreciate that the scope of the disclosure is intended to cover any aspect of the disclosure disclosed herein, whether implemented independently of or in combination with any other aspect of the disclosure. For example, an apparatus may be implemented or a method may be practiced using various combinations or quantities of the aspects set forth herein. In addition, the scope of the disclosure is intended to cover an apparatus having, or a method that is practiced using, other structures and / or functionalities in addition to or other than the structures and / or functionalities with which various aspects of the disclosure set forth herein may be practiced. Any aspect of the disclosure disclosed herein may be embodied by one or more elements of a claim.
[0029] Several aspects of telecommunication systems will now be presented with reference to various methods, operations, apparatuses, and techniques. These methods, operations, apparatuses, and techniques will be described in the following detailed description and illustrated in the accompanying drawings by various blocks, modules, components, circuits, steps, processes, or algorithms (collectively referred to as “elements” ) . These elements may be implemented using hardware, software, or a combination of hardware and software. Whether such elements are implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system.
[0030] Low density parity check (LDPC) codes are linear block codes that may be used to provide forward error correction capabilities in a communication system with a performance that approaches channel capacity. The performance may be achieved under an iterative belief propagation decoding scheme, also known as message-passing decoding, which has a linear complexity associated with an LDPC code block length. In particular, LDPC codes are defined or represented according to a sparse parity check matrix (PCM) that typically has a low density of entries with a value of 1. From a transmitter perspective, the transmitter (or LDPC encoder) multiplies one or more systematic bits or information bits by a PCM to generate a code block (or codeword) . The sparse PCM generally includes a systematic submatrix and a parity submatrix. The parity submatrix may be inverted to compute a parity vector used to encode an LDPC code. In some cases, as a result of the sparseness, the parity submatrix portion of the PCM may have a structure that makes the complexity of the parity submatrix inversion prohibitive as code block length increases. Accordingly, LDPC codes may utilize an accumulative chain structure, also known as a degree-2 chain structure, to simplify the encoding. Furthermore, in some cases, an LDPC code may be quasi-cyclic. For example, as described herein, a quasi-cyclic LDPC (QC-LDPC) code is associated with a base graph and lifting values that provide a compact PCM representation, which enables efficient encoding and high parallelism in a decoder architecture.
[0031] However, in an LDPC encoding scheme that uses an accumulative (or degree-2) chain structure to reduce encoding complexity, the degree-2 nodes may have an adverse impact on the error floor performance for the resulting LDPC codes. For example, relative to polar codes that may be used for control channel transmissions, broadcast transmissions, or other transmissions with a low to moderate payload size (e.g., around 250 bits or less) , LDPC codes that use the accumulative chain structure provide a better threshold for error at a block error rate (BLER) above around 1e-4 and a worse error floor around a 1e-4 BLER. Accordingly, in a wireless communication system (e.g., implementing 5G New Radio (NR) or other radio access technology (RAT) ) , LDPC codes that use the accumulative chain structure are limited to supporting use cases such as enhanced mobile broadband (eMBB) associated with an error probability or error floor around 1e-4 or above. Furthermore, similar challenges may arise in other communication systems that use the accumulative chain structure to simplify LDPC encoding, such as Wi-Fi or Digital Video Broadcasting (DVB) systems. Although avoiding degree-2 variable nodes in an LDPC code (e.g., using a variable degree greater than two) may result in a high reliability and low error floor, the lack of degree-2 variable nodes increases LDPC encoding complexity. For example, Ethernet uses regular (non-QC) LDPC codes with a minimum variable degree of 5, which provides a deep error floor (e.g., less than 1e-10) at the cost of high encoding complexity. Furthermore, in LDPC encoding schemes that avoid degree-2 variable nodes, the resulting PCM is not guaranteed to be full rank. For example, in the LDPC encoding scheme used for Ethernet, the PCM is rank-deficient (not full rank) , where a rank-deficient PCM (e.g., a PCM with a rank below the highest possible rank associated with the PCM size) poses challenges in a wireless communication system.
[0032] For example, in an Ethernet or other wired communication system, a code configuration is always fixed (e.g., only one code is configured and / or used in an implementation) because the communication environment is substantially constant (e.g., non-mobile) . Accordingly, when a transmitter and receiver implement an encoding / decoding scheme, the transmitter and receiver can precompute the rank of the matrix and determine an equivalent low-rank matrix of the PCM. In other words, rather than encoding and decoding using the rank-deficient PCM, the transmitter and receiver can implement the encoding and decoding according to the equivalent low-rank PCM. However, in a wireless communication system, such as NR, channel conditions may change often due to mobility and changes in wireless conditions. Accordingly, a wireless communication system may define various codes (e.g., roughly 1000 different LDPC codes are defined for NR) , which results in significant complexity to precompute and save the coding configurations for each of the various codes to memory.
[0033] Various aspects relate generally to base graph and lifting structures that may be used to encode LDPC codes with a low error floor. Some aspects more specifically relate to an encoding structure on a PCM associated with a QC-LDPC code, where the encoding structure does not contain any degree-2 variable nodes, has a low encoding complexity, and is guaranteed to be invertible or full rank. In some aspects, the base graph associated with a QC-LDPC code may include a core structure, which may be interchangeably referred to as a parity core, corresponding to a square matrix in which three is the minimum variable node degree. For example, in some aspects, the core structure may be an invertible square matrix with an order of four (e.g., a 4×4 matrix) . Furthermore, in some aspects, the core structure may be associated with a set of lifting values that result in the core structure having a monomial determinant. In some aspects, the core structure may be extended to support a PCM with a larger size (e.g., M×M, where M is greater than four) via a degree-1 (or low-density generator matrix (LDGM) ) extension and / or vi an upper triangular extension.
[0034] Particular aspects of the subject matter described in this disclosure can be implemented to realize one or more of the following potential advantages. In some examples, by configuring a base graph according to an invertible core structure in which three is the minimum variable node degree, the described techniques can be used to generate a valid PCM for a systematic LDPC code. Furthermore, because all square matrices that are 4×4 or larger and have no degree-2 nodes are equivalent to each other via row / column permutations, any core structure with the properties described herein have the same encoding complexity. In addition, by configuring lifting values that result in the core structure having a monomial determinant, the described techniques can reduce encoding complexity for the resulting QC-LDPC code. Furthermore, by extending the core structure to a larger size, the described techniques may support lower coding rates that may provide more error protection. Moreover, by imposing a condition that the core structure contain no degree-2 variable nodes, the described techniques may be used to encode a QC-LDPC code with a low error floor (e.g., 1e-6 and below) , which may support use cases that require a high reliability (e.g., non-terrestrial network (NTN) communication or other use cases) .
[0035] As described above, wireless communication systems may be deployed to provide various services, which may involve carrying or supporting voice, text, other messaging, video, data, and / or other traffic. Some wireless communications systems may employ multiple-access RATs. The multiple-access RATs may be capable of supporting communication with multiple wireless communication devices by sharing the available system resources (for example, time domain resources, frequency domain resources, spatial domain resources, and / or device transmit power, among other examples) . Examples of such multiple-access RATs include code division multiple access (CDMA) systems, time division multiple access (TDMA) systems, frequency division multiple access (FDMA) systems, orthogonal frequency division multiple access (OFDMA) systems, single-carrier frequency division multiple access (SC-FDMA) systems, and time division synchronous code division multiple access (TD-SCDMA) systems.
[0036] Multiple-access RATs are supported by technological advancements that have been adopted in various telecommunication standards, which define common protocols that enable wireless communication devices to communicate on a local, municipal, enterprise, national, regional, or global level. For example, 5G NR is part of a continuous mobile broadband evolution promulgated by the Third Generation Partnership Project (3GPP) . 5G NR may support eMBB access, Internet of Things (IoT) networks or reduced capability (RedCap) device deployments, ultra-reliable low-latency communication (URLLC) applications, and / or massive machine-type communication (mMTC) , among other examples.
[0037] To support these and other target verticals, a wireless communication system may be designed to implement a modularized functional infrastructure, a disaggregated and service-based network architecture, network function virtualization, network slicing, multi-access edge computing, millimeter wave (mmWave) technologies including massive multiple-input multiple-output (MIMO) , beamforming, IoT device or RedCap device connectivity and management, industrial connectivity, licensed and unlicensed spectrum access, sidelink and other device-to-device direct communication (for example, cellular vehicle-to-everything (CV2X) communication) , frequency spectrum expansion, overlapping spectrum use, small cell deployments, NTN deployments, device aggregation, advanced duplex communication (for example, sub-band full-duplex (SBFD) ) , multiple-subscriber implementations, high-precision positioning, radio frequency (RF) sensing, network energy savings (NES) , low-power signaling and radios, and / or artificial intelligence or machine learning (AI / ML) , among other examples.
[0038] The foregoing and other technological improvements may support use cases, such as wireless fronthauls, wireless midhauls, wireless backhauls, wireless data centers, extended reality (XR) and metaverse applications, meta services for supporting vehicle connectivity, holographic and mixed reality communication, autonomous and collaborative robots, vehicle platooning and cooperative maneuvering, sensing networks, gesture monitoring, human-brain interfacing, digital twin applications, asset management, and universal coverage applications using non-terrestrial and / or aerial platforms, among other examples.
[0039] As the demand for connectivity continues to increase, further improvements in NR may be implemented, and other RATs, such as 6G and beyond, may be introduced to enable new applications and facilitate new use cases. The methods, operations, apparatuses, and techniques described herein may enable one or more of the foregoing technologies or new technologies and / or support one or more of the foregoing use cases or new use cases.
[0040] Fig. 1 is a diagram illustrating an example of a wireless communication network 100, in accordance with the present disclosure. The wireless communication network 100 may be or may include elements of a 5G (or NR) network or a 6G network, among other examples. The wireless communication network 100 may include multiple network nodes 110. For example, in Fig. 1, the wireless communication network 100 includes a network node (NN) 110a and a network node 110b. The network nodes 110 may support communications with multiple UEs 120. For example, in Fig. 1, the network nodes 110 support communication with a UE 120a, a UE 120b, and a UE 120c. In some examples, a UE 120 may also communicate with other UEs 120 and a network node 110 may communicate with a core network and with other network nodes 110.
[0041] The network nodes 110 and the UEs 120 of the wireless communication network 100 may communicate using the electromagnetic spectrum, which may be subdivided by frequency or wavelength into various classes, bands, carriers, and / or channels. For example, devices of the wireless communication network 100 may communicate using one or more operating bands. In some aspects, multiple wireless communication networks 100 may be deployed in a given geographic area. Each wireless communication network 100 may support a particular RAT (which may also be referred to as an air interface) and may operate on one or more carrier frequencies in one or more frequency bands or ranges. In some examples, when multiple RATs are deployed in a given geographic area, each RAT in the geographic area may operate on different frequencies to avoid interference with other RATs. Additionally or alternatively, in some examples, the wireless communication network 100 may implement dynamic spectrum sharing (DSS) , in which multiple RATs are implemented with dynamic bandwidth allocation (for example, based on user demand) in a single frequency band. In some examples, the wireless communication network 100 may support communication over unlicensed spectrum, where access to an unlicensed channel is subject to a channel access mechanism. For example, in a shared or unlicensed frequency band, a transmitting device may perform a channel access procedure, such as a listen-before-talk (LBT) procedure, to contend against other devices for channel access before transmitting on a shared or unlicensed channel.
[0042] Various operating bands have been defined as frequency range designations FR1 (410 MHz through 7.125 GHz) , FR2 (24.25 GHz through 52.6 GHz) , FR3 (7.125 GHz through 24.25 GHz) , FR4a or FR4-1 (52.6 GHz through 71 GHz) , FR4 (52.6 GHz through 114.25 GHz) , and FR5 (114.25 GHz through 300 GHz) . Although a portion of FR1 is greater than 6 GHz, FR1 is often referred to (interchangeably) as a “sub-6 GHz” band in some documents and articles. Similarly, FR2 is often referred to (interchangeably) as a “millimeter wave” band in some documents and articles, despite being different than the extremely high frequency (EHF) band (30 GHz through 300 GHz) , which is identified by the International Telecommunications Union (ITU) as a “millimeter wave” band. The frequencies between FR1 and FR2 are often referred to as mid-band frequencies, which include FR3. Frequency bands falling within FR3 may inherit FR1 characteristics or FR2 characteristics, and thus may effectively extend features of FR1 or FR2 into the mid-band frequencies. Thus, “sub-6 GHz, ” if used herein, may broadly refer to frequencies that are less than 6 GHz, that are within FR1, and / or that are included in mid-band frequencies. Similarly, the term “millimeter wave, ” if used herein, may broadly refer to mid-band frequencies or to frequencies that are within FR2, FR4, FR4-a or FR4-1, FR5, and / or the EHF band. Higher frequency bands may extend 5G NR operation, 6G operation, and / or other RATs beyond 52.6 GHz.
[0043] A network node 110 and / or a UE 120 may include one or more devices, components, or systems that enable communication with other devices, components, or systems of the wireless communication network 100. For example, a UE 120 and a network node 110 may each include one or more chips, system-on-chips (SoCs) , chipsets, packages, or devices that individually or collectively constitute or comprise a processing system, such as a processing system 140 of the UE 120 or a processing system 145 of the network node 110. A processing system (for example, the processing system 140 and / or the processing system 145) includes processor (or “processing” ) circuitry in the form of one or multiple processors, microprocessors, processing units (such as central processing units (CPUs) , graphics processing units (GPUs) , neural processing units (NPUs) (also referred to as neural network processors or deep learning processors (DLPs) ) , and / or digital signal processors (DSPs) ) , processing blocks, application-specific integrated circuits (ASICs) , programmable logic devices (PLDs) , or other discrete gate or transistor logic or circuitry (any one or more of which may be generally referred to herein individually as a “processor” or collectively as “the processor” or “the processor circuitry” ) . Such processors may be individually or collectively configurable or configured to perform various functions or operations described herein. A group of processors collectively configurable or configured to perform a set of functions may include a first processor configurable or configured to perform a first function of the set and a second processor configurable or configured to perform a second function of the set. In some other examples, each of a group of processors may be configurable or configured to perform a same set of functions.
[0044] The processing system 140 and the processing system 145 may each include memory circuitry in the form of one or multiple memory devices, memory blocks, memory elements, or other discrete gate or transistor logic or circuitry, each of which may include or implement tangible storage media such as random-access memory (RAM) or read-only memory (ROM) , or combinations thereof (any one or more of which may be generally referred to herein individually as a “memory” or collectively as “the memory” or “the memory circuitry” ) . One or more of the memories may be coupled (for example, operatively coupled, communicatively coupled, electronically coupled, or electrically coupled) with one or more of the processors and may individually or collectively store processor-executable code or instructions (such as software) that, when executed by one or more of the processors, may configure one or more of the processors to perform various functions or operations described herein. Additionally or alternatively, in some examples, one or more of the processors may be configured to perform various functions or operations described herein without requiring configuration by software. “Software” shall be construed broadly to mean instructions, instruction sets, code, code segments, program code, programs, subprograms, software modules, applications, software applications, software packages, routines, subroutines, objects, executables, threads of execution, procedures, or functions, among other examples, whether referred to as software, firmware, middleware, microcode, hardware description language, or otherwise.
[0045] The processing system 140 and the processing system 145 may each include or be coupled with one or more modems (such as a cellular (for example, a 5G or 6G compliant) modem) . In some examples, one or more processors of the processing system 140 and / or the processing system 145 include or implement one or more of the modems. The processing system 140 and the processing system 145 may also include or be coupled with multiple radios (collectively “the radio” ) , multiple RF chains, or multiple transceivers, each of which may in turn be coupled with one or more of multiple antennas. In some examples, one or more processors of the processing system 140 and / or the processing system 145 include or implement one or more of the radios, RF chains, or transceivers. An RF chain may include one or more filters, mixers, oscillators, amplifiers, analog-to-digital converters (ADCs) , and / or other devices that convert between an analog signal (such as for transmission or reception via an air interface) and a digital signal (such as for processing by the processing system 140 of the UE 120 or by the processing system 145 of the network node 110) .
[0046] A processing system (e.g., the processing system 140 and / or the processing system 145) may generally be a system or a series of machines or components that receives inputs and processes the inputs to produce a set of outputs (which may be passed to other systems or components of, for example, the UE 120) . For example, the processing system 140 of the UE 120 may be a system that includes the various other components or subcomponents of the UE 120. The processing system 140 of the network node 110 may be a system that includes the various other components or subcomponents of the network node 110.
[0047] The processing system 145 of the network node 110 may interface with one or more other components of the network node 110, may process information received from one or more other components (such as inputs or signals) , or may output information to one or more other components. For example, a chip or modem of the network node 110 may include the processing system 145, a first interface to receive or obtain information, and a second interface to output, transmit, or provide information. In some examples, the first interface may be an interface between the processing system 145 of the chip or modem and a receiver, such that the network node 110 may receive information or signal inputs, and the information may be passed to the processing system 145. In some examples, the second interface may be an interface between the processing system 145 of the chip or modem and a transmitter, such that the network node 110 may transmit information output from the chip or modem. Similarly, the processing system 140 of the UE 120 may interface with one or more other components of the UE 120, may process information received from one or more other components (such as inputs or signals) , or may output information to one or more other components. For example, a chip or modem of the UE 120 may include the processing system 140, a first interface to receive or obtain information, and a second interface to output, transmit, or provide information. In some examples, the first interface may be an interface between the processing system 140 of the chip or modem and a receiver, such that the UE 120 may receive information or signal inputs, and the information may be passed to the processing system 140. In some examples, the second interface may be an interface between the processing system 140 of the chip or modem and a transmitter, such that the UE 120 may transmit information output from the chip or modem. A person having ordinary skill in the art will readily recognize that the second interface described above also may obtain or receive information or signal inputs, and the first interface described above may also output, transmit, or provide information.
[0048] A network node 110 and a UE 120 may each include one or multiple antennas or antenna arrays. Typical network nodes 110 and UEs 120 may include multiple antennas, which may be organized or structured into one or more antenna panels, one or more antenna groups, one or more sets of antenna elements, or one or more antenna arrays, among other examples. As used herein, the term “antenna” can refer to one or more antennas, one or more antenna panels, one or more antenna groups, one or more sets of antenna elements, or one or more antenna arrays. The term “antenna panel” can refer to a group of antennas (such as antenna elements) arranged in an array or panel, which may facilitate beamforming by manipulating parameters associated with the group of antennas. The term “antenna module” may refer to circuitry including one or more antennas as well as one or more other components (such as filters, amplifiers, or processors) associated with integrating the antenna module into a wireless communication device such as the network node 110 and the UE 120.
[0049] A network node 110 may be, may include, or may also be referred to as an NR network node, a 5G network node, a 6G network node, a Node B, a gNB, an access point (AP) , a transmission reception point (TRP) , a network entity, a network element, a network equipment, and / or another type of device, component, or system included in a radio access network (RAN) . In various deployments, a network node 110 may be implemented as a single physical node (for example, a single physical structure) or may be implemented as two or more physical nodes (for example, two or more distinct physical structures) . For example, a network node 110 may be a device or system that implements a part of a radio protocol stack, a device or system that implements a full radio protocol stack (such as a full gNB protocol stack) , or a collection of devices or systems that collectively implement the full radio protocol stack. For example, and as shown, a network node 110 may be an aggregated network node having an aggregated architecture, meaning that the network node 110 may implement a full radio protocol stack that is physically and logically integrated within a single physical structure in the wireless communication network 100. For example, an aggregated network node 110 may consist of a single standalone base station or a single TRP that operates with a full radio protocol stack to enable or facilitate communication between a UE 120 and a core network of the wireless communication network 100.
[0050] Alternatively, and as also shown, a network node 110 may be a disaggregated network node (sometimes referred to as a disaggregated base station) , having a disaggregated architecture, meaning that the network node 110 may operate with a radio protocol stack that is physically distributed and / or logically distributed among two or more nodes in the same geographic location or in different geographic locations. An example disaggregated network node architecture is described in more detail below with reference to Fig. 2. In some deployments, disaggregated network nodes 110 may be used in an integrated access and backhaul (IAB) network, in an open radio access network (O-RAN) (such as a network configuration in compliance with the O-RAN Alliance) , or in a virtualized radio access network (vRAN) , also known as a cloud radio access network (C-RAN) , to facilitate scaling by separating network functionality into multiple units or modules that can be individually deployed.
[0051] The network nodes 110 of the wireless communication network 100 may include one or more central units (CUs) , one or more distributed units (DUs) , and one or more radio units (RUs) . A CU may host one or more higher layers, such as a radio resource control (RRC) layer, a packet data convergence protocol (PDCP) layer, and a service data adaptation protocol (SDAP) layer, among other examples. A DU may host one or more of a radio link control (RLC) layer, a medium access control (MAC) layer, and / or one or more higher physical (PHY) layers depending, at least in part, on a functional split, such as a functional split defined by the 3GPP. In some examples, a DU also may host a lower PHY layer that is configured to perform functions, such as a fast Fourier transform (FFT) , an inverse FFT (IFFT) , beamforming, and / or physical random access channel (PRACH) extraction and filtering, among other examples. An RU may perform RF processing functions or lower PHY layer functions, such as an FFT, an IFFT, beamforming, or PRACH extraction and filtering, among other examples, according to a functional split, such as a lower layer split (LLS) . In such an architecture, each RU can be operated to handle over the air (OTA) communication with one or more UEs 120. In some examples, a single network node 110 may include a combination of one or more CUs, one or more DUs, and / or one or more RUs. In some examples, a CU, a DU, and / or an RU may be implemented as a virtual unit, such as a virtual central unit (VCU) , a virtual distributed unit (VDU) , or a virtual radio unit (VRU) , among other examples, which may be implemented as a virtual network function, such as in a cloud deployment.
[0052] Some network nodes 110 (for example, a base station, an RU, or a TRP) may provide communication coverage for a particular geographic area. The term “cell” can refer to a coverage area of a network node 110 or to a network node 110 itself, depending on the context in which the term is used. A network node 110 may support one or more cells (for example, each cell may support communication within an angular (for example, 60 degree) range around the network node) . In some examples, a network node 110 may provide communication coverage for a macro cell, a pico cell, a femto cell, or another type of cell. A macro cell may cover a relatively large geographic area (for example, several kilometers in radius) and may allow unrestricted access by UEs 120 with associated service subscriptions. A pico cell may cover a relatively small geographic area and may also allow unrestricted access by UEs 120 with associated service subscriptions. A femto cell may cover a relatively small geographic area (for example, a home) and may allow restricted access by UEs 120 having association with the femto cell (for example, UEs 120 in a closed subscriber group (CSG) ) . In some examples, a cell may not necessarily be stationary. For example, the geographic area of the cell may move according to the location of an associated mobile network node 110 (for example, a train, a satellite, an unmanned aerial vehicle, or an NTN network node) .
[0053] The wireless communication network 100 may be a heterogeneous network that includes network nodes 110 of different types, such as macro network nodes, pico network nodes, femto network nodes, relay network nodes, aggregated network nodes, and / or disaggregated network nodes, among other examples. Various different types of network nodes 110 may generally transmit at different power levels, serve different coverage areas (for example, a cell 130a and a cell 130b) , and / or have different impacts on interference in the wireless communication network 100 than other types of network nodes 110.
[0054] The UEs 120 may be physically dispersed throughout the coverage area of the wireless communication network 100, and each UE 120 may be stationary or mobile. A UE 120 may be, may include, or may also be referred to as an access terminal, a mobile station, or a subscriber unit. A UE 120 may be, include, or be coupled with a cellular phone (for example, a smart phone) , a personal digital assistant (PDA) , a wireless modem, a wireless communication device, a handheld device, a laptop computer, a cordless phone, a wireless local loop (WLL) station, a tablet, a camera, a netbook, a smartbook, an ultrabook, a medical device, a biometric device, a wearable device (for example, a smart watch, smart clothing, smart glasses, a smart wristband, or smart jewelry) , a gaming device, an entertainment device (for example, a music device, a video device, or a satellite radio) , an XR device, a vehicular component or sensor, a smart meter or sensor, industrial manufacturing equipment, a Global Navigation Satellite System (GNSS) device (such as a Global Positioning System device or another type of positioning device) , a UE function of a network node, and / or any other suitable device or function that may communicate via a wireless medium.
[0055] Some UEs 120 may be classified according to different categories in association with different complexities and / or different capabilities. UEs 120 in a first category may facilitate massive IoT in the wireless communication network 100, and may offer low complexity and / or cost relative to UEs 120 in a second category. UEs 120 in a second category may include mission-critical IoT devices, legacy UEs, baseline UEs, high-tier UEs, advanced UEs, full-capability UEs, and / or premium UEs that are capable of URLLC, eMBB, and / or precise positioning in the wireless communication network 100, among other examples. A third category of UEs 120 may have mid-tier complexity and / or capability (for example, a capability between that of the UEs 120 of the first category and that of the UEs 120 of the second capability) . A UE 120 of the third category may be referred to as a reduced capability UE ( “RedCap UE” ) , a mid-tier UE, an NR-Light UE, and / or an NR-Lite UE, among other examples. RedCap UEs may bridge a gap between the capability and complexity of NB-IoT devices and / or eMTC UEs, and mission-critical IoT devices and / or premium UEs. RedCap UEs may include, for example, wearable devices, IoT devices, industrial sensors, or cameras that are associated with a limited bandwidth, power capacity, and / or transmission range, among other examples. RedCap UEs may support healthcare environments, building automation, electrical distribution, process automation, transport and logistics, or smart city deployments, among other examples.
[0056] In some examples, a network node 110 may be, may include, or may operate as an RU, a TRP, or a base station that communicates with one or more UEs 120 via a radio access link (which may be referred to as a “Uu” link) . The radio access link may include a downlink and an uplink. “Downlink” (or “DL” ) refers to a communication direction from a network node 110 to a UE 120, and “uplink” (or “UL” ) refers to a communication direction from a UE 120 to a network node 110. Downlink and uplink resources may include time domain resources (for example, frames, subframes, slots, and symbols) , frequency domain resources (for example, frequency bands, component carriers (CCs) , subcarriers, resource blocks, and resource elements) , and spatial domain resources (for example, particular transmit directions or beams) .
[0057] Frequency domain resources may be subdivided into bandwidth parts (BWPs) . A BWP may be a block of frequency domain resources (for example, a continuous set of resource blocks (RBs) within a full component carrier bandwidth) that may be configured at a UE-specific level. A UE 120 may be configured with both an uplink BWP and a downlink BWP (which may be the same or different) . Each BWP may be associated with its own numerology (indicating a sub-carrier spacing (SCS) and cyclic prefix (CP) ) . A BWP may be dynamically configured or activated (for example, by a network node 110 transmitting a downlink control information (DCI) configuration to the one or more UEs 120) and / or reconfigured (for example, in real-time or near-real-time) according to changing network conditions in the wireless communication network 100 and / or specific requirements of one or more UEs 120. An active BWP defines the operating bandwidth of the UE 120 within the operating bandwidth of the serving cell. The use of BWPs enables more efficient use of the available frequency domain resources in the wireless communication network 100 because fewer frequency domain resources may be allocated to a BWP for a UE 120 (which may reduce the quantity of frequency domain resources that a UE 120 is required to monitor and reduce UE power consumption by enabling the UE to monitor fewer frequency domain resources) , leaving more frequency domain resources to be spread across multiple UEs 120. Thus, BWPs may also assist in the implementation of lower-capability (for example, RedCap) UEs 120 by facilitating the configuration of smaller bandwidths for communication by such UEs 120 and / or by facilitating reduced UE power consumption.
[0058] As used herein, a downlink signal may be or include a reference signal, control information, or data. For example, downlink reference signals include a primary synchronization signal (PSS) , a secondary SS (SSS) , an SS block (SSB) (for example, that includes a PSS, an SSS, and a physical broadcast channel (PBCH) ) , a demodulation reference signal (DMRS) , a phase tracking reference signal (PTRS) , a tracking reference signal (TRS) , and a channel state information (CSI) reference signal (CSI-RS) , among other examples. A downlink signal carrying control information or data may be transmitted via a downlink channel. Downlink channels may include one or more control channels for transmitting control information and one or more data channels for transmitting data. Downlink reference signals may be transmitted in addition to, or multiplexed with, downlink control channel communications and / or downlink data channel communications. A downlink control channel may be specifically used to transmit DCI from a network node 110 to a UE 120. DCI generally contains the information the UE 120 needs to identify RBs in a subsequent subframe and how to decode them, including a modulation and coding scheme (MCS) or redundancy version parameters. Different DCI formats carry different information, such as scheduling information in the form of downlink or uplink grants, slot formal indicators (SFIs) , preemption indicators (PIs) , transmit power control (TPC) commands, hybrid automatic repeat request (HARQ) information, new data indicators (NDIs) , among other examples. A downlink data channel may be used to transmit downlink data (for example, user data associated with a UE 120) from a network node 110 to a UE 120. Downlink control channels may include physical downlink control channels (PDCCHs) , and downlink data channels may include physical downlink shared channels (PDSCHs) . Control information or data communications may be transmitted on a PDCCH and PDSCH, respectively. For example, a PDCCH can carry DCI, while a PDSCH can carry a MAC control element (MAC-CE) , an RRC message, or user data, among other examples. Each PDSCH may carry one or more transport blocks (TBs) of data.
[0059] As used herein, an uplink signal may include a reference signal, control information, or data. For example, uplink reference signals include a sounding reference signal (SRS) , a PTRS, and a DMRS, among other examples. An uplink signal carrying control information or data may be transmitted via an uplink channel. An uplink channel may include one or more control channels for transmitting control information and one or more data channels for transmitting data. Uplink reference signals may be transmitted in addition to, or multiplexed with, uplink control channel communications and / or uplink data channel communications. An uplink control channel may be specifically used to transmit uplink control information (UCI) from a UE 120 to a network node 110. An uplink data channel may be used to transmit uplink data (for example, user data associated with a UE 120) from a UE 120 to a network node 110. Uplink control channels may include physical uplink control channels (PUCCHs) , and uplink data channels may include physical uplink shared channels (PUSCHs) . Control information or data communications may be transmitted on a PUCCH and PUSCH, respectively. For example, a PUCCH can carry UCI, while a PUSCH can carry a MAC-CE, an RRC message, or user data, among other examples. UCI can include a scheduling request (SR) , HARQ feedback information (for example, a HARQ acknowledgement (ACK) indication or a HARQ negative acknowledgement (NACK) indication) , uplink power control information (for example, an uplink TPC parameter) , and / or CSI, among other examples. CSI can include a channel quality indicator (CQI) (indicative of downlink channel conditions to facilitate selection of transmission parameters, such as an MCS, by a network node 110) , a precoding matrix indicator (PMI) , a CSI-RS resource indicator (CRI) (for example, indicative of a beam used to transmit a CSI-RS) , an SS / PBCH resource block indicator (SSBRI) (for example, indicative of a beam used to transmit an SSB) , a layer indicator (LI) , a rank indicator (RI) , and / or measurement information (for example, a layer 1 (L1) -reference signal received power (RSRP) parameter, a received signal strength indicator (RSSI) parameter, a reference signal received quality (RSRQ) parameter, among other examples) which can be used for beam management, among other examples. Each PUSCH may carry one or more TBs of data.
[0060] The information (for example, data, control information, or reference signal information) transmitted by a network node 110 to a UE 120, or vice versa, may be represented as a sequence of binary bits that are mapped (for example, modulated) to an analog signal waveform (for example, a discrete Fourier transform (DFT) -spread-orthogonal frequency division multiplexing (OFDM) (DFT-s-OFDM) waveform or a CP-OFDM waveform) that is transmitted by the network node 110 or UE 120 over a wireless communication channel. In some examples, the network node 110 or the UE 120 (for example, using the processing system 145 or the processing system 140, respectively) may select an MCS (for example, an order of quadrature amplitude modulation (QAM) , such as 64-QAM, 128-QAM, or 256-QAM, among other examples) for a downlink signal or an uplink signal. For example, the network node 110 may select an MCS for a downlink signal in accordance with UCI received from the UE 120. The network node 110 may transmit, to the UE 120, an indication of the selected MCS for the downlink signal, such as via DCI that schedules the downlink signal. As another example, the network node 110 may transmit, and the UE 120 may receive, an indication of an MCS to be applied for the one or more uplink signals, such as via DCI scheduling transmission of the one or more uplink signals.
[0061] The network node 110 or the UE 120 (such as by using the processing system 145 or the processing system 140, respectively, and / or one or more coupled modems) may perform signal processing on the information (such as filtering, amplification, modulation, digital-to-analog conversion, an IFFT operation, multiplexing, interleaving, mapping, and / or encoding, among other examples) to generate a processed signal in accordance with the selected MCS. In some examples, the network node 110 or the UE 120 (for example, using the processing system 145 or the processing system 140, respectively, and / or one or more coupled encoders or modems) may perform a channel coding operation or a forward error correction (FEC) operation to control errors in transmitted information. For example, the network node 110 or the UE 120 may perform an encoding operation to generate encoded information (such as by selectively introducing redundancy into the information, typically using an error correction code (ECC) , such as a polar code or an LDPC code) . The network node 110 or the UE 120 (for example, using the processing system 145 and / or one or more modems) may further perform spatial processing (for example, precoding) on the encoded information to generate one or more processed or precoded signals for downlink or uplink transmission, respectively. In some examples, the network node 110 or the UE 120 may perform codebook-based precoding or non-codebook-based precoding. Codebook-based precoding may involve selecting a precoder (for example, a precoding matrix) using a codebook. For example, the network node 110 may provide precoding information indicating which precoder, defined by the codebook, is to be used by the UE 120. Non-codebook-based precoding may involve selecting or deriving a precoder based on, or otherwise associated with, one or more downlink or uplink signal measurements. The network node 110 or the UE 120 may transmit the processed downlink or uplink signals, respectively, via one or more antennas.
[0062] The network node 110 or the UE 120 may receive uplink signals or downlink signals, respectively, via one or more antennas. The network node 110 or the UE 120 (for example, using the processing system 145 or the processing system 140, respectively, and / or one or more coupled modems) may perform signal processing (for example, in accordance with the MCS) on the received uplink or downlink signals, respectively (such as filtering, amplification, demodulation, analog-to-digital conversion, an FFT operation, demultiplexing, deinterleaving, de-mapping, equalization, interference cancellation, and / or decoding, among other examples) , to map the received signal (s) to a sequence of binary bits (for example, received information) that estimates the information transmitted by the network node 110 or the UE 120 via the downlink or uplink signals. The network node 110 or the UE 120 (for example, using the processing system 145 or the processing system 140, respectively, and / or a coupled decoder or one or more modems) may decode the received information (such as by using an ECC, a decoding operation, and / or an FEC operation) to detect errors and / or correct bit errors in the received information to generate decoded information. The decoded information may estimate the information transmitted via the downlink or uplink signals.
[0063] In some examples, a UE 120 and a network node 110 may perform MIMO communication. “MIMO” generally refers to transmitting or receiving multiple signals (such as multiple layers or multiple data streams) simultaneously over the same time and frequency resources. MIMO techniques generally exploit multipath propagation. A network node 110 and / or UE 120 may communicate using massive MIMO, multi-user MIMO, or single-user MIMO, which may involve rapid switching between beams or cells. For example, the amplitudes and / or phases of signals transmitted via antenna elements and / or sub-elements may be modulated and shifted relative to each other (such as by manipulating a phase shift, a phase offset, and / or an amplitude) to generate one or more beams, which is referred to as beamforming. For example, the network node 110b may generate one or more beams 160a, and the UE 120b may generate one or more beams 160b. The term “beam” may refer to a directional transmission of a wireless signal toward a receiving device or otherwise in a desired direction, a directional reception of a wireless signal from a transmitting device or otherwise in a desired direction, a direction associated with a directional transmission or directional reception, a set of directional resources associated with a signal transmission or signal reception (for example, an angle of arrival, a horizontal direction, and / or a vertical direction) , a set of parameters that indicate one or more aspects of a directional signal, a direction associated with the signal, and / or a set of directional resources associated with the signal, among other examples.
[0064] MIMO may be implemented using various spatial processing or spatial multiplexing operations. In some examples, MIMO may include a massive MIMO technique which may be associated with an increased (for example, “massive” ) quantity of antennas at the network node 110 and / or at the UE 120, such as in a network implementing mmWave technology. Massive MIMO may improve communication reliability by enabling a network node 110 and / or a UE 120 to communicate the same data across different propagation (or spatial) paths. In some examples, MIMO may support simultaneous transmission to multiple receivers, referred to as multi-user MIMO (MU-MIMO) . Some RATs may employ MIMO techniques, such as multi-TRP (mTRP) operation (including redundant transmission or reception on multiple TRPs) , reciprocity in the time domain or the frequency domain, single-frequency-network (SFN) transmission, or non-coherent joint transmission (NC-JT) .
[0065] To support MIMO techniques, the network node 110 and the UE 120 may perform one or more beam management operations, such as an initial beam acquisition operation, one or more beam refinement operations, and / or a beam recovery operation. For example, an initial beam acquisition operation may involve the network node 110 transmitting signals (for example, SSBs, CSI-RSs, or other signals) via respective beams (for example, of the beams 160a of the network node 110) and the UE 120 receiving and measuring the signal (s) via respective beams of multiple beams (for example, from the beams 160b of the UE 120) to identify a best beam (or beam pair) for communication between the UE 120 and the network node 110. For example, the UE 120 may transmit an indication (for example, in a message associated with a random access channel (RACH) operation) of a (best) identified beam of the network node 110 (for example, by indicating an SSBRI or other identifier associated with the beam) . A beam refinement operation may involve a first device (for example, the UE 120 or the network node 110) transmitting signal (s) via a subset of beams (for example, identified based on, or otherwise associated with, measurements reported as part of one or more other beam management operations) . A second device (for example, the network node 110 or the UE 120) may receive the signal (s) via a single beam (for example, to identify the best beam for communication from the subset of beams) . The beam (s) may be identified via one or more spatial parameters, such as a transmission configuration indicator (TCI) state and / or a quasi co-location (QCL) parameter, among other examples. The network node 110 and the UE 120 may increase reliability and / or achieve efficiencies in throughput, signal strength, and / or other signal properties for massive MIMO operations by performing the beam management operations.
[0066] Some aspects and techniques as described herein may be implemented, at least in part, using an artificial intelligence (AI) program (for example, referred to herein as an “AI / ML model” ) , such as a program that includes a machine learning (ML) model and / or an artificial neural network (ANN) model. The AI / ML model may be deployed at one or more devices 165 (for example, one or more network nodes 110, one or more UEs 120, and / or one or more servers, and / or one or more components of a cloud computing network, among other examples) . For example, in an deployment where AI / ML functionality is performed independently at a device 165, sometimes referred to as “overlay AI / ML” , the AI / ML model (or an instance or portion of the AI / ML model) may be deployed at a UE 120 (for example, at the processing system 140) , a network node 110 (for example, at the processing system 145) , one or more servers, and / or one or more components of a cloud computing network, among other examples. Additionally or alternatively, in a deployment where AI / ML functionality is coordinated between different devices 165, sometimes referred to as “coordinated AI / ML” , or performed at all device and network layers, sometimes referred to as “native AI / ML” , the AI / ML model (or an instance of the AI / ML model) may be deployed at multiple devices 165 (for example, a first portion of the AI / ML model may be deployed at a UE 120 and a second portion of the AI / ML model may be deployed at a network node 110) . In other examples of coordinated AI / ML and / or native AI / ML, a first AI / ML model may be deployed at a UE 120 and a second AI / ML model may be deployed at a network node 110. The AI / ML model (s) may be configured to enhance various aspects of the wireless communication network 100 (for example, to increase privacy, reliability, and / or efficient use of network bandwidth, and / or to reduce latency, among other examples) . For example, the AI / ML model (s) may be trained to identify patterns or relationships in data corresponding to the wireless communication network 100, a device, and / or an air interface, among other examples. The AI / ML model (s) may support operational decisions relating to one or more aspects associated with wireless communications devices, networks, or services.
[0067] Accordingly, in some examples, the AI / ML model (s) may enable AI-as-a-Service (for example, an end-to-end AI / ML service via a user plane) for use cases such as a self-organizing network (SON) , minimization of drive test (MDT) , quality of experience (QoE) , positioning, sensing, predictive mobility, and / or traffic prediction, among other examples. In some examples, AI-as-a-Service use cases may include measurement collection reporting by a UE 120, device selection criteria (for example, according to a geographical area where measurements are to be collected and / or UE capabilities to be used to collected measurements) , and / or reporting configurations (for example, reporting parameters such as location, time, and / or sensor information, among other examples. Additionally or alternatively, the AI / ML model (s) may enable AI / ML procedures (for example, RAN-triggered service establishment, configuration, inferencing using UE-side and / or network-side models, performance monitoring and / or management, and / or capability signaling, among other examples) . Additionally or alternatively, the AI / ML model (s) may enable RAN-based AI / ML services via one or more application program interfaces (APIs) and / or management interfaces for use cases such as beam management, radio resource monitoring (RRM) relaxation, mobility prediction, load prediction, network energy savings, and / or coverage and capacity improvements, among other examples) .
[0068] In some aspects, the UE 120 may include a communication manager 150. As described in more detail elsewhere herein, the communication manager 150 may construct a base graph according to a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two; construct a set of lifting values for the core structure; and transmit an LDPC code to a receiver, wherein the LDPC code is associated with the base graph and the set of lifting values. Additionally, or alternatively, the communication manager 150 may receive an LDPC code associated with a base graph that includes a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two; and decode the LDPC code in accordance with the base graph and a set of lifting values associated with the core structure. Additionally, or alternatively, the communication manager 150 may perform one or more other operations described herein.
[0069] In some aspects, the network node 110 may include a communication manager 155. As described in more detail elsewhere herein, the communication manager 155 may construct a base graph according to a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two; construct a set of lifting values for the core structure; and transmit an LDPC code to a receiver, wherein the LDPC code is associated with the base graph and the set of lifting values. Additionally, or alternatively, the communication manager 155 may receive an LDPC code associated with a base graph that includes a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two; and decode the LDPC code in accordance with the base graph and a set of lifting values associated with the core structure. Additionally, or alternatively, the communication manager 155 may perform one or more other operations described herein.
[0070] As indicated above, Fig. 1 is provided as an example. Other examples may differ from what is described with regard to Fig. 1.
[0071] Fig. 2 is a diagram illustrating an example disaggregated network node architecture 200, in accordance with the present disclosure. One or more components of the example disaggregated network node architecture 200 may be, may include, or may be included in one or more network nodes (such one or more network nodes 110) . The disaggregated network node architecture 200 may include a CU 210 that can communicate directly with a core network 220 via a backhaul link, or that can communicate indirectly with the core network 220 via one or more disaggregated control units, such as a non-real-time (Non-RT) RAN intelligent controller (RIC) 250 associated with a Service Management and Orchestration (SMO) Framework 260 and / or a near-real-time (Near-RT) RIC 270 (for example, via an E2 link) . The CU 210 may communicate with one or more DUs 230 via respective midhaul links, such as via F1 interfaces. Each of the DUs 230 may communicate with one or more RUs 240 via respective fronthaul links. Each of the RUs 240 may communicate with one or more UEs 120 via respective RF access links. In some deployments, a UE 120 may be simultaneously served by multiple RUs 240.
[0072] Each of the components of the disaggregated network node architecture 200, including the CUs 210, the DUs 230, the RUs 240, the Near-RT RICs 270, the Non-RT RICs 250, and the SMO Framework 260, may include one or more interfaces or may be coupled with one or more interfaces for receiving or transmitting signals, such as data or information, via a wired or wireless transmission medium.
[0073] In some aspects, the CU 210 may be logically split into one or more CU user plane (CU-UP) units and one or more CU control plane (CU-CP) units. A CU-UP unit may communicate bidirectionally with a CU-CP unit via an interface, such as the E1 interface when implemented in an O-RAN configuration. The CU 210 may be deployed to communicate with one or more DUs 230, as necessary, for network control and signaling. Each DU 230 may correspond to a logical unit that includes one or more base station functions to control the operation of one or more RUs 240. For example, a DU 230 may host various layers, such as an RLC layer, a MAC layer, or one or more PHY layers, such as one or more high PHY layers or one or more low PHY layers. Each layer (which also may be referred to as a module) may be implemented with an interface for communicating signals with other layers (and modules) hosted by the DU 230, or for communicating signals with the control functions hosted by the CU 210. Each RU 240 may implement lower layer functionality. In some aspects, real-time and non-real-time aspects of control and user plane communication with the RU (s) 240 may be controlled by the corresponding DU 230.
[0074] The SMO Framework 260 may support RAN deployment and provisioning of non-virtualized and virtualized network elements. For non-virtualized network elements, the SMO Framework 260 may support the deployment of dedicated physical resources for RAN coverage requirements, which may be managed via an operations and maintenance interface, such as an O1 interface. For virtualized network elements, the SMO Framework 260 may interact with a cloud computing platform (such as an open cloud (O-Cloud) platform 290) to perform network element life cycle management (such as to instantiate virtualized network elements) via a cloud computing platform interface, such as an O2 interface. A virtualized network element may include, but is not limited to, a CU 210, a DU 230, an RU 240, a non-RT RIC 250, and / or a Near-RT RIC 270. In some aspects, the SMO Framework 260 may communicate with a hardware aspect of a 4G RAN, a 5G NR RAN, and / or a 6G RAN, such as an open eNB (O-eNB) 280, via an O1 interface. Additionally or alternatively, the SMO Framework 260 may communicate directly with each of one or more RUs 240 via a respective O1 interface. In some deployments, this configuration can enable each DU 230 and the CU 210 to be implemented in a cloud-based RAN architecture, such as a vRAN architecture.
[0075] The Non-RT RIC 250 may include or may implement a logical function that enables non-real-time control and optimization of RAN elements and resources, AI / ML workflows including model training and updates, and / or policy-based guidance of applications and / or features in the Near-RT RIC 270. The Non-RT RIC 250 may be coupled to or may communicate with (such as via an A1 interface) the Near-RT RIC 270. The Near-RT RIC 270 may include or may implement a logical function that enables near-real-time control and optimization of RAN elements and resources via data collection and actions via an interface (such as via an E2 interface) connecting one or more CUs 210, one or more DUs 230, and / or an O-eNB 280 with the Near-RT RIC 270.
[0076] In some aspects, to generate AI / ML models to be deployed in the Near-RT RIC 270, the Non-RT RIC 250 may receive parameters or external enrichment information from external servers. Such information may be utilized by the Near-RT RIC 270 and may be received at the SMO Framework 260 or the Non-RT RIC 250 from non-network data sources or from network functions. In some examples, the Non-RT RIC 250 or the Near-RT RIC 270 may tune RAN behavior or performance. For example, the Non-RT RIC 250 may monitor long-term trends and patterns for performance and may employ AI / ML models to perform corrective actions via the SMO Framework 260 (such as reconfiguration via an O1 interface) or via creation of RAN management policies (such as A1 interface policies) .
[0077] The network node 110, the processing system 145 of the network node 110, the UE 120, the processing system 140 of the UE 120, the CU 210, the DU 230, the RU 240, or any other component (s) of Fig. 1 and / or Fig. 2 may implement one or more techniques or perform one or more operations associated with configuring base graph and lifting structures for LDPC codes, as described in more detail elsewhere herein. For example, the processing system 145 of the network node 110, the processing system 140 of the UE 120, the CU 210, the DU 230, or the RU 240 may perform or direct operations of, for example, process 900 of Fig. 9, process 1000 of Fig. 10, or other processes as described herein (alone or in conjunction with one or more other processors) . Memory of the network node 110 may store data and program code (or instructions) for the network node 110, the CU 210, the DU 230, or the RU 240. In some examples, the memory of the network node 110 may store data relating to a UE 120, such as RRC state information or a UE context. Memory of a UE 120 may store data and program code (or instructions) for the UE 120, such as context information. In some examples, the memory of the UE 120 or the memory of the network node 110 may include a non-transitory computer-readable medium storing a set of instructions for wireless communication. For example, the set of instructions, when executed by one or more processors (for example, of the processing system 145 or the processing system 140) of the network node 110, the UE 120, the CU 210, the DU 230, or the RU 240, may cause the one or more processors to perform process 900 of Fig. 9, process 1000 of Fig. 10, or other processes as described herein. In some examples, executing instructions may include running the instructions, converting the instructions, compiling the instructions, and / or interpreting the instructions, among other examples.
[0078] In some aspects, a transmitter includes means for constructing a base graph according to a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two; means for constructing a set of lifting values for the core structure; and / or means for transmitting an LDPC code to a receiver, wherein the LDPC code is associated with the base graph and the set of lifting values. In some aspects, the means for the transmitter to perform operations described herein may include, for example, one or more of a radio, one or more RF chains, one or more transceivers, one or more antennas, one or more modems, a reception component (for example, reception component 1102 depicted and described in connection with Fig. 11) , and / or a transmission component (for example, transmission component 1104 depicted and described in connection with Fig. 11) , among other examples. In some aspects, the transmitter may be the UE 120, and the means for the transmitter to perform operations described herein may include, for example, one or more of communication manager 150 or processing system 140. Additionally, or alternatively, the transmitter may be the network node 110, and the means for the transmitter to perform operations described herein may include, for example, one or more of communication manager 155 or processing system 145.
[0079] In some aspects, a receiver includes means for receiving an LDPC code associated with a base graph that includes a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two; and / or means for decoding the LDPC code in accordance with the base graph and a set of lifting values associated with the core structure. In some aspects, the means for the receiver to perform operations described herein may include, for example, one or more of a radio, one or more RF chains, one or more transceivers, one or more antennas, one or more modems, a reception component (for example, reception component 1202 depicted and described in connection with Fig. 12) , and / or a transmission component (for example, transmission component 1204 depicted and described in connection with Fig. 12) , among other examples. In some aspects, the receiver may be the UE 120, and the means for the receiver to perform operations described herein may include, for example, one or more of communication manager 150 or processing system 140. Additionally, or alternatively, the transmitter may be the network node 110, and the means for the transmitter to perform operations described herein may include, for example, one or more of communication manager 155 or processing system 145.
[0080] As indicated above, Fig. 2 is provided as an example. Other examples may differ from what is described with regard to Fig. 2.
[0081] Fig. 3 is a diagram illustrating an example 300 of communication using LDPC codes, in accordance with the present disclosure. As shown in Fig. 3, example 300 includes communication between a first wireless node, shown in Fig. 3 and referred to herein as transmitter 310, and a second wireless node, shown in Fig. 3 and referred to herein as receiver 320. As shown in Fig. 3, the transmitter 310 includes an LDPC encoder 315 and the receiver 320 includes an LDPC decoder 325, which the transmitter 310 and the receiver 320 may use to implement an LDPC channel coding scheme in which LDPC codes are used for one or more data channel transmissions. For example, in some aspects, the transmitter 310 may correspond to a network node 110 and the receiver 320 may correspond to a UE 120, and the LDPC channel coding scheme may be used for one or more PDSCH transmissions from the network node 110 to the UE 120. Additionally, or alternatively, the transmitter 310 may correspond to a UE 120 and the receiver 320 may correspond to a network node 110, and the LDPC channel coding scheme may be used for one or more PUSCH transmissions from the UE 120 to the network node 110. Additionally, or alternatively, the transmitter 310 may correspond to a first UE 120 and the receiver 320 may correspond to a second UE 120, and the LDPC channel coding scheme may be used for one or more physical sideling shared channel (PSSCH) transmissions from the first UE 120 to the second UE 120. In some aspects, the transmitter 310 and the receiver 320 may communicate in a wireless network, such as wireless network 100.
[0082] In some aspects, a communication from the transmitter 310 to the receiver 320 may be encoded based at least in part on an error correcting code (sometimes referred to as an error correcting scheme) , such that the receiver 320 can determine whether the communication was properly transmitted (e.g., to verify that the communication was not corrupted by noise or the like) and / or so that the receiver 320 can correct any transmission errors using redundant bits provided by the error correcting code. One example of an error correcting code is an LDPC code. A communication may be encoded according to an LDPC channel coding scheme to provide for error detection at the receiver 320. Encoding for an LDPC code may be performed based at least in part on a base graph (e.g., a sparse bipartite graph) that may identify a codeword to be generated from an input data set and / or information to append to an input data set to form the LDPC code.
[0083] More particularly, as shown in Fig. 3, the transmitter 310 may be in wireless communication with the receiver 320. When the transmitter 310 transmits data to the receiver 320, the transmitter 310 may first encode the data using an error correcting code, such as an LDPC code. For example, as shown in Fig. 3, the transmitter 310 may process raw data 330 (e.g., information bits) to be transmitted to the receiver 320 by feeding the raw data 330 through the LDPC encoder 315, among other signal processing components. The transmitter 310 may perform other signal processing operations (e.g., interleaving or the like) , which are not shown in Fig. 3. The LDPC encoder 315 may add error correction bits (e.g., parity bits) to the raw data 330 based at least in part on a selected base graph and / or based at least in part on a target code rate, forming an encoded data stream 332. In some examples, the target code rate may be expressed as R=k / n, where R is the target code rate, k is a number of information bits in the raw data 330 input to the LDPC encoder 315, and n is a total number of bits in the encoded data stream 332 transmitted to the receiver 320 (e.g., the target code rate is the proportion of the encoded data stream 332 that is useful, or non-redundant) . For example, LDPC codes associated with a lower code rate provide more error protection, but may incur more overhead, relative to LDPC codes with a higher code rate.
[0084] As further shown in Fig. 3, the transmitter 310 may transmit the encoded data stream 332 to the receiver 320 over a wireless link (e.g., a wireless access link for uplink and / or downlink communication, or a wireless sidelink for sidelink communication) , where the encoded data stream 332 is fed through the LDPC decoder 325 (and, in some examples, other signal processing components such as a deinterleaver, or the like) in order to recover the information bits from decoded data 334 output from the LDPC decoder 325. For example, the LDPC decoder 325 may use an iterative belief propagation decoding scheme (also known as a message passing decoding scheme) to decode the encoded data stream 332.
[0085] As indicated above, Fig. 3 is provided as an example. Other examples may differ from what is described with regard to Fig. 3.
[0086] Fig. 4 is a diagram illustrating an example 400 of an LDPC base matrix 410 and an LDPC base graph 420 in accordance with the present disclosure. As described herein, the LDPC base matrix 410 and the LDPC base graph 420 may be used to encode an LDPC code, which is a linear block code that can provide error correction capabilities that may be close to channel capacity. In some examples, an LDPC code may be represented according to a base graph (for example, a sparse bipartite graph) that may identify a codeword to be generated from an input data set and / or information to append to an input data set to form the LDPC code. For example, a bipartite graph may include variable nodes representing information bits (also known as message bits or systematic bits) and check nodes representing parity-check equations. The edges between the variable nodes and the check nodes may define how the information bits are related through the parity-check equations, which may be solved using the input data set to determine the values of the parity bits. For example, the original information bits may be combined with the parity bits to form an LDPC code containing the input data (information bits) and the error-correcting (parity) bits.
[0087] As shown in Fig. 4, the LDPC base matrix 410 has a size nc ×nv including a total number of nc rows 412 and a total number of nv columns 414. Additionally, both nc and nv are positive integers, and the total number of rows nc may be smaller than the total number of columns nv. Each entry 416 of the LDPC base matrix 410 is a non-negative integer in a set of integers ranging from 0 to a bounded integer that is independent of the size of the LDPC base matrix 410. For example, the set of integers may be {0, 1} , {0, 1, 2} , or {0, 1, 2, …, dmax} for some dmax integer. Additionally, each row 412 of the LDPC base matrix 410 may be indexed by a respective integer from 0 to nc-1. Each column 414 of the LDPC base matrix 410 may be indexed by a respective integer from 0 to nv-1. In some examples, one or more of the columns 414 of the LDPC base matrix 410 may be treated as a special column, or state column.
[0088] As further shown in Fig. 4, the LDPC base matrix 410 is associated with an LDPC base graph 420 that represents the LDPC base matrix 410. In some examples, the LDPC base graph 420 may be a bipartite graph including a set of variable nodes 422, a set of check nodes 424, and a set of edges 426 connecting the set of variable nodes 422 and the set of check nodes 424. For example, each variable node 422 may be labelled by a respective integer from 0 to nv-1, such that each variable node 422 corresponds to a column 414 of the LDPC base matrix 410. Furthermore, each check node 424 may be labelled by a respective integer from 0 to nc-1, such that each check node 424 corresponds to a row 412 of the LDPC base matrix 410. Additionally, an edge 426 exists between a variable node i and a check node a if a value of the entry at (column a, row i) of the LDPC base matrix 410 is non-zero, and the number of edges between the variable node i and the check node a is equal to the value of the entry at (column a, row i) in the LDPC base matrix 410. For example, the entry at (column 0, row 0) of the LDPC base matrix 410 has a value of 1, which is represented in the edge 426 between variable node 0 and check node 0. Furthermore, a variable node 422 is a state node if a corresponding column 414 of the LDPC base matrix 410 is a state column. In addition, a state variable or state column may refer to a variable node of an LDPC code associated with a transmitted (e.g., punctured) set of information bits.
[0089] As indicated above, Fig. 4 is provided as an example. Other examples may differ from what is described with regard to Fig. 4.
[0090] Fig. 5 is a diagram illustrating an example 500 of a PCM associated with an LDPC code, in accordance with the present disclosure. As described herein, the PCM shown in Fig. 5 may be used for a QC-LDPC code, where the PCM has a compact representation that may enable efficient LDPC encoding and high parallelism in a corresponding LDPC decoder architecture. For example, the PCM is a set of codewords that satisfy one or more parity check conditions, which may be defined according to a base graph and lifting values (also known as a protograph LDPC code) . In particular, as described herein, the base graph (or protograph) is a small graph that captures macroscopic properties associated with the QC-LDPC code, such as an decoding threshold. After the base graph has been constructed, a lifting procedure is applied in which the base graph is copied multiple times and connections between different copies of the base graph are permuted to construct one larger graph. Otherwise, without permuting the different copies of the base graph into one larger graph, there would be K small graphs that are not connected to each other, which may result in no coding gain. The copying and permutation is a cyclic permutation along edges of the base graph, and is generally known as cyclic shift lifting. Accordingly, the LDPC code resulting from the encoding procedure of constructing the base graph and applying the lifting procedure is known as a quasi-cyclic LDPC code.
[0091] In some examples, the base graph associated with an LDPC code may be described or represented as a matrix (or base matrix) , such as the PCM shown in example 500. For example, as shown in Fig. 5, the PCM includes a set of information columns 510, a set of core parity columns 520, and a set of extension parity columns 530, which represent variable nodes associated with the PCM. In addition, the PCM includes a set of core check rows 540 and a set of extension check rows 550, which represent check nodes associated with the PCM. The extension checks 550 include a special extension check 555, and the information columns include one or more punctured information columns 515. For each entry in the PCM, the value is a non-negative integer representing the number of connections between the variable node and the check node corresponding to the entry (e.g., a 0 means that there is no connection between the corresponding variable node and check node, a 1 means that there is 1 edge connecting the corresponding variable node and check node, a 2 means that there are 2 edges connecting the corresponding variable node and check node, and so on) . As described herein, each variable node has a degree that denotes the number of check nodes that the variable node is connected to in the base graph (e.g., the number of rows with a positive value) , where a degree-n variable node is connected to n check nodes. The extension checks 550 include a special extension check 555, and the information columns include one or more punctured information columns 515.
[0092] As further shown in Fig. 5, and by reference number 560, each entry that has a positive value (e.g., one) may be replaced by a permuted identity matrix that indicates the number of cyclic permutations applied to each edge in the base graph. The lifting values may be integers in a range between 0 and Z, where Z is a lifting factor (e.g., the number of copies that are applied to the base graph) . Accordingly, after constructing the base graph and applying the lifting procedure, the resulting QC-LDPC code has a block length equal to the size of the base graph multiplied by the lifting factor.
[0093] As indicated above, Fig. 5 is provided as an example. Other examples may differ from what is described with regard to Fig. 5.
[0094] Fig. 6 is a diagram illustrating an example 600 of lifting for a QC-LDPC code, in accordance with the present disclosure. As described herein, an LDPC code is a binary linear block code over a finite field and protograph-based QC-LDPC codes are a type of LDPC code used in various communication systems (e.g., NR, Wi-Fi, and Ethernet) . For example, to generate a QC-LDPC code, a cyclic lifting operation may be performed over a base graph 610 or a protograph to generate a lifted base graph 630 by taking Z copies of the base graph 610. For example, the Z copies of the base graph 610 may be taken to generate a copied base graph 620, which includes one or more copies of each variable node 612, each check node 614, and each accompanying edge 616 in the base graph 610 or protograph. In some examples, Z is a lifting factor selected from a set of lifting factors, which may determine how many bits are represented for each bit in the original code. The Z like or similar edges of the copied base graph 620 may be connected through respective cyclic permutations to generate the lifted base graph 630.
[0095] For example, the Z graphs in the copied base graph 620 are interconnected to form a larger graph in which each variable node 612 in one copy of the base graph 610 (in the copied base graph 620) is connected to a check node 614 in another copy of the base graph 610 only if the variable node 612 is connected to the check node 614 in the original base graph 610. In other words, for each variable node 612 and check node 614 that are connected in the base graph 610, the Z edges 616 are permuted among the variable nodes 612 and the check nodes 614 that correspond to the same variable node 612 and check node 614 in the base graph 610. Furthermore, to reduce encoding and decoding complexity, the permuting operation may be limited to cyclic lifting, where the permutation is a cyclic shift (e.g., where each non-zero entry in the base graph 610 is replaced with a Z×Z circulant matrix, as shown in Fig. 5) . Accordingly, in a QC-LDPC code, each edge 616 in the base graph 610 may have a cyclic shift value.
[0096] In some examples, the lifted base graph 630 indicates a lifted PCM and an associated QC-LDPC code. In some examples, one or more telecommunications standards may define an LDPC code design that includes QC-LDPC codes with two base graphs (for example, BG1 and BG2) and a cluster of sets of lifting factors. In some examples, a cyclically lifted LDPC code over based on an LDPC base matrix or an LDPC base graph (such as base graph 610) , can be represented as a code over a group ring that may include all binary polynomials modulo xZ+1 over In this representation, each variable node 612 in the base graph 610 can be represented as a binary polynomial b=b0+b1x+b2x2+…+bZ-1xZ-1, where [b0, …, bZ-1] denotes the Z bits associated with Z variable nodes 612 in the lifted base graph 630. Furthermore, cyclically shifting the vector [b0, …, bZ-1] by an element t is equivalent to multiplying the polynomial b by xt. Accordingly, a PCM with lifting values may be represented as or equivalently represented as where aij∈ {0, …, Z-1} denotes the lifting values (or cyclic shift values) and a -1 value denotes no edge between the variable node and the check node (e.g., no edge 616 between the variable node 612 and the check node 614 in the base graph 610 or the lifted base graph 630) . For example, the above representations indicate that the first edge (the entry in the upper-left corner) is cyclically shifted by an integer a00, and the last edge (the entry in the lower-right corner) is cyclically shifted by an integer a33.
[0097] The LDPC polynomial matrix code contains the set of all length-nv vectors over C (x) , such that H (x) C (x) ≡0, where H (x) is an LDPC polynomial matrix of size nc×nv over Each entry of the LDPC polynomial matrix may be a polynomial in and the number of non-zero terms of the polynomial may be given by the corresponding entry of the base matrix, where each exponent of the polynomial may be referred to as a cyclic shift value. Additionally, a lifted LDPC matrix, denoted H, may be defined by replacing each element of the LDPC base matrix by a respective permutation matrix of size Z×Z, where the amount (e.g., sum) of permutations is indicated by the respective exponents of the LDPC polynomial matrix. For example, an LDPC polynomial matrix, denoted H (x) , may have a one-to-one correspondence with a lifted LDPC matrix H and may specify a lifted LDPC code over
[0098] As indicated above, Fig. 6 is provided as an example. Other examples may differ from what is described with regard to Fig. 6.
[0099] Fig. 7 is a diagram illustrating an example 700 of degree-2 chain structures that may be used to simplify LDPC encoding, in accordance with the present disclosure. For example, Fig. 7 illustrates an LDPC base graph PCM 710 that includes a degree-2 chain structure 712, also known as an accumulative chain structure. For example, as shown in Fig. 7, the degree-2 chain structure includes a chain of degree-2 variable nodes (e.g., a chain of columns or variable nodes that each have a degree of 2) and a degree-3 terminating node 714 (e.g., a column or variable node that has a degree of 3) . In some examples, the degree-2 chain structure 712 and the degree-3 terminating node 714 may be used to simplify LDPC encoding for LDPC codes used in one or more communication systems, such as NR. Similarly, Fig. 7 illustrates features associated with a WLAN LDPC code 720, which also includes a degree-2 chain structure 714 and a degree-3 terminating node 724. Furthermore, Fig. 7 illustrates a set of cyclic shift lifting values on the degree-2 chain structure 714 and a degree-3 terminating node 724.
[0100] In some examples, as described herein, a degree-2 chain structure, such as the degree-2 chain structure 712 or the degree-2 chain structure 722, may reduce LDPC encoding complexity. However, the degree-2 chain structure may have an adverse impact on the error floor performance for the resulting LDPC codes. For example, relative to polar codes that may be used for control channel transmissions, broadcast transmissions, or the like, LDPC codes that use the degree-2 chain structure may provide a better error threshold at a BLER above around 1e-4 and a worse error floor below 1e-4 BLER. Accordingly, LDPC codes that use the degree-2 chain structure are limited to supporting use cases associated with an error probability or error floor around 1e-4 or above. Although avoiding degree-2 variable nodes in an LDPC code (e.g., using a variable degree greater than two) may result in a higher reliability and a lower error floor, the lack of degree-2 variable nodes may increase LDPC encoding complexity. Furthermore, in LDPC encoding schemes that avoid degree-2 variable nodes, the resulting PCM is not guaranteed to be full rank.
[0101] Accordingly, some aspects described herein generally relate to base graph and lifting structures that may be used to encode LDPC codes with a low error floor. For example, some aspects relate to an encoding structure on a PCM associated with a QC-LDPC code, where the encoding structure does not contain any degree-2 variable nodes, has a low encoding complexity, and is guaranteed to be invertible or full rank. In some aspects, the base graph associated with a QC-LDPC code may include a core structure, which may be interchangeably referred to as a parity core, corresponding to a square matrix in which three is the minimum variable node degree. For example, in some aspects, the core structure may be an invertible square matrix with an order of four (e.g., a 4×4 matrix) . Furthermore, in some aspects, the core structure may be associated with a set of lifting values that result in the core structure having a monomial determinant. In some aspects, the core structure may be extended to support a PCM with a larger size.
[0102] In this way, by configuring a base graph according to an invertible core structure in which three is the minimum variable node degree, some aspects described herein can be used to generate a valid PCM for a systematic LDPC code. Furthermore, because all square matrices that are 4×4 or larger and have no degree-2 nodes are equivalent to each other via row / column permutations, any core structure with the properties described herein have the same encoding complexity. In addition, by configuring lifting values that result in the core structure having a monomial determinant, some aspects described herein can reduce encoding complexity for the resulting QC-LDPC code. Furthermore, by extending the core structure to a larger size, some aspects described herein may support lower coding rates that may provide more error protection. Moreover, by imposing a condition that the core structure contain no degree-2 variable nodes, some aspects described herein may be used to encode a QC-LDPC code with a low error floor (e.g., 1e-6 and below) , which may support use cases that require a high reliability (e.g., NTN communication or other use cases) .
[0103] As indicated above, Fig. 7 is provided as an example. Other examples may differ from what is described with regard to Fig. 7.
[0104] Figs. 8A-8C are diagrams illustrating examples 800 associated with configuring base graph and lifting structures for LDPC codes, in accordance with the present disclosure. More particularly, as described herein, Fig. 8A illustrates examples for a core structure, represented by a square matrix (e.g., a 4×4 square matrix) in which each column has a degree that is greater than two, where the core structure may be included in a set of parity bit columns (or parity portion) of a base graph associated with an LDPC code. Furthermore, Fig. 8B illustrates examples related to lifting values that may be used for the core structure, and Fig. 8C illustrates examples extending the core structure to a larger PCM size (e.g., an M×M square matrix, where M > 4) .
[0105] Accordingly, in some aspects, the examples 800 shown in Figs. 8A-8C may be used to encode and decode one or more LDPC codes (e.g., QC-LDPC codes) that are communicated from a transmitter to a receiver. For example, in some aspects, the transmitter may be a network node 110 or a UE 120, and the receiver may be a network node 110 or a UE 120, and the examples 800 shown in Figs. 8A-8C may be used to communicate LDPC codes associated with one or more PxxCH transmissions from the transmitter to the receiver. For example, the one or more PxxCH transmissions may include PDSCH transmissions and / or PDCCH transmissions where the transmitter is a network node 110 and the receiver is a UE 120, PUSCH transmissions and / or PUCCH transmissions where the transmitter is a UE 120 and the receiver is a network node, or PSSCH transmissions and / or PSCCH transmissions where the transmitter is a first UE 120 and the receiver is a second UE 120. For example, in some aspects, and using the examples 800 shown in Figs. 8A-8C, the transmitter may construct a base graph according to a set of information bit columns and a set of parity bit columns, where the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two. The transmitter may further construct a set of lifting values for the core structure, and transmit and LDPC code associated with the base graph and the set of lifting values to the receiver, which may decode the LPDC code.
[0106] As shown in Fig. 8A, and by reference number 810, a base graph associated with a QC-LDPC code may include a set of systematic variable nodes, which correspond to information bit columns (e.g., similar to the information columns 510 in Fig. 5) . In addition, the base graph may include a set of parity bit columns, which may include a set of core parity columns (e.g., similar to the core parity columns 520 in Fig. 5) and a set of extension parity columns (e.g., similar to the extension parity columns 530 in Fig. 5) . In some aspects, as shown in Fig. 8A. the core parity columns may include or may be associated with a core structure, or parity matrix, represented by a 4×4 square matrix that includes a set of parity variable nodes in which each parity variable node has a degree greater than two. For example, as shown by reference number 820 and reference number 822, the core structure may include four parity variable nodes (or core parity columns) that contain three 1s in every column and three 1s in every row. For example, in the 4×4 parity matrix shown by reference number 820, the sequence “1011” appears in both the first row and the first column, the sequence “0111” appears in both the second row and the second column, the sequence “1110” appears in both the third row and the third column, and the sequence “1101” appears in both the fourth row and the fourth column. In this way, each parity variable node in the 4×4 parity matrix has a degree of three, with three 1s and one 0 in each column and each row, and the four 0s appearing in different rows. In this example, the 4×4 matrix is a symmetric matrix, in that a transpose of the matrix is equal to the matrix itself, to simplify the description provided herein because zeros have locations that are symmetric around a diagonal. Furthermore, all 4×4 parity matrices that have three 1s and one 0 in each column and each row are equivalent via row and column permutations. For example, reference number 822 depicts a 4×4 parity matrix in which one or more row / column permutations are applied such that the 0 elements appear along a diagonal.
[0107] Accordingly, by constructing a base graph in which the parity columns or parity portion is associated with a 4×4 core structure with three 1s and one 0 in each column and each row, all 4×4 core structures that have such properties may result in equivalent LDPC codes and therefore have the same encoding complexity. Furthermore, in cases where the LDPC code to be transmitted is a systematic LDPC code, the encoding for the LDPC code is mainly determined by the core structure, and the structure (e.g., degree and / or edges) in the systematic variable nodes is largely irrelevant to the LDPC encoding. In other words, imposing a condition where the 4×4 core structure includes parity variable nodes with degrees that are greater than or equal to three, the error floor for the LDPC code is reduced (e.g., to about 1e-6 or below) without any changes to or conditions on the structure associated with the systematic variable nodes. In this way, the core parity structures shown by reference number 820 and 822, where the minimum variable node degree is three for the parity variable nodes (or parity portion) of the PCM, may result in an LDPC code with an error floor around 1e-6 or below. Furthermore, by constructing the 4×4 core structure such that each parity variable node has a degree equal to three, with one 0 in each row and in each parity variable node, the 4×4 core structure is invertible (e.g., has an inverse that can be multiplied by the 4×4 core structure to generate an identity matrix) .
[0108] Additionally, or alternatively, as shown by reference numbers 824 and 826, the parity columns or parity portion associated with the base graph may be constructed as a 4×4 parity matrix that contains three parity variable nodes (or parity columns) with a degree of three, and one parity variable node (or parity column) with a degree of four. Furthermore, similar to the examples shown by reference numbers 820 and 822, in a 4×4 parity matrix with three degree-3 parity columns and one degree-4 parity column, the 0 elements in the three degree-3 parity columns are in three different rows (e.g., such that three rows have one 0 element, and one row has no 0s) . In some aspects, to ensure that the 0 elements are in different rows, the check nodes (e.g., the rows of the 4×4 parity matrix) also have three degree-3 rows and one degree-4 row. For example, in the 4×4 parity matrix shown by reference number 824, the first three parity variable nodes are degree-3 columns with three 1s (and respective 0s in the first, second, and fourth rows) , and the fourth parity variable node is a degree-4 column with four 1s and no 0s. In another example, in the 4×4 parity matrix shown by reference number 826, the first, second, and fourth parity variable nodes are degree-3 columns with three 1s (and respective 0s in the first, second, and fourth rows) , and the third parity variable node is a degree-4 column with four 1s and no 0s. Furthermore, by constructing the 4×4 core structure such that the 0 elements in the three degree-3 columns appear in different rows, the 4×4 core structure results in an invertible base graph or PCM. Otherwise, if the 4×4 matrix were to have two identical columns, the matrix would have one row that contains two 0s (e.g., having a degree of two) . Accordingly, the condition that the 0 elements in the three degree-3 parity columns be in different rows may guarantee that there is no degree-2 row in the 4×4 matrix, which in turn guarantees a full rank.
[0109] In some aspects, as described herein, a base graph or PCM may include or may be associated with a core structure in a parity portion of the base graph, where the core structure may be constructed to ensure that the base graph or PCM is invertible. For example, the core structure is a 4×4 parity matrix (e.g., a square matrix with an order of four) with variable nodes (or columns) that each have a degree greater than two, and one or more additional conditions that may be imposed to ensure that the base graph or PCM associated with the core structure is invertible. For example, as shown in Fig. 8A, the 4×4 parity matrix may include four degree-3 variable nodes, with three 1s and one 0 in each row and each column, or the 4×4 parity matrix may include three degree-3 variable nodes, with the three 0s appearing in different rows. In this way, as described herein, using the 4×4 parity matrix in the parity portion may result in an invertible base graph or PCM, such that the resulting LDPC code may be a systematic LDPC code.
[0110] For example, in some aspects, an LDPC codeword may be denoted and generally satisfies the condition HxT=0, where H denotes a lifted PCM, x collectively represents a vector of information bits and a vector of parity bits, and T represents a transpose operation. In order to encode a vector of information bits, denoted s, into a systematic LDPC code, the encoding operation may be configured to find a vector of parity bits, denoted p, that satisfies the condition HxT=0, where the matrix H denoting the lifted PCM can be partitioned into a first matrix, denoted Hs, corresponding to the information (or systematic) bit columns and a second matrix, denoted Hp, corresponding to the parity bit columns. Accordingly, to encode a systematic LDPC code, the condition HxT=0 may be expressed [Hs, Hp] [sT, pT] =0, or HssT=HppT, such that the LDPC encoding includes identifying, for each information bit vector a parity bit vector that satisfies the condition HssT=HppT. As a result, a PCM (or base matrix) that is a valid PCM for a systematic LDPC code is associated with a parity check matrix, denoted Hp, that is invertible in a binary field, and a systematic matrix, denoted Hs, that is full rank over
[0111] As shown in Fig. 8B, and by reference number 830, the lifted PCM may have a ring representation denoted as: , which is an invertible matrix over a ring of binary polynomials modulo xZ+1. Furthermore, the LDPC encoding includes computing where the systematic variable nodes shown by reference number 810 in Fig. 8A may correspond to the matrix Hs, and the 4×4 parity matrix structures shown by reference numbers 820, 822, 824, and 826 in Fig. 8A are examples that may correspond to the matrix Hp.
[0112] In some aspects, to reduce an encoding complexity associated with an LDPC base graph or PCM that includes a core parity structure (e.g., a 4×4 parity matrix with the properties described herein) with a minimum variable node degree of three, and no degree-2 variable nodes, the core parity structure may be associated with a set of lifting values that result in the core parity structure having a monomial determinant (e.g., a polynomial expression with one term) when the determinant is computed over the ring. For example, the inverse of a monomial is another monomial (e.g., the inverse of Xamodulo XZ+1=xZ-a) , which may result in the determinant having only term and therefore a low encoding complexity. In some aspects, as shown by reference number 832, the lifting values for the 4×4 core structure may be represented as a 4×4 matrix, A, with a block structure that contains two diagonal matrices, A00 and A11, on a diagonal from an upper-left corner to a lower-right corner, and two diagonal matrices, A10 and A01, on an anti-diagonal from a lower-left corner to an upper-right corner. Accordingly, the determinant for the matrix A may be defined by the expression and the set of lifting values aij may be selected such that most terms in the determinant expression cancel each other out. Furthermore, the set of lifting values aij may be selected to cancel each other for all Z values in a lifting tower Z=a·2j (e.g., where a = 2, 3, 5, 7, 9, 11, 13, 15 in one example) .
[0113] For example, in some aspects, lifting values on diagonal elements of the matrix A may be fixed to be 0 (e.g., a00=a11=a22=a33=0) , and a condition may be imposed on the remaining lifting values to ensure that the matrix A has a monomial determinant. For example, in some aspects, the condition imposed on the remaining lifting values may specify that certain lifting values in the lower-left quadrant, A10, and the upper-right quadrant, A01, are zero, such as a30=a31=a03=a13=0, and that certain lifting values in the lower-left quadrant and the upper-right quadrant sum to Z (e.g., either a02+a21=Z or a20+a12=Z) . Additionally, or alternatively, the matrix A may have a monomial determinant for any suitable set of lifting values that result in modulo Z (e.g., in combination with fixing the lifting values on the diagonal elements to be 0) . For example, modulo Z may be satisfied when lifting values are selected such that a20+a02=0 modulo Z, a21+a12=0 modulo Z, a30+a03=0 modulo Z, and / or a31+a13=0 modulo Z. In this way, the lifting values associated with the core structure used in the parity matrix may result in the matrix A having a monomial determinant, thereby reducing encoding complexity.
[0114] In some aspects, as described above in connection with Figs. 8A-8B, an invertible 4×4 core structure with a minimum variable node degree of three may be used in the parity matrix of a base graph to support encoding a systematic LDPC code with a low error floor, and a set of lifting values may be selected such that a corresponding lifting matrix, A, has a monomial determinant associated with a low encoding complexity. For example, because a 3×3 encoding matrix is not invertible and a 4×4 is the minimum size for an invertible matrix, the core structure is a square matrix with an order of at least four. However, the minimum 4×4 size for the core structure is associated with a high code rate (e.g., where the LDPC code includes a higher number of information bits, but fewer error protection bits) . Accordingly, in order to support a PCM with a larger size (e.g., a lower code rate, or more error protection bits) , the 4×4 core structure may be extended to an M×M matrix, where M is greater than four. For example, as shown by reference number 840 in Fig. 8C, the 4×4 core structure may be extended to an M×M matrix by a degree-1 (or LDGM) extension. For example, in some aspects, multiple instances of the 4×4 core structure are used along a diagonal of the M×M matrix (e.g., in an upper-left quadrant and a lower-right quadrant) , and zero matrices or arbitrary matrices may be used along an anti-diagonal of the M×M matrix (e.g., in a lower-left quadrant and an upper-right quadrant) . Additionally, or alternatively, as shown by reference number 845, the 4×4 core structure may be extended to an M×M matrix by an upper-triangular extension, where one or more instances of the 4×4 core structure are used in an upper-left quadrant, an upper-triangular matrix is used in a lower-right quadrant, a zero matrix is used in a lower-left quadrant, and an arbitrary matrix is used in an upper-right quadrant. Additionally, or alternatively, the 4×4 core structure can be extended to any M×M matrix, where M can be any integer larger than 4. For example, in the degree-1 extension shown by reference number 540, the bottom-right matrix is set to be an identity matrix, the top-right matrix is an all-zero matrix, and the bottom-left matrix is arbitrary.
[0115] As indicated above, Figs. 8A-8C are provided as an example. Other examples may differ from what is described with regard to Figs. 8A-8C.
[0116] Fig. 9 is a diagram illustrating an example process 900 performed, for example, at a transmitter or an apparatus of a transmitter, in accordance with the present disclosure. Example process 900 is an example where the apparatus or the transmitter (e.g., UE 120, network node 110, transmitter 310, or the like) performs operations associated with configuring base graph and lifting structures for LDPC codes.
[0117] As shown in Fig. 9, in some aspects, process 900 may include constructing a base graph according to a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two (block 910) . For example, the transmitter (e.g., using communication manager 1106, depicted in Fig. 11) may construct a base graph according to a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two, as described above.
[0118] As further shown in Fig. 9, in some aspects, process 900 may include constructing a set of lifting values for the core structure (block 920) . For example, the transmitter (e.g., using communication manager 1106, depicted in Fig. 11) may construct a set of lifting values for the core structure, as described above.
[0119] As further shown in Fig. 9, in some aspects, process 900 may include transmitting an LDPC code to a receiver, wherein the LDPC code is associated with the base graph and the set of lifting values (block 930) . For example, the transmitter (e.g., using transmission component 1104 and / or communication manager 1106, depicted in Fig. 11) may transmit an LDPC code to a receiver, wherein the LDPC code is associated with the base graph and the set of lifting values, as described above.
[0120] Process 900 may include additional aspects, such as any single aspect or any combination of aspects described below and / or in connection with one or more other processes described elsewhere herein.
[0121] In a first aspect, the square matrix has an order of four and four degree-3 columns.
[0122] In a second aspect, alone or in combination with the first aspect, the square matrix includes three elements with a value of one and one element with a value of zero in each column and in each row.
[0123] In a third aspect, alone or in combination with one or more of the first and second aspects, the square matrix has an order of four, three degree-3 columns, and one degree-4 column.
[0124] In a fourth aspect, alone or in combination with one or more of the first through third aspects, the degree-3 columns each have three elements with a value of one and one element with a value of zero, and wherein the element with the value of zero is in different rows of the three degree-3 columns.
[0125] In a fifth aspect, alone or in combination with one or more of the first through fourth aspects, the square matrix is invertible.
[0126] In a sixth aspect, alone or in combination with one or more of the first through fifth aspects, the LDPC code is systematic.
[0127] In a seventh aspect, alone or in combination with one or more of the first through sixth aspects, the square matrix has an order of four and a monomial determinant.
[0128] In an eighth aspect, alone or in combination with one or more of the first through seventh aspects, the set of lifting values include zeros on each diagonal element of the square matrix.
[0129] In a ninth aspect, alone or in combination with one or more of the first through eighth aspects, the set of lifting values include zeros on a first set of elements of the square matrix and values on a second set of elements that sum to a value of a lifting tower associated with the LDPC code.
[0130] In a tenth aspect, alone or in combination with one or more of the first through ninth aspects, the set of lifting values includes a first lifting value in a lower-left quadrant of the square matrix and a second lifting value in an upper-right quadrant of the square matrix that sum to zero modulo Z, where Z is a value of a lifting tower associated with the LDPC code.
[0131] In an eleventh aspect, alone or in combination with one or more of the first through tenth aspects, a parity check portion of the base graph is a square matrix with an order greater than four.
[0132] In a twelfth aspect, alone or in combination with one or more of the first through eleventh aspects, the parity check portion of the base graph includes the core structure in an upper-left quadrant, an identity matrix in a lower-right quadrant, a zero matrix in an upper-right quadrant, and an arbitrary matrix in a lower-left quadrant.
[0133] In a thirteenth aspect, alone or in combination with one or more of the first through twelfth aspects, the parity check portion of the base graph includes the core structure in an upper-left quadrant, an upper-triangular matrix in a lower-right quadrant, an arbitrary matrix in an upper-right quadrant, and a zero matrix in a lower-left quadrant.
[0134] In a fourteenth aspect, alone or in combination with one or more of the first through thirteenth aspects, the LDPC code is quasi-cyclic.
[0135] Although Fig. 9 shows example blocks of process 900, in some aspects, process 900 may include additional blocks, fewer blocks, different blocks, or differently arranged blocks than those depicted in Fig. 9. Additionally, or alternatively, two or more of the blocks of process 900 may be performed in parallel.
[0136] Fig. 10 is a diagram illustrating an example process 1000 performed, for example, at a receiver or an apparatus of a receiver, in accordance with the present disclosure. Example process 1000 is an example where the apparatus or the receiver (e.g., UE 120, network node 110, receiver 320, or the like) performs operations associated with configuring base graph and lifting structures for LDPC codes.
[0137] As shown in Fig. 10, in some aspects, process 1000 may include receiving an LDPC code associated with a base graph that includes a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two (block 1010) . For example, the receiver (e.g., using reception component 1202 and / or communication manager 1206, depicted in Fig. 12) may receive an LDPC code associated with a base graph that includes a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two, as described above.
[0138] As further shown in Fig. 10, in some aspects, process 1000 may include decoding the LDPC code in accordance with the base graph and a set of lifting values associated with the core structure (block 1020) . For example, the receiver (e.g., using communication manager 1206, depicted in Fig. 12) may decode the LDPC code in accordance with the base graph and a set of lifting values associated with the core structure, as described above.
[0139] Process 1000 may include additional aspects, such as any single aspect or any combination of aspects described below and / or in connection with one or more other processes described elsewhere herein.
[0140] In a first aspect, the square matrix has an order of four and four degree-3 columns.
[0141] In a second aspect, alone or in combination with the first aspect, the square matrix includes three elements with a value of one and one element with a value of zero in each column and in each row.
[0142] In a third aspect, alone or in combination with one or more of the first and second aspects, the square matrix has an order of four, three degree-3 columns, and one degree-4 column.
[0143] In a fourth aspect, alone or in combination with one or more of the first through third aspects, the degree-3 columns each have three elements with a value of one and one element with a value of zero, and wherein the element with the value of zero is in different rows of the three degree-3 columns.
[0144] In a fifth aspect, alone or in combination with one or more of the first through fourth aspects, the square matrix is invertible.
[0145] In a sixth aspect, alone or in combination with one or more of the first through fifth aspects, the LDPC code is systematic.
[0146] In a seventh aspect, alone or in combination with one or more of the first through sixth aspects, the square matrix has an order of four and a monomial determinant.
[0147] In an eighth aspect, alone or in combination with one or more of the first through seventh aspects, the set of lifting values includes zeros on each diagonal element of the square matrix.
[0148] In a ninth aspect, alone or in combination with one or more of the first through eighth aspects, the set of lifting values include zeros on a first set of elements of the square matrix and values on a second set of elements that sum to a value of a lifting tower associated with the LDPC code.
[0149] In a tenth aspect, alone or in combination with one or more of the first through ninth aspects, the set of lifting values includes a first lifting value in a lower-left quadrant of the square matrix and a second lifting value in an upper-right quadrant of the square matrix that sum to zero modulo Z, where Z is a value of a lifting tower associated with the LDPC code.
[0150] In an eleventh aspect, alone or in combination with one or more of the first through tenth aspects, a parity check portion of the base graph is a square matrix with an order greater than four.
[0151] In a twelfth aspect, alone or in combination with one or more of the first through eleventh aspects, the parity check portion of the base graph includes the core structure in an upper-left quadrant, an identity matrix in a lower-right quadrant, a zero matrix in an upper-right quadrant, and an arbitrary matrix in a lower-left quadrant.
[0152] In a thirteenth aspect, alone or in combination with one or more of the first through twelfth aspects, the parity check portion of the base graph includes the core structure in an upper-left quadrant, an upper-triangular matrix in a lower-right quadrant, an arbitrary matrix in an upper-right quadrant, and a zero matrix in a lower-left quadrant.
[0153] In a fourteenth aspect, alone or in combination with one or more of the first through thirteenth aspects, the LDPC code is quasi-cyclic.
[0154] Although Fig. 10 shows example blocks of process 1000, in some aspects, process 1000 may include additional blocks, fewer blocks, different blocks, or differently arranged blocks than those depicted in Fig. 10. Additionally, or alternatively, two or more of the blocks of process 1000 may be performed in parallel.
[0155] Fig. 11 is a diagram of an example apparatus 1100 for wireless communication, in accordance with the present disclosure. The apparatus 1100 may be a transmitter, or a transmitter may include the apparatus 1100. In some aspects, the apparatus 1100 includes a reception component 1102, a transmission component 1104, and / or a communication manager 1106, which may be in communication with one another (for example, via one or more buses and / or one or more other components) . In some aspects, the communication manager 1106 is the communication manager 150 and / or the communication manager 155 described in connection with Fig. 1. As shown, the apparatus 1100 may communicate with another apparatus 1108, such as a UE or a network node (such as a CU, a DU, an RU, or a base station) , using the reception component 1102 and the transmission component 1104. The communication manager 1106 may be included in, or implemented via, a processing system (for example, the processing system 140 and / or the processing system 145 described in connection with Fig. 1) of the transmitter.
[0156] In some aspects, the apparatus 1100 may be configured to perform one or more operations described herein in connection with Figs. 8A-8C. Additionally, or alternatively, the apparatus 1100 may be configured to perform one or more processes described herein, such as process 900 of Fig. 9. In some aspects, the apparatus 1100 and / or one or more components shown in Fig. 11 may include one or more components of the UE and / or the network node described in connection with Fig. 1. Additionally, or alternatively, one or more components shown in Fig. 11 may be implemented within one or more components described in connection with Fig. 1. Additionally, or alternatively, one or more components of the set of components may be implemented at least in part as software stored in one or more memories. For example, a component (or a portion of a component) may be implemented as instructions or code stored in a non-transitory computer-readable medium and executable by one or more controllers or one or more processors to perform the functions or operations of the component.
[0157] The reception component 1102 may receive communications, such as reference signals, control information, data communications, or a combination thereof, from the apparatus 1108. The reception component 1102 may provide received communications to one or more other components of the apparatus 1100. In some aspects, the reception component 1102 may perform signal processing on the received communications, and may provide the processed signals to the one or more other components of the apparatus 1100. In some aspects, the reception component 1102 may include one or more components of the UE and / or the network node described above in connection with Fig. 1, such as a radio, one or more RF chains, one or more transceivers, or one or more modems, each of which may in turn be coupled with one or more antennas of the transmitter.
[0158] The transmission component 1104 may transmit communications, such as reference signals, control information, data communications, or a combination thereof, to the apparatus 1108. In some aspects, one or more other components of the apparatus 1100 may generate communications and may provide the generated communications to the transmission component 1104 for transmission to the apparatus 1108. In some aspects, the transmission component 1104 may perform signal processing on the generated communications, and may transmit the processed signals to the apparatus 1108. In some aspects, the transmission component 1104 may include one or more components of the UE and / or the network node described above in connection with Fig. 1, such as a radio, one or more RF chains, one or more transceivers, or one or more modems, each of which may in turn be coupled with one or more antennas of the UE and / or the network node described in connection with Fig. 1. In some aspects, the transmission component 1104 may be co-located with the reception component 1102.
[0159] The communication manager 1106 may support operations of the reception component 1102 and / or the transmission component 1104. For example, the communication manager 1106 may receive information associated with configuring reception of communications by the reception component 1102 and / or transmission of communications by the transmission component 1104. Additionally, or alternatively, the communication manager 1106 may generate and / or provide control information to the reception component 1102 and / or the transmission component 1104 to control reception and / or transmission of communications.
[0160] The communication manager 1106 may construct a base graph according to a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two. The communication manager 1106 may construct a set of lifting values for the core structure. The transmission component 1104 may transmit an LDPC code to a receiver, wherein the LDPC code is associated with the base graph and the set of lifting values.
[0161] The number and arrangement of components shown in Fig. 11 are provided as an example. In practice, there may be additional components, fewer components, different components, or differently arranged components than those shown in Fig. 11. Furthermore, two or more components shown in Fig. 11 may be implemented within a single component, or a single component shown in Fig. 11 may be implemented as multiple, distributed components. Additionally, or alternatively, a set of (one or more) components shown in Fig. 11 may perform one or more functions described as being performed by another set of components shown in Fig. 11.
[0162] Fig. 12 is a diagram of an example apparatus 1200 for wireless communication, in accordance with the present disclosure. The apparatus 1200 may be a receiver, or a receiver may include the apparatus 1200. In some aspects, the apparatus 1200 includes a reception component 1202, a transmission component 1204, and / or a communication manager 1206, which may be in communication with one another (for example, via one or more buses and / or one or more other components) . In some aspects, the communication manager 1206 is the communication manager 150 and / or the communication manager 155 described in connection with Fig. 1. As shown, the apparatus 1200 may communicate with another apparatus 1208, such as a UE or a network node (such as a CU, a DU, an RU, or a base station) , using the reception component 1202 and the transmission component 1204. The communication manager 1206 may be included in, or implemented via, a processing system (for example, the processing system 140 and / or the processing system 145 described in connection with Fig. 1) of the receiver.
[0163] In some aspects, the apparatus 1200 may be configured to perform one or more operations described herein in connection with Figs. 8A-8C. Additionally, or alternatively, the apparatus 1200 may be configured to perform one or more processes described herein, such as process 1000 of Fig. 10. In some aspects, the apparatus 1200 and / or one or more components shown in Fig. 12 may include one or more components of the UE and / or the network node described in connection with Fig. 1. Additionally, or alternatively, one or more components shown in Fig. 12 may be implemented within one or more components described in connection with Fig. 1. Additionally, or alternatively, one or more components of the set of components may be implemented at least in part as software stored in one or more memories. For example, a component (or a portion of a component) may be implemented as instructions or code stored in a non-transitory computer-readable medium and executable by one or more controllers or one or more processors to perform the functions or operations of the component.
[0164] The reception component 1202 may receive communications, such as reference signals, control information, data communications, or a combination thereof, from the apparatus 1208. The reception component 1202 may provide received communications to one or more other components of the apparatus 1200. In some aspects, the reception component 1202 may perform signal processing on the received communications, and may provide the processed signals to the one or more other components of the apparatus 1200. In some aspects, the reception component 1202 may include one or more components of the UE and / or the network node described above in connection with Fig. 1, such as a radio, one or more RF chains, one or more transceivers, or one or more modems, each of which may in turn be coupled with one or more antennas of the receiver.
[0165] The transmission component 1204 may transmit communications, such as reference signals, control information, data communications, or a combination thereof, to the apparatus 1208. In some aspects, one or more other components of the apparatus 1200 may generate communications and may provide the generated communications to the transmission component 1204 for transmission to the apparatus 1208. In some aspects, the transmission component 1204 may perform signal processing on the generated communications, and may transmit the processed signals to the apparatus 1208. In some aspects, the transmission component 1204 may include one or more components of the UE and / or the network node described above in connection with Fig. 1, such as a radio, one or more RF chains, one or more transceivers, or one or more modems, each of which may in turn be coupled with one or more antennas of the UE and / or the network node described in connection with Fig. 1. In some aspects, the transmission component 1204 may be co-located with the reception component 1202.
[0166] The communication manager 1206 may support operations of the reception component 1202 and / or the transmission component 1204. For example, the communication manager 1206 may receive information associated with configuring reception of communications by the reception component 1202 and / or transmission of communications by the transmission component 1204. Additionally, or alternatively, the communication manager 1206 may generate and / or provide control information to the reception component 1202 and / or the transmission component 1204 to control reception and / or transmission of communications.
[0167] The reception component 1202 may receive an LDPC code associated with a base graph that includes a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two. The communication manager 1206 may decode the LDPC code in accordance with the base graph and a set of lifting values associated with the core structure.
[0168] The number and arrangement of components shown in Fig. 12 are provided as an example. In practice, there may be additional components, fewer components, different components, or differently arranged components than those shown in Fig. 12. Furthermore, two or more components shown in Fig. 12 may be implemented within a single component, or a single component shown in Fig. 12 may be implemented as multiple, distributed components. Additionally, or alternatively, a set of (one or more) components shown in Fig. 12 may perform one or more functions described as being performed by another set of components shown in Fig. 12.
[0169] The following provides an overview of some Aspects of the present disclosure:
[0170] Aspect 1: A method of wireless communication performed by a transmitter, comprising: constructing a base graph according to a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two; constructing a set of lifting values for the core structure; and transmitting an LDPC code to a receiver, wherein the LDPC code is associated with the base graph and the set of lifting values.
[0171] Aspect 2: The method of Aspect 1, wherein the square matrix has an order of four and four degree-3 columns.
[0172] Aspect 3: The method of Aspect 2, wherein the square matrix includes three elements with a value of one and one element with a value of zero in each column and in each row.
[0173] Aspect 4: The method of any of Aspects 1-3, wherein the square matrix has an order of four, three degree-3 columns, and one degree-4 column.
[0174] Aspect 5: The method of Aspect 4, wherein the degree-3 columns each have three elements with a value of one and one element with a value of zero, and wherein the element with the value of zero is in different rows of the three degree-3 columns.
[0175] Aspect 6: The method of any of Aspects 1-5, wherein the square matrix is invertible.
[0176] Aspect 7: The method of any of Aspects 1-6, wherein the LDPC code is systematic.
[0177] Aspect 8: The method of any of Aspects 1-7, wherein the square matrix has an order of four and a monomial determinant.
[0178] Aspect 9: The method of any of Aspects 1-8, wherein the set of lifting values include zeros on each diagonal element of the square matrix.
[0179] Aspect 10: The method of any of Aspects 1-9, wherein the set of lifting values include zeros on a first set of elements of the square matrix and values on a second set of elements that sum to a value of a lifting tower associated with the LDPC code.
[0180] Aspect 11: The method of any of Aspects 1-10, wherein the set of lifting values includes a first lifting value in a lower-left quadrant of the square matrix and a second lifting value in an upper-right quadrant of the square matrix that sum to zero modulo Z, where Z is a value of a lifting tower associated with the LDPC code.
[0181] Aspect 12: The method of any of Aspects 1-11, wherein a parity check portion of the base graph is a square matrix with an order greater than four.
[0182] Aspect 13: The method of Aspect 12, wherein the parity check portion of the base graph includes the core structure in an upper-left quadrant, an identity matrix in a lower-right quadrant, a zero matrix in an upper-right quadrant, and an arbitrary matrix in a lower-left quadrant.
[0183] Aspect 14: The method of Aspect 12, wherein the parity check portion of the base graph includes the core structure in an upper-left quadrant, an upper-triangular matrix in a lower-right quadrant, an arbitrary matrix in an upper-right quadrant, and a zero matrix in a lower-left quadrant.
[0184] Aspect 15: The method of any of Aspects 1-14, wherein the LDPC code is quasi-cyclic.
[0185] Aspect 16: A method of wireless communication performed by a receiver, comprising: receiving an LDPC code associated with a base graph that includes a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two; and decoding the LDPC code in accordance with the base graph and a set of lifting values associated with the core structure.
[0186] Aspect 17: The method of Aspect 16, wherein the square matrix has an order of four and four degree-3 columns.
[0187] Aspect 18: The method of Aspect 17, wherein the square matrix includes three elements with a value of one and one element with a value of zero in each column and in each row.
[0188] Aspect 19: The method of any of Aspects 16-18, wherein the square matrix has an order of four, three degree-3 columns, and one degree-4 column.
[0189] Aspect 20: The method of Aspect 19, wherein the degree-3 columns each have three elements with a value of one and one element with a value of zero, and wherein the element with the value of zero is in different rows of the three degree-3 columns.
[0190] Aspect 21: The method of any of Aspects 16-20, wherein the square matrix is invertible.
[0191] Aspect 22: The method of any of Aspects 16-21, wherein the LDPC code is systematic.
[0192] Aspect 23: The method of any of Aspects 16-22, wherein the square matrix has an order of four and a monomial determinant.
[0193] Aspect 24: The method of any of Aspects 16-23, wherein the set of lifting values includes zeros on each diagonal element of the square matrix.
[0194] Aspect 25: The method of any of Aspects 16-24, wherein the set of lifting values include zeros on a first set of elements of the square matrix and values on a second set of elements that sum to a value of a lifting tower associated with the LDPC code.
[0195] Aspect 26: The method of any of Aspects 16-25, wherein the set of lifting values includes a first lifting value in a lower-left quadrant of the square matrix and a second lifting value in an upper-right quadrant of the square matrix that sum to zero modulo Z, where Z is a value of a lifting tower associated with the LDPC code.
[0196] Aspect 27: The method of any of Aspects 16-26, wherein a parity check portion of the base graph is a square matrix with an order greater than four.
[0197] Aspect 28: The method of Aspect 27, wherein the parity check portion of the base graph includes the core structure in an upper-left quadrant, an identity matrix in a lower-right quadrant, a zero matrix in an upper-right quadrant, and an arbitrary matrix in a lower-left quadrant.
[0198] Aspect 29: The method of Aspect 27, wherein the parity check portion of the base graph includes the core structure in an upper-left quadrant, an upper-triangular matrix in a lower-right quadrant, an arbitrary matrix in an upper-right quadrant, and a zero matrix in a lower-left quadrant.
[0199] Aspect 30: The method of any of Aspects 16-29, wherein the LDPC code is quasi-cyclic.
[0200] Aspect 31: An apparatus for wireless communication at a device, the apparatus comprising one or more processors; one or more memories coupled with the one or more processors; and instructions stored in the one or more memories and executable by the one or more processors to cause the apparatus to perform the method of one or more of Aspects 1-30.
[0201] Aspect 32: An apparatus for wireless communication at a device, the apparatus comprising one or more memories and one or more processors coupled to the one or more memories, the one or more processors configured to cause the device to perform the method of one or more of Aspects 1-30.
[0202] Aspect 33: An apparatus for wireless communication, the apparatus comprising at least one means for performing the method of one or more of Aspects 1-30.
[0203] Aspect 34: A non-transitory computer-readable medium storing code for wireless communication, the code comprising instructions executable by one or more processors to perform the method of one or more of Aspects 1-30.
[0204] Aspect 35: A non-transitory computer-readable medium storing a set of instructions for wireless communication, the set of instructions comprising one or more instructions that, when executed by one or more processors of a device, cause the device to perform the method of one or more of Aspects 1-30.
[0205] Aspect 36: A device for wireless communication, the device comprising a processing system that includes one or more processors and one or more memories coupled with the one or more processors, the processing system configured to cause the device to perform the method of one or more of Aspects 1-30.
[0206] Aspect 37: An apparatus for wireless communication at a device, the apparatus comprising one or more memories and one or more processors coupled to the one or more memories, the one or more processors individually or collectively configured to cause the device to perform the method of one or more of Aspects 1-30.
[0207] The foregoing disclosure provides illustration and description but is not intended to be exhaustive or to limit the aspects to the precise forms disclosed. Modifications and variations may be made in light of the above disclosure or may be acquired from practice of the aspects. No element, act, or instruction described herein should be construed as critical or essential unless explicitly described as such.
[0208] It will be apparent that systems or methods described herein may be implemented in different forms of hardware or a combination of hardware and software. The actual specialized control hardware or software used to implement these systems or methods is not limiting of the aspects. Thus, the operation and behavior of the systems or methods are described herein without reference to specific software code, because those skilled in the art will understand that software and hardware can be designed to implement the systems or methods based, at least in part, on the description herein. A component being configured to perform a function means that the component has a capability to perform the function, and does not require the function to be actually performed by the component, unless noted otherwise.
[0209] As used herein, the articles “a” and “an” are intended to refer to one or more items and may be used interchangeably with “one or more” or “at least one. ” Further, as used herein, the article “the” is intended to include one or more items referenced in connection with the article “the” and may be used interchangeably with “the one or more. ” Furthermore, as used herein, the terms “set” and “group” are intended to include one or more items and may be used interchangeably with “one or more. ” Where only one item is intended, the phrase “only one” or “a single one” or similar language is used. Also, as used herein, the terms “has, ” “have, ” “having, ” “comprise, ” “comprising, ” “include” and “including, ” and derivatives thereof or similar terms are intended to be open-ended terms that do not limit an element that they modify (for example, an element “having” A may also have B) . Also, as used herein, the term “or” is intended to be inclusive when used in a series and may be used interchangeably with “and / or, ” unless explicitly stated otherwise (for example, if used in combination with “either” or “only one of” ) . As used herein, a phrase referring to “at least one of” a list of items refers to any combination of those items, including single members. As an example, “at least one of: a, b, or c” is intended to cover a, b, c, a + b, a + c, b + c, and a + b + c, as well as any combination with multiples of the same element (for example, a + a, a + a + a, a + a + b, a + a + c, a + b + b, a + c + c, b + b, b + b + b, b + b + c, c + c, and c + c + c, or any other ordering of a, b, and c) .
[0210] As used herein, the term “determine” or “determining” encompasses a wide variety of actions and, therefore, “determining” can include calculating, computing, processing, deriving, estimating, investigating, looking up (such as via looking up in a table, a database, or another data structure) , searching, inferring, ascertaining, and / or measuring, among other possibilities. Also, “determining” can include receiving (such as receiving information) , accessing (such as accessing data stored in memory) or transmitting (such as transmitting information) , among other possibilities. Additionally, “determining” can include resolving, selecting, obtaining, choosing, establishing, and / or other such similar actions.
[0211] As used herein, the phrase “based on” is intended to mean “based at least in part on” or “based on or otherwise in association with” unless explicitly stated otherwise. As used herein, “satisfying a threshold” may, depending on the context, refer to a value being greater than the threshold, greater than or equal to the threshold, less than the threshold, less than or equal to the threshold, equal to the threshold, or not equal to the threshold, among other examples.
[0212] Even though particular combinations of features are recited in the claims or disclosed in the specification, these combinations are not intended to limit the scope of all aspects described herein. Many of these features may be combined in ways not specifically recited in the claims or disclosed in the specification. The disclosure of various aspects includes each dependent claim in combination with every other claim in the claim set.
Claims
1.A method of wireless communication performed by a transmitter, comprising:constructing a base graph according to a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two;constructing a set of lifting values for the core structure; andtransmitting a low density parity check (LDPC) code to a receiver, wherein the LDPC code is associated with the base graph and the set of lifting values.2.The method of claim 1, wherein the square matrix has an order of four and four degree-3 columns.3.The method of claim 2, wherein the square matrix includes three elements with a value of one and one element with a value of zero in each column and in each row.4.The method of claim 1, wherein the square matrix has an order of four, three degree-3 columns, and one degree-4 column.5.The method of claim 4, wherein the degree-3 columns each have three elements with a value of one and one element with a value of zero, and wherein the element with the value of zero is in different rows of the three degree-3 columns.6.The method of claim 1, wherein the square matrix is invertible.7.The method of claim 1, wherein the LDPC code is systematic.8.The method of claim 1, wherein the square matrix has an order of four and a monomial determinant.9.The method of claim 1, wherein the set of lifting values include zeros on each diagonal element of the square matrix.10.The method of claim 1, wherein the set of lifting values include zeros on a first set of elements of the square matrix and values on a second set of elements that sum to a value of a lifting tower associated with the LDPC code.11.The method of claim 1, wherein the set of lifting values includes a first lifting value in a lower-left quadrant of the square matrix and a second lifting value in an upper-right quadrant of the square matrix that sum to zero modulo Z, where Z is a value of a lifting tower associated with the LDPC code.12.The method of claim 1, wherein a parity check portion of the base graph is a square matrix with an order greater than four.13.The method of claim 12, wherein the parity check portion of the base graph includes the core structure in an upper-left quadrant, an identity matrix in a lower-right quadrant, a zero matrix in an upper-right quadrant, and an arbitrary matrix in a lower-left quadrant.14.The method of claim 12, wherein the parity check portion of the base graph includes the core structure in an upper-left quadrant, an upper-triangular matrix in a lower-right quadrant, an arbitrary matrix in an upper-right quadrant, and a zero matrix in a lower-left quadrant.15.The method of claim 1, wherein the LDPC code is quasi-cyclic.16.A method of wireless communication performed by a receiver, comprising:receiving a low density parity check (LDPC) code associated with a base graph that includes a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two; anddecoding the LDPC code in accordance with the base graph and a set of lifting values associated with the core structure.17.The method of claim 16, wherein the square matrix has an order of four and four degree-3 columns.18.The method of claim 17, wherein the square matrix includes three elements with a value of one and one element with a value of zero in each column and in each row.19.The method of claim 16, wherein the square matrix has an order of four, three degree-3 columns, and one degree-4 column.20.The method of claim 19, wherein the degree-3 columns each have three elements with a value of one and one element with a value of zero, and wherein the element with the value of zero is in different rows of the three degree-3 columns.21.The method of claim 16, wherein the square matrix is invertible.22.The method of claim 16, wherein the square matrix has an order of four and a monomial determinant.23.The method of claim 16, wherein the set of lifting values includes zeros on each diagonal element of the square matrix.24.The method of claim 16, wherein the set of lifting values include zeros on a first set of elements of the square matrix and values on a second set of elements that sum to a value of a lifting tower associated with the LDPC code.25.The method of claim 16, wherein the set of lifting values includes a first lifting value in a lower-left quadrant of the square matrix and a second lifting value in an upper-right quadrant of the square matrix that sum to zero modulo Z, where Z is a value of a lifting tower associated with the LDPC code.26.The method of claim 16, wherein a parity check portion of the base graph is a square matrix with an order greater than four.27.The method of claim 26, wherein the parity check portion of the base graph includes the core structure in an upper-left quadrant, an identity matrix in a lower-right quadrant, a zero matrix in an upper-right quadrant, and an arbitrary matrix in a lower-left quadrant.28.The method of claim 26, wherein the parity check portion of the base graph includes the core structure in an upper-left quadrant, an upper-triangular matrix in a lower-right quadrant, an arbitrary matrix in an upper-right quadrant, and a zero matrix in a lower-left quadrant.29.A transmitter for wireless communication, comprising:one or more memories; andone or more processors, coupled to the one or more memories, configured to cause the transmitter to:construct a base graph according to a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two;construct a set of lifting values for the core structure; andtransmit a low density parity check (LDPC) code to a receiver, wherein the LDPC code is associated with the base graph and the set of lifting values.30.A receiver for wireless communication, comprising:one or more memories; andone or more processors, coupled to the one or more memories, configured to cause the receiver to:receive a low density parity check (LDPC) code associated with a base graph that includes a set of information bit columns and a set of parity bit columns, wherein the set of parity bit columns includes a first set of core parity columns and a second set of extension parity columns, and wherein the first set of core parity columns is associated with a core structure represented by a square matrix in which each column has a degree greater than two; anddecode the LDPC code in accordance with the base graph and a set of lifting values associated with the core structure.