Data processing method, apparatus and system

Abstract

Embodiments of the present application disclose a data processing method, apparatus and system, such that the proposed concatenated FEC scheme has strong decoding performance and low latency, and can be applied to more coherent transmission scenarios. Specifically, the method comprises: first acquiring n RS-encoded first data streams, wherein n>1, every four consecutive RS symbols in each of the n first data streams are respectively from four RS codewords, and the n first data streams carry data of at least four Ethernet clients; then, performing first processing on the n first data streams to obtain m second data streams, wherein m≥n, every dsconsecutive RS symbols in each of the m second data streams are respectively from ds RS codewords, ds≥8, and a plurality of RS symbols in each second data stream are from at least two of the n first data streams; and next, performing, on the m second data streams, second processing comprising FEC encoding.

Description

A data processing method, apparatus and system

[0001] This application claims priority to Chinese Patent Application No. 202411855295.0, filed on December 13, 2024, entitled "A Data Processing Method, Apparatus and System Thereof", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of communication technology, and in particular to a data processing method, apparatus and system thereof. Background Technology

[0003] Driven by technologies such as 5G, cloud computing, big data, and artificial intelligence, high-speed optical transmission networks are developing towards higher capacity, packetization, and intelligence. Optical communication systems utilize the amplitude, phase, polarization, or frequency of light waves to carry information. Forward error correction (FEC) coding is used to correct errors in the transmitted data, resolving transmission errors and allowing the receiver to recover the original data sent by the transmitter from the received data.

[0004] A cascaded FEC transmission scheme is proposed, where the transmitting device and the transmitting processing module are connected via an attachment unit interface (AUI). The transmitting device performs a first FEC encoding on the data to be transmitted and sends the first FEC-encoded data to the transmitting processing module. The transmitting processing module then performs a second FEC encoding on the received first FEC-encoded data, modulates the bit sequence resulting from the second FEC encoding to generate a corresponding modulation symbol sequence, and finally generates an optical signal based on the modulation symbol sequence and transmits it to the receiving end via optical fiber. The first FEC encoding is also called external code encoding, the second FEC encoding is also called internal code encoding, and modulation is also called symbol mapping.

[0005] For coherent transmission scenarios, existing technical solutions provide cascaded FEC schemes for 800G transmission scenarios, but do not provide cascaded FEC schemes for higher-speed (such as 1.6T or 3.2T) transmission scenarios. For example, existing cascaded FEC schemes for 800G transmission scenarios cannot be directly applied to 1.6T transmission scenarios. In particular, in a 1.6T transmission scenario supporting four 400G Ethernet clients, existing cascaded FEC schemes exhibit significant latency, which is a problem that urgently needs to be addressed. Summary of the Invention

[0006] This application provides a data processing method, apparatus, and system, which enable the proposed cascaded FEC scheme to have strong decoding performance and low latency, and can be applied to a wide range of coherent transmission scenarios.

[0007] Firstly, embodiments of this application provide a data processing method. Specifically, firstly, n first data streams encoded with Reed-Solomon (RS) are acquired, where n>1, and every consecutive four RS symbols in each of the n first data streams originate from four RS codewords, with the n first data streams carrying data from at least four Ethernet clients. Then, the n first data streams undergo a first processing step to obtain m second data streams, where m≥n, and every consecutive four RS symbols in each of the m second data streams originate from four RS codewords. s The RS symbols respectively come from d s One RS codeword, d s ≥8, where multiple RS symbols in each second data stream originate from at least two of the n first data streams. Furthermore, a second processing step, including forward error correction (FEC) encoding, is performed on the m second data streams.

[0008] In this embodiment, the first process includes at least a permutation operation. The permutation is performed between at least two first data streams, rather than on each first data stream independently. The at least two first data streams participating in the permutation carry data from different Ethernet clients, and the RS symbols in any two first data streams carrying data from different Ethernet clients come from different RS codewords. This is equivalent to the present application embodiment interleaving at least two first data streams, thereby scrambling the positions of some RS symbols in the n first data streams. Since four consecutive RS symbols in each first data stream come from four RS codewords, and the RS symbols in any two first data streams participating in the permutation come from different RS codewords, the permutation allows each second data stream to have more consecutive (d) RS symbols. s The ≥8 RS symbols come from different RS codewords, which makes it easier to adapt to more FEC encoding methods. Furthermore, this effect can be achieved without performing convolution and interleaving on each first data stream separately, which can effectively reduce the latency of data processing.

[0009] In some possible implementations, each second data stream contains every consecutive d... s Each RS symbol comes from at least two of the n first data streams. This is equivalent to obtaining four consecutive RS symbols from each of the at least two first data streams to form a continuous sequence of d symbols in the second data stream. sThe presence of multiple consecutive (d) RS symbols in each second data stream can be quickly achieved through permutations across multiple first data streams. s (≥8) RS symbols are derived from different RS codewords, resulting in lower implementation cost and higher implementation efficiency.

[0010] In some possible implementations, every n / 4 of the n first data streams carries the data of one Ethernet client, where n is a positive integer multiple of 4. For example, for a 1.6T coherent transmission scenario, considering four 400G Ethernet clients, every two of the n=8 first data streams carry the data of one 400G Ethernet client, thus making this application more valuable for future coherent transmission scenarios at higher speeds (such as 1.6T or 3.2T).

[0011] In some possible implementations, d s ≥11, where multiple RS symbols in each second data stream originate from at least 3 of the n first data streams. It should be understood that, considering the FEC encoding used in the second processing typically requires a number of information bits greater than or equal to 110, and one RS symbol comprises 10 bits, the first processing ensures that every consecutive 11 RS symbols in each second data stream originate from 11 RS codewords, thus facilitating adaptation to more FEC encoding methods. Furthermore, d s Matching the FEC encoding method allows the FEC cascade scheme to achieve optimal performance.

[0012] In some possible implementations, performing a first process on n first data streams to obtain m second data streams includes: permuting the n first data streams to obtain m second data streams, where n = m. This is equivalent to the first process using a "permutation-only" approach, which simplifies hardware implementation.

[0013] In some possible implementations, d s =16, where every 16 consecutive RS symbols in each second data stream come from 4 of the n first data streams, and every 16 consecutive RS symbols in each second data stream include 4 consecutive RS symbols from each of the 4 first data streams. A specific implementation of this permutation is provided, where 16 RS symbols (4 consecutive RS symbols from each of the 4 first data streams) constitute 16 consecutive RS symbols in a second data stream, thus ensuring compatibility with most FEC coding schemes. For example, it is compatible with linear block codes (N=126, K=110), (N=128, K=120), and (N=176, K=160), where K is the number of information bits in the FEC code and N is the number of bits in the FEC codeword.

[0014] In some possible implementations, d s =12, where every 12 consecutive RS symbols in each second data stream come from 3 of the n first data streams, and every 12 consecutive RS symbols in each second data stream include 4 consecutive RS symbols from each of the 3 first data streams. Another specific implementation of the permutation is provided here, where 12 RS symbols (4 consecutive RS symbols from each of the 3 first data streams) constitute a single 12 consecutive RS symbols in the second data stream. This low-complexity permutation allows compatibility with certain FEC coding schemes. For example, it is compatible with linear block codes (N=126, K=110) and (N=128, K=120), where K is the number of information bits in the FEC code and N is the number of bits in the FEC codeword.

[0015] In some possible implementations, the second process further includes distribution: m second data streams are FEC encoded to obtain m third data streams; the m third data streams are then distributed to obtain m×q fourth data streams, where each of the m third data streams is distributed to obtain q fourth data streams, and q is an integer greater than 1. In other words, a "distribution" operation is added to the second process, thus adapting to more application scenarios.

[0016] In some possible implementations, the distribution granularity is N bits, where N is the number of bits included in the FEC-encoded codeword, and N>1, so that each FEC-encoded codeword can be completely distributed to the corresponding data stream.

[0017] In some possible implementations, processing n first data streams to obtain m second data streams includes: permuting the n first data streams to obtain n fifth data streams; and distributing the n fifth data streams to obtain m second data streams, where m = n × p, and each of the n fifth data streams is distributed to obtain p second data streams, where p is an integer greater than 1. This is equivalent to the first processing employing a "permutation first, then distribution" approach, meaning the number of second data streams m after the first processing is greater than the number of first data streams n, thus adapting to more application scenarios.

[0018] In some possible embodiments, each of the n fifth data streams has every consecutive 16 RS symbols respectively from 16 RS codewords. Each of the n fifth data streams has every consecutive 16 RS symbols from 4 of the n first data streams. Each of the n fifth data streams has every consecutive 16 RS symbols including 4 consecutive RS symbols from each of the 4 first data streams. Here, a specific embodiment of permutation is provided. It is equivalent to that a total of 16 RS symbols, which are 4 consecutive RS symbols from each of the 4 first data streams, constitute 16 consecutive RS symbols in one fifth data stream, so that most FEC coding methods can be compatible.

[0019] In some possible embodiments, the distribution granularity is 16 RS symbols, so as to ensure that d s = 16, which is convenient for being compatible with most FEC coding methods.

[0020] In some possible embodiments, each of the n fifth data streams has every consecutive 12 RS symbols respectively from 12 RS codewords. Each of the n fifth data streams has every consecutive 12 RS symbols from 3 of the n first data streams. Each of the n fifth data streams has every consecutive 12 RS symbols including 4 consecutive RS symbols from each of the 3 first data streams. Here, another specific embodiment of permutation is provided. It is equivalent to that a total of 12 RS symbols, which are 4 consecutive RS symbols from each of the 3 first data streams, constitute 12 consecutive RS symbols in one fifth data stream, and some specific FEC coding methods can be compatible through permutation with lower complexity.

[0021] In some possible embodiments, the distribution granularity is 12 RS symbols, so as to ensure that d s = 12, which is convenient for being compatible with some specific FEC coding methods.

[0022] In some possible embodiments, the distribution granularity is K / 10 RS symbols, d s = K / 10, where K is the number of information bits of the FEC coding, and 1 < K ≤ 160. It is equivalent to that the distribution granularity depends on the specific code type adopted by the FEC coding, and can more specifically adapt to the FEC coding method adopted.

[0023] In some possible embodiments, some specific permutation rules are provided. The complexity of the permutation is low, and d can be achieved with a lower implementation cost. s=16. When n=8, the 128 RS symbols distributed in 8 rows and 16 columns in the 8 first data streams are permuted to obtain 128 RS symbols distributed in 8 rows and 16 columns. The 16 RS symbols in the i-th row of the 128 RS symbols before the permutation come from the 16 consecutive RS symbols in the i-th first data stream of the 8 first data streams, 0≤i≤7;

[0024] The 32 RS symbols in columns 0, 1, 2, and 3 of the 128 RS symbols after the permutation are derived from the 32 RS symbols in columns 0, 1, 2, and 3 of the 128 RS symbols before the permutation.

[0025] The 32 RS symbols in columns 4, 5, 6, and 7 of the 128 RS symbols after the permutation are derived from the 32 RS symbols in columns 4, 5, 6, and 7 of the 128 RS symbols before the permutation.

[0026] The 32 RS symbols in columns 8, 9, 10, and 11 of the 128 RS symbols after the permutation are derived from the 32 RS symbols in columns 8, 9, 10, and 11 of the 128 RS symbols before the permutation.

[0027] The 32 RS symbols in columns 12, 13, 14, and 15 of the 128 RS symbols after the permutation are derived from the 32 RS symbols in columns 12, 13, 14, and 15 of the 128 RS symbols before the permutation.

[0028] The 16 RS symbols in any row of the 128 RS symbols after the permutation are derived from the 4 RS symbols in row i0, row i1, row i2, and row i3 of the 128 RS symbols before the permutation, for a total of 16 RS symbols, i0 = 0 or 1, i1 = 2 or 3, i2 = 4 or 5, and i3 = 6 or 7.

[0029] In some possible implementations, the 8 RS symbols in the j-th column of the 128 RS symbols after the permutation are derived from the 8 RS symbols in the j-th column of the 128 RS symbols before the permutation, where 0 ≤ j ≤ 15.

[0030] In some possible implementations, the 16 RS symbols in any row of the 128 RS symbols after the permutation are derived from the 16 consecutive RS symbols in the i0th row, the i1th row, the i2th row, and the i3th row of the 128 RS symbols before the permutation.

[0031] In some possible implementations, the RS symbol in the i-th row and j0-th column of the 128 RS symbols after the permutation is taken from the RS symbol in the i-th row and j0-th column of the 128 RS symbols before the permutation, where 0 ≤ j0 ≤ 3.

[0032] In some possible implementations, specific permutation rules are provided, resulting in low permutation complexity and achieving d with low implementation cost. s =12. When n=8, the 96 RS symbols distributed in 8 rows and 12 columns in the 8 first data streams are permuted to obtain 96 RS symbols distributed in 8 rows and 12 columns. The 12 RS symbols in the i-th row of the 96 RS symbols before the permutation come from the 12 consecutive RS symbols in the i-th first data stream in the 8 first data streams, 0≤i≤7;

[0033] The 32 RS symbols in columns 0, 1, 2, and 3 of the 96 RS symbols after the permutation are derived from the 32 RS symbols in columns 0, 1, 2, and 3 of the 96 RS symbols before the permutation.

[0034] The 32 RS symbols in columns 4, 5, 6, and 7 of the 96 RS symbols after the permutation are derived from the 32 RS symbols in columns 4, 5, 6, and 7 of the 96 RS symbols before the permutation.

[0035] The 32 RS symbols in columns 8, 9, 10, and 11 of the 96 RS symbols after the permutation are derived from the 32 RS symbols in columns 8, 9, 10, and 11 of the 96 RS symbols before the permutation.

[0036] The 12 RS symbols in any row of the 96 RS symbols after the permutation are derived from the 4 RS symbols in row i0, the 4 RS symbols in row i1, and the 4 RS symbols in row i2 of the 96 RS symbols before the permutation, for a total of 12 RS symbols.

[0037] i0 = 0 or 1, i1 = 2 or 3, i2 = 4 or 5; or i0 = 0 or 1, i1 = 2 or 3, i2 = 6 or 7; or i0 = 0 or 1, i1 = 4 or 5, i2 = 6 or 7; or i0 = 2 or 3, i1 = 4 or 5, i2 = 6 or 7.

[0038] In some possible implementations, the 8 RS symbols in the j-th column of the 96 RS symbols after the permutation are derived from the 8 RS symbols in the j-th column of the 96 RS symbols before the permutation, where 0 ≤ j ≤ 11.

[0039] In some possible implementations, the 12 RS symbols in any row of the 96 RS symbols after the permutation are derived from the 12 RS symbols in the i0th row, the i1th row, and the i2th row of the 96 RS symbols before the permutation.

[0040] In some possible implementations, the RS symbol in the i-th row and j0-th column of the 96 RS symbols after the permutation is taken from the RS symbol in the i-th row and j0-th column of the 96 RS symbols before the permutation, where 0 ≤ j0 ≤ 3.

[0041] In some possible implementations, performing a first process on n first data streams to obtain m second data streams includes: distributing the n first data streams to obtain m sixth data streams, where m = n × p, and each of the n first data streams is distributed to obtain p sixth data streams, where p is an integer greater than 1; and permuting the m sixth data streams to obtain m second data streams. This is equivalent to the first process employing a "distribution first, then permutation" approach, meaning the number of second data streams m after the first process is greater than the number of first data streams n, thus adapting to more application scenarios.

[0042] In some possible implementations, the granularity of the distributed RS symbols is an integer multiple of 4, and every four consecutive RS symbols in each of the m sixth data streams come from four RS codewords, thus providing a basis for subsequent permutation operations to facilitate the implementation of more consecutive (d) symbols in each second data stream. s (≥8) RS symbols are derived from different RS codewords.

[0043] In some possible implementations, d s =16, where every 16 consecutive RS symbols in each second data stream come from 4 of the m sixth data streams, and every 16 consecutive RS symbols in each second data stream include 4 consecutive RS symbols from each of the 4 sixth data streams. A specific implementation of this permutation is provided, whereby a total of 16 RS symbols (4 consecutive RS symbols from each of the 4 sixth data streams) constitutes 16 consecutive RS symbols in a second data stream, thus ensuring compatibility with most FEC coding schemes.

[0044] In some possible implementations, specific permutation rules are provided, resulting in low permutation complexity and achieving d with low implementation cost. s=16. The 16m RS symbols distributed in m rows and 16 columns from m sixth data streams are permuted to obtain 16m RS symbols distributed in m rows and 16 columns. The 16 RS symbols in the i-th row of the original 16m RS symbols come from the 16 consecutive RS symbols in the i-th sixth data stream from the m sixth data streams, where 0 ≤ i <m;

[0045] The 4m RS symbols in columns 0, 1, 2, and 3 of the 16m RS symbols after the permutation are derived from the 4m RS symbols in columns 0, 1, 2, and 3 of the 16m RS symbols before the permutation.

[0046] The 4m RS symbols in columns 4, 5, 6, and 7 of the 16m RS symbols after the permutation are derived from the 4m RS symbols in columns 4, 5, 6, and 7 of the 16m RS symbols before the permutation.

[0047] The 4m RS symbols in columns 8, 9, 10, and 11 of the 16m RS symbols after the permutation are derived from the 4m RS symbols in columns 8, 9, 10, and 11 of the 16m RS symbols before the permutation.

[0048] The 4m RS symbols in columns 12, 13, 14, and 15 of the 16m RS symbols after the permutation are derived from the 4m RS symbols in columns 12, 13, 14, and 15 of the 16m RS symbols before the permutation.

[0049] The 16 RS symbols in any row of the 16m RS symbols after the permutation are derived from the 4 RS symbols in the i0th row, the 4 RS symbols in the i1th row, the 4 RS symbols in the i2th row, and the 4 RS symbols in the i3th row of the 16m RS symbols before the permutation, for a total of 16 RS symbols. i0 is an integer from 0 to (m / 4-1), i1 is an integer from m / 4 to (m / 2-1), i2 is an integer from m / 2 to (3m / 4-1), and i3 is an integer from 3m / 4 to (m-1), where m is a positive integer multiple of 4.

[0050] In some possible implementations, the m RS symbols in the j-th column of the 16m RS symbols after the permutation are derived from the m RS symbols in the j-th column of the 16m RS symbols before the permutation, where 0 ≤ j ≤ 15.

[0051] In some possible implementations, the 16 RS symbols in any row of the 16m RS symbols after the permutation are derived from the 16 consecutive RS symbols in the i0th row, the i1th row, the i2th row, and the i3th row of the 16m RS symbols before the permutation, totaling 16 RS symbols.

[0052] In some possible implementations, the RS symbol in the i-th row and j0-th column of the 16m RS symbols after the permutation is taken from the RS symbol in the i-th row and j0-th column of the 16m RS symbols before the permutation, where 0 ≤ j0 ≤ 3.

[0053] In some possible implementations, d s =12, where every 12 consecutive RS symbols in each second data stream come from 3 of the m sixth data streams, and every 12 consecutive RS symbols in each second data stream include 4 consecutive RS symbols from each of the 3 sixth data streams. Another specific implementation of the permutation is provided here, where the 12 RS symbols (4 consecutive RS symbols from each of the 3 sixth data streams) constitute a single 12 consecutive RS symbols in the second data stream. This low-complexity permutation allows compatibility with certain FEC coding schemes.

[0054] In some possible implementations, specific permutation rules are provided, resulting in low permutation complexity and achieving d with low implementation cost. s =12. The 12m RS symbols distributed in m rows and 12 columns from m sixth data streams are permuted to obtain 12m RS symbols distributed in m rows and 12 columns. The 12 RS symbols in the i-th row of the original 12m RS symbols come from the 12 consecutive RS symbols in the i-th sixth data stream from the m sixth data streams, where 0 ≤ i <m;

[0055] The 4m RS symbols in columns 0, 1, 2, and 3 of the 12m RS symbols after the permutation are derived from the 4m RS symbols in columns 0, 1, 2, and 3 of the 12m RS symbols before the permutation.

[0056] The 4m RS symbols in columns 4, 5, 6, and 7 of the 12m RS symbols after the permutation are derived from the 4m RS symbols in columns 4, 5, 6, and 7 of the 12m RS symbols before the permutation.

[0057] The 4m RS symbols in columns 8, 9, 10, and 11 of the 12m RS symbols after the permutation are derived from the 4m RS symbols in columns 8, 9, 10, and 11 of the 12m RS symbols before the permutation.

[0058] The 12 RS symbols in any row of the 12m RS symbols after the permutation are derived from the 4 RS symbols in the i0th row, the 4 RS symbols in the i1th row, and the 4 RS symbols in the i2th row of the 12m RS symbols before the permutation, for a total of 12 RS symbols.

[0059] i0 is an integer from 0 to (m / 4-1), i1 is an integer from m / 4 to (m / 2-1), and i2 is an integer from m / 2 to (3m / 4-1); or, i0 is an integer from 0 to (m / 4-1), i1 is an integer from m / 4 to (m / 2-1), and i2 is an integer from 3m / 4 to (m-1); or, i0 is an integer from 0 to (m / 4-1), i1 is an integer from m / 2 to (3m / 4-1), and i2 is an integer from 3m / 4 to (m-1); or, i0 is an integer from m / 4 to (m / 2-1), i1 is an integer from m / 2 to (3m / 4-1), and i2 is an integer from 3m / 4 to (m-1), where m is a positive integer multiple of 4.

[0060] In some possible implementations, the m RS symbols in the j-th column of the 12m RS symbols after the permutation are derived from the m RS symbols in the j-th column of the 12m RS symbols before the permutation, where 0 ≤ j ≤ 11.

[0061] In some possible implementations, the 12 RS symbols in any row of the 12m RS symbols after the permutation are derived from the 12 RS symbols before the permutation, which consist of 4 consecutive RS symbols in the i0th row, 4 consecutive RS symbols in the i1th row, and 4 consecutive RS symbols in the i2th row.

[0062] In some possible implementations, the RS symbol in the i-th row and j0-th column of the 12m RS symbols after the permutation is taken from the RS symbol in the i-th row and j0-th column of the 12m RS symbols before the permutation, where 0 ≤ j0 ≤ 3.

[0063] In some possible implementations, before performing the first processing on the n first data streams to obtain m second data streams, the method further includes: removing the offset from the n first data streams, such that there is no offset between any two first data streams after the offset removal, or the offset between any two first data streams after the offset removal is d. skew bits, d skew It is a positive integer multiple of 10.

[0064] In some possible implementations, before performing the first processing on the n first data streams to obtain m second data streams, the method further includes: removing the offset from the n first data streams, such that there is no offset between any two first data streams after the offset removal, or the offset between any two first data streams after the offset removal is d. skew bits, d skew It is a positive integer multiple of 20.

[0065] In some possible implementations, before performing the first processing on the n first data streams to obtain m second data streams, the method further includes: removing the offset from the n first data streams, such that there is no offset between any two first data streams after the offset removal, or the offset between any two first data streams after the offset removal is d. skew bits, d skew It is a positive integer multiple of 40.

[0066] In some possible implementations, there is no offset between multiple first data streams from the same Ethernet client in the n first data streams after offset removal.

[0067] It should be noted that the offset removal methods provided above are all applied to the first data streams of all Ethernet customer services, allowing the first processing to be performed at the RS symbol granularity, thereby improving the overall performance of the concatenated FEC code.

[0068] In some possible implementations, the second processing also includes dual polarization symbol mapping and framing. After FEC encoding, the m second data streams undergo dual polarization symbol mapping and framing to become one dual polarization data stream, thus having good application value in coherent optical transmission scenarios.

[0069] In some possible implementations, n = 8. Alternatively, n can also be 16 or 32.

[0070] In some possible implementations, m can be any of 8, 16, 32, or 64.

[0071] In some possible implementations, the FEC-encoded codeword comprises N bits, which include K information bits and NK parity bits. N = 126, K = 110; or, N = 128, K = 120; or, N = 176, K = 160.

[0072] Secondly, embodiments of this application provide a data processing apparatus, which includes an acquisition unit and a processing unit. The acquisition unit is configured to: acquire n first data streams encoded by RS, wherein n>1, and each of the n first data streams contains four consecutive RS symbols derived from four RS codewords, and the n first data streams carry data from at least four Ethernet clients; the processing unit is configured to: perform a first processing on the n first data streams to obtain m second data streams, wherein m≥n, and each of the m second data streams contains four consecutive RS symbols derived from four RS codewords, and the n first data streams carry data from at least four Ethernet clients; s The RS symbols respectively come from d s One RS codeword, d s≥8, multiple RS symbols in each second data stream come from at least 2 of the n first data streams; perform a second processing including FEC encoding on the m second data streams.

[0073] In some possible implementations, each second data stream contains every consecutive d... s Each RS symbol comes from at least two of the n first data streams. This is equivalent to obtaining four consecutive RS symbols from each of the at least two first data streams to form a continuous sequence of d symbols in the second data stream. s The presence of multiple consecutive (d) RS symbols in each second data stream can be quickly achieved through permutations across multiple first data streams. s (≥8) RS symbols are derived from different RS codewords, resulting in lower implementation cost and higher implementation efficiency.

[0074] In some possible implementations, every n / 4 of the n first data streams carries the data of one Ethernet client, where n is a positive integer multiple of 4. For example, for a 1.6T coherent transmission scenario, considering four 400G Ethernet clients, every two of the n=8 first data streams carry the data of one 400G Ethernet client, thus making this application more valuable for future coherent transmission scenarios at higher speeds (such as 1.6T or 3.2T).

[0075] In some possible implementations, d s ≥11, where multiple RS symbols in each second data stream originate from at least 3 of the n first data streams. It should be understood that, considering the FEC encoding used in the second processing typically requires a number of information bits greater than or equal to 110, and one RS symbol comprises 10 bits, the first processing ensures that every consecutive 11 RS symbols in each second data stream originate from 11 RS codewords, thus facilitating adaptation to more FEC encoding methods. Furthermore, d s Matching the FEC encoding method allows the FEC cascade scheme to achieve optimal performance.

[0076] In some possible implementations, the processing unit is specifically used to: permutate n first data streams to obtain m second data streams, where n = m. This is equivalent to the first processing using a "permutation-only" approach, which simplifies hardware implementation.

[0077] In some possible implementations, d s=16, where every 16 consecutive RS symbols in each second data stream come from 4 of the n first data streams, and every 16 consecutive RS symbols in each second data stream include 4 consecutive RS symbols from each of the 4 first data streams. A specific implementation of this permutation is provided, where 16 RS symbols (4 consecutive RS symbols from each of the 4 first data streams) constitute 16 consecutive RS symbols in a second data stream, thus ensuring compatibility with most FEC coding schemes. For example, it is compatible with linear block codes (N=126, K=110), (N=128, K=120), and (N=176, K=160), where K is the number of information bits in the FEC code and N is the number of bits in the FEC codeword.

[0078] In some possible implementations, d s =12, where every 12 consecutive RS symbols in each second data stream come from 3 of the n first data streams, and every 12 consecutive RS symbols in each second data stream include 4 consecutive RS symbols from each of the 3 first data streams. Another specific implementation of the permutation is provided here, where 12 RS symbols (4 consecutive RS symbols from each of the 3 first data streams) constitute a single 12 consecutive RS symbols in the second data stream. This low-complexity permutation allows compatibility with certain FEC coding schemes. For example, it is compatible with linear block codes (N=126, K=110) and (N=128, K=120), where K is the number of information bits in the FEC code and N is the number of bits in the FEC codeword.

[0079] In some possible implementations, the second process further includes distribution: m second data streams are FEC encoded to obtain m third data streams; the m third data streams are then distributed to obtain m×q fourth data streams, where each of the m third data streams is distributed to obtain q fourth data streams, and q is an integer greater than 1. In other words, a "distribution" operation is added to the second process, thus adapting to more application scenarios.

[0080] In some possible implementations, the distribution granularity is N bits, where N is the number of bits included in the FEC-encoded codeword, and N>1, so that each FEC-encoded codeword can be completely distributed to the corresponding data stream.

[0081] In some possible implementations, the processing unit is specifically used to: permutate n first data streams to obtain n fifth data streams; and distribute the n fifth data streams to obtain m second data streams, where m = n × p, and each of the n fifth data streams is distributed to obtain p second data streams, where p is an integer greater than 1. This is equivalent to the first processing employing a "permutation first, then distribution" approach, meaning the number of second data streams m after the first processing is greater than the number of first data streams n, thus adapting to more application scenarios.

[0082] In some possible implementations, every 16 consecutive RS symbols in each of the n fifth data streams originate from 16 RS codewords, and every 16 consecutive RS symbols in each fifth data stream originate from 4 of the n first data streams. Each 16 consecutive RS symbols in each fifth data stream includes 4 consecutive RS symbols from each of the 4 first data streams. A specific implementation of this substitution is provided, whereby a total of 16 RS symbols (4 consecutive RS symbols from each of the 4 first data streams) constitutes 16 consecutive RS symbols in a fifth data stream, thus ensuring compatibility with most FEC coding schemes.

[0083] In some possible implementations, the distribution granularity is 16 RS symbols, thereby ensuring d s =16, to ensure compatibility with most FEC encoding methods.

[0084] In some possible implementations, every 12 consecutive RS symbols in each of the n fifth data streams come from 12 RS codewords, and every 12 consecutive RS symbols in each fifth data stream come from 3 of the n first data streams. Each 12 consecutive RS symbols in each fifth data stream includes 4 consecutive RS symbols from each of the 3 first data streams. Another specific implementation of the permutation is provided here, where 12 RS symbols (4 consecutive RS symbols from each of the 3 first data streams) constitute a single 12 consecutive RS symbols in a fifth data stream. This low-complexity permutation allows for compatibility with certain FEC coding schemes.

[0085] In some possible implementations, the distribution granularity is 12 RS symbols, thereby ensuring d s =12, to ensure compatibility with certain FEC encoding methods.

[0086] In some possible implementations, the granularity of distribution is K / 10 RS symbols, d s= K / 10, where K is the number of information bits of the FEC encoding, and 1 < K ≤ 160. This is equivalent to the distribution granularity depending on the specific code type adopted by the FEC encoding, and can more specifically adapt to the adopted FEC encoding method.

[0087] In some possible implementation manners, some specific permutation rules are provided, and the complexity of the permutation is relatively low. The effect of d = 16 can be achieved with a relatively low implementation cost. s n = 8. 128 RS symbols distributed in 8 rows and 16 columns among the 8 first data streams are permuted to obtain 128 RS symbols distributed in 8 rows and 16 columns. Among the 128 RS symbols before permutation, the 16 RS symbols in the i-th row come from 16 consecutive RS symbols in the i-th first data stream among the 8 first data streams, 0 ≤ i ≤ 7;

[0088] Among the 128 RS symbols after permutation, a total of 32 RS symbols in the 0th column, 1st column, 2nd column, and 3rd column come from a total of 32 RS symbols in the 0th column, 1st column, 2nd column, and 3rd column among the 128 RS symbols before permutation;

[0089] Among the 128 RS symbols after permutation, a total of 32 RS symbols in the 4th column, 5th column, 6th column, and 7th column come from a total of 32 RS symbols in the 4th column, 5th column, 6th column, and 7th column among the 128 RS symbols before permutation;

[0090] Among the 128 RS symbols after permutation, a total of 32 RS symbols in the 8th column, 9th column, 10th column, and 11th column come from a total of 32 RS symbols in the 8th column, 9th column, 10th column, and 11th column among the 128 RS symbols before permutation;

[0091] Among the 128 RS symbols after permutation, a total of 32 RS symbols in the 12th column, 13th column, 14th column, and 15th column come from a total of 32 RS symbols in the 12th column, 13th column, 14th column, and 15th column among the 128 RS symbols before permutation;

[0092] Among the 128 RS symbols after permutation, the 16 RS symbols in any row come from 4 RS symbols in the i0-th row, 4 RS symbols in the i1-th row, 4 RS symbols in the i2-th row, and 4 RS symbols in the i3-th row among the 128 RS symbols before permutation, where i0 = 0 or 1, i1 = 2 or 3, i2 = 4 or 5, and i3 = 6 or 7.

[0093] In some possible implementation manners, among the 128 RS symbols after permutation, the 8 RS symbols in the j-th column come from the 8 RS symbols in the j-th column among the 128 RS symbols before permutation, 0 ≤ j ≤ 15.

[0094] In some possible implementations, the 16 RS symbols in any row of the 128 RS symbols after the permutation are derived from the 16 consecutive RS symbols in the i0th row, the i1th row, the i2th row, and the i3th row of the 128 RS symbols before the permutation.

[0095] In some possible implementations, the RS symbol in the i-th row and j0-th column of the 128 RS symbols after the permutation is taken from the RS symbol in the i-th row and j0-th column of the 128 RS symbols before the permutation, where 0 ≤ j0 ≤ 3.

[0096] In some possible implementations, specific permutation rules are provided, resulting in low permutation complexity and achieving d with low implementation cost. s =12. When n=8, the 96 RS symbols distributed in 8 rows and 12 columns in the 8 first data streams are permuted to obtain 96 RS symbols distributed in 8 rows and 12 columns. The 12 RS symbols in the i-th row of the 96 RS symbols before the permutation come from the 12 consecutive RS symbols in the i-th first data stream in the 8 first data streams, 0≤i≤7;

[0097] The 32 RS symbols in columns 0, 1, 2, and 3 of the 96 RS symbols after the permutation are derived from the 32 RS symbols in columns 0, 1, 2, and 3 of the 96 RS symbols before the permutation.

[0098] The 32 RS symbols in columns 4, 5, 6, and 7 of the 96 RS symbols after the permutation are derived from the 32 RS symbols in columns 4, 5, 6, and 7 of the 96 RS symbols before the permutation.

[0099] The 32 RS symbols in columns 8, 9, 10, and 11 of the 96 RS symbols after the permutation are derived from the 32 RS symbols in columns 8, 9, 10, and 11 of the 96 RS symbols before the permutation.

[0100] The 12 RS symbols in any row of the 96 RS symbols after the permutation are derived from the 4 RS symbols in row i0, the 4 RS symbols in row i1, and the 4 RS symbols in row i2 of the 96 RS symbols before the permutation, for a total of 12 RS symbols.

[0101] i0 = 0 or 1, i1 = 2 or 3, i2 = 4 or 5; or i0 = 0 or 1, i1 = 2 or 3, i2 = 6 or 7; or i0 = 0 or 1, i1 = 4 or 5, i2 = 6 or 7; or i0 = 2 or 3, i1 = 4 or 5, i2 = 6 or 7.

[0102] In some possible implementations, the 8 RS symbols in the j-th column of the 96 RS symbols after the permutation are derived from the 8 RS symbols in the j-th column of the 96 RS symbols before the permutation, where 0 ≤ j ≤ 11.

[0103] In some possible implementations, the 12 RS symbols in any row of the 96 RS symbols after the permutation are derived from the 12 RS symbols in the i0th row, the i1th row, and the i2th row of the 96 RS symbols before the permutation.

[0104] In some possible implementations, the RS symbol in the i-th row and j0-th column of the 96 RS symbols after the permutation is taken from the RS symbol in the i-th row and j0-th column of the 96 RS symbols before the permutation, where 0 ≤ j0 ≤ 3.

[0105] In some possible implementations, the processing unit is specifically used to: distribute n first data streams to obtain m sixth data streams, where m = n × p, and each of the n first data streams is distributed to obtain p sixth data streams, where p is an integer greater than 1; and permutate the m sixth data streams to obtain m second data streams. This is equivalent to the first processing employing a "distribution first, then permutation" approach, meaning the number of second data streams m after the first processing is greater than the number of first data streams n, thus adapting to more application scenarios.

[0106] In some possible implementations, the granularity of the distributed RS symbols is an integer multiple of 4, and every four consecutive RS symbols in each of the m sixth data streams come from four RS codewords, thus providing a basis for subsequent permutation operations to facilitate the implementation of more consecutive (d) symbols in each second data stream. s (≥8) RS symbols are derived from different RS codewords.

[0107] In some possible implementations, d s =16, where every 16 consecutive RS symbols in each second data stream come from 4 of the m sixth data streams, and every 16 consecutive RS symbols in each second data stream include 4 consecutive RS symbols from each of the 4 sixth data streams. A specific implementation of this permutation is provided, whereby a total of 16 RS symbols (4 consecutive RS symbols from each of the 4 sixth data streams) constitutes 16 consecutive RS symbols in a second data stream, thus ensuring compatibility with most FEC coding schemes.

[0108] In some possible implementations, specific permutation rules are provided, resulting in low permutation complexity and achieving d with low implementation cost. s=16. The 16m RS symbols distributed in m rows and 16 columns from m sixth data streams are permuted to obtain 16m RS symbols distributed in m rows and 16 columns. The 16 RS symbols in the i-th row of the original 16m RS symbols come from the 16 consecutive RS symbols in the i-th sixth data stream from the m sixth data streams, where 0 ≤ i <m;

[0109] The 4m RS symbols in columns 0, 1, 2, and 3 of the 16m RS symbols after the permutation are derived from the 4m RS symbols in columns 0, 1, 2, and 3 of the 16m RS symbols before the permutation.

[0110] The 4m RS symbols in columns 4, 5, 6, and 7 of the 16m RS symbols after the permutation are derived from the 4m RS symbols in columns 4, 5, 6, and 7 of the 16m RS symbols before the permutation.

[0111] The 4m RS symbols in columns 8, 9, 10, and 11 of the 16m RS symbols after the permutation are derived from the 4m RS symbols in columns 8, 9, 10, and 11 of the 16m RS symbols before the permutation.

[0112] The 4m RS symbols in columns 12, 13, 14, and 15 of the 16m RS symbols after the permutation are derived from the 4m RS symbols in columns 12, 13, 14, and 15 of the 16m RS symbols before the permutation.

[0113] The 16 RS symbols in any row of the 16m RS symbols after the permutation are derived from the 4 RS symbols in the i0th row, the 4 RS symbols in the i1th row, the 4 RS symbols in the i2th row, and the 4 RS symbols in the i3th row of the 16m RS symbols before the permutation, for a total of 16 RS symbols. i0 is an integer from 0 to (m / 4-1), i1 is an integer from m / 4 to (m / 2-1), i2 is an integer from m / 2 to (3m / 4-1), and i3 is an integer from 3m / 4 to (m-1), where m is a positive integer multiple of 4.

[0114] In some possible implementations, the m RS symbols in the j-th column of the 16m RS symbols after the permutation are derived from the m RS symbols in the j-th column of the 16m RS symbols before the permutation, where 0 ≤ j ≤ 15.

[0115] In some possible implementations, the 16 RS symbols in any row of the 16m RS symbols after the permutation are derived from the 16 consecutive RS symbols in the i0th row, the i1th row, the i2th row, and the i3th row of the 16m RS symbols before the permutation, totaling 16 RS symbols.

[0116] In some possible implementations, the RS symbol in the i-th row and j0-th column of the 16m RS symbols after the permutation is taken from the RS symbol in the i-th row and j0-th column of the 16m RS symbols before the permutation, where 0 ≤ j0 ≤ 3.

[0117] In some possible implementations, d s =12, where every 12 consecutive RS symbols in each second data stream come from 3 of the m sixth data streams, and every 12 consecutive RS symbols in each second data stream include 4 consecutive RS symbols from each of the 3 sixth data streams. Another specific implementation of the permutation is provided here, where the 12 RS symbols (4 consecutive RS symbols from each of the 3 sixth data streams) constitute a single 12 consecutive RS symbols in the second data stream. This low-complexity permutation allows compatibility with certain FEC coding schemes.

[0118] In some possible implementations, specific permutation rules are provided, resulting in low permutation complexity and achieving d with low implementation cost. s =12. The 12m RS symbols distributed in m rows and 12 columns from m sixth data streams are permuted to obtain 12m RS symbols distributed in m rows and 12 columns. The 12 RS symbols in the i-th row of the original 12m RS symbols come from the 12 consecutive RS symbols in the i-th sixth data stream from the m sixth data streams, where 0 ≤ i <m;

[0119] The 4m RS symbols in columns 0, 1, 2, and 3 of the 12m RS symbols after the permutation are derived from the 4m RS symbols in columns 0, 1, 2, and 3 of the 12m RS symbols before the permutation.

[0120] The 4m RS symbols in columns 4, 5, 6, and 7 of the 12m RS symbols after the permutation are derived from the 4m RS symbols in columns 4, 5, 6, and 7 of the 12m RS symbols before the permutation.

[0121] The 4m RS symbols in columns 8, 9, 10, and 11 of the 12m RS symbols after the permutation are derived from the 4m RS symbols in columns 8, 9, 10, and 11 of the 12m RS symbols before the permutation.

[0122] The 12 RS symbols in any row of the 12m RS symbols after the permutation are derived from the 4 RS symbols in the i0th row, the 4 RS symbols in the i1th row, and the 4 RS symbols in the i2th row of the 12m RS symbols before the permutation, for a total of 12 RS symbols.

[0123] i0 is an integer from 0 to (m / 4-1), i1 is an integer from m / 4 to (m / 2-1), and i2 is an integer from m / 2 to (3m / 4-1); or, i0 is an integer from 0 to (m / 4-1), i1 is an integer from m / 4 to (m / 2-1), and i2 is an integer from 3m / 4 to (m-1); or, i0 is an integer from 0 to (m / 4-1), i1 is an integer from m / 2 to (3m / 4-1), and i2 is an integer from 3m / 4 to (m-1); or, i0 is an integer from m / 4 to (m / 2-1), i1 is an integer from m / 2 to (3m / 4-1), and i2 is an integer from 3m / 4 to (m-1), where m is a positive integer multiple of 4.

[0124] In some possible implementations, the m RS symbols in the j-th column of the 12m RS symbols after the permutation are derived from the m RS symbols in the j-th column of the 12m RS symbols before the permutation, where 0 ≤ j ≤ 11.

[0125] In some possible implementations, the 12 RS symbols in any row of the 12m RS symbols after the permutation are derived from the 12 RS symbols before the permutation, which consist of 4 consecutive RS symbols in the i0th row, 4 consecutive RS symbols in the i1th row, and 4 consecutive RS symbols in the i2th row.

[0126] In some possible implementations, the RS symbol in the i-th row and j0-th column of the 12m RS symbols after the permutation is taken from the RS symbol in the i-th row and j0-th column of the 12m RS symbols before the permutation, where 0 ≤ j0 ≤ 3.

[0127] In some possible implementations, before performing the first processing on the n first data streams to obtain m second data streams, the processing unit is further configured to: remove the offset from the n first data streams, such that there is no offset between any two first data streams after the offset removal, or the offset between any two first data streams after the offset removal is d. skew bits, d skew It is a positive integer multiple of 10.

[0128] In some possible implementations, before performing the first processing on the n first data streams to obtain m second data streams, the processing unit is further configured to: remove the offset from the n first data streams, such that there is no offset between any two first data streams after the offset removal, or the offset between any two first data streams after the offset removal is d. skew bits, d skew It is a positive integer multiple of 20.

[0129] In some possible implementations, before performing the first processing on the n first data streams to obtain m second data streams, the processing unit is further configured to: remove the offset from the n first data streams, such that there is no offset between any two first data streams after the offset removal, or the offset between any two first data streams after the offset removal is d. skew bits, d skew It is a positive integer multiple of 40.

[0130] In some possible implementations, there is no offset between multiple first data streams from the same Ethernet client in the n first data streams after offset removal.

[0131] In some possible implementations, the second processing also includes dual polarization symbol mapping and framing. After FEC encoding, the m second data streams undergo dual polarization symbol mapping and framing to become one dual polarization data stream, thus having good application value in coherent optical transmission scenarios.

[0132] In some possible implementations, n = 8.

[0133] In some possible implementations, the FEC-encoded codeword comprises N bits, which include K information bits and NK parity bits. N = 126, K = 110; or, N = 128, K = 120; or, N = 176, K = 160.

[0134] Thirdly, embodiments of this application provide a chip for performing the method as described in any of the embodiments of the first aspect.

[0135] Fourthly, embodiments of this application provide an optical module, which includes a processor and an interface. The interface is used to transmit and receive signals, and the processor is used to execute the methods described in any embodiment of the first aspect. For example, the interface is used to transmit signals from the processor or to transmit received signals to the processor.

[0136] Fifthly, embodiments of this application provide a network device. This network device includes a host-side device and an optical module as described in the fourth aspect. For example, the optical module is used to convert electrical signals from the host-side device into optical signals and transmit the optical signals. As another example, the optical module is used to convert received optical signals into electrical signals and transmit the electrical signals to the host-side device.

[0137] Sixthly, embodiments of this application provide a communication system that includes multiple network devices as described in the fifth aspect, wherein the multiple network devices are used to send optical signals to each other.

[0138] In a seventh aspect, this application provides a computer-readable storage medium storing instructions that, when executed by a computer, cause the method described in any embodiment of the first aspect to be implemented.

[0139] Eighthly, this application provides a computer program product including program instructions that, when executed, implement the method described in any of the embodiments of the first aspect. Attached Figure Description

[0140] Figure 1 is a schematic diagram of a communication system applied in an embodiment of this application;

[0141] Figure 2 is a schematic diagram of a data transmission process in the communication system shown in Figure 1;

[0142] Figure 3 is a schematic diagram of another communication system applied in the embodiments of this application;

[0143] Figure 4 is a flowchart illustrating a data processing method provided in an embodiment of this application.

[0144] Figure 5(a) is a schematic diagram of one embodiment of dual polarization symbol mapping and DSP framing in this application;

[0145] Figure 5(b) is a schematic diagram of another implementation of dual polarization symbol mapping and DSP framing in the embodiments of this application;

[0146] Figure 5(c) is a schematic diagram of another implementation of dual polarization symbol mapping and DSP framing in the embodiments of this application;

[0147] Figure 5(d) is a schematic diagram of another implementation of dual polarization symbol mapping and DSP framing in the embodiments of this application;

[0148] Figure 6(a) is a schematic diagram of one embodiment of the substitution in this application;

[0149] Figure 6(b) is a schematic diagram of another implementation of the substitution in the embodiments of this application;

[0150] Figure 6(c) is a schematic diagram of another implementation of the substitution in the embodiments of this application;

[0151] Figure 6(d) is a schematic diagram of another implementation of the substitution in the embodiments of this application;

[0152] Figure 7 is a schematic diagram of an embodiment of the present application that involves replacement followed by distribution;

[0153] Figure 8 is a schematic diagram of an embodiment of the present application that first distributes and then replaces;

[0154] Figure 9(a) is a schematic diagram of another implementation of the substitution in the embodiments of this application;

[0155] Figure 9(b) is a schematic diagram of another implementation of the substitution in the embodiments of this application;

[0156] Figure 9(c) is a schematic diagram of another embodiment of the substitution in this application;

[0157] Figure 9(d) is a schematic diagram of another implementation of the substitution in the embodiments of this application;

[0158] Figure 10 is a schematic diagram of one embodiment of the data processing method in this application;

[0159] Figure 11 is a schematic diagram of another embodiment of the data processing method in this application;

[0160] Figure 12 is a schematic diagram of another embodiment of the data processing method in this application;

[0161] Figure 13 is a schematic diagram of another embodiment of the data processing method in this application;

[0162] Figure 14(a) is a schematic diagram of another implementation of the substitution in the embodiments of this application;

[0163] Figure 14(b) is a schematic diagram of another implementation of the substitution in the embodiments of this application;

[0164] Figure 14(c) is a schematic diagram of another embodiment of the substitution in the present application;

[0165] Figure 14(d) is a schematic diagram of another implementation of the substitution in the embodiments of this application;

[0166] Figure 15(a) is a schematic diagram of another embodiment of the substitution in this application;

[0167] Figure 15(b) is a schematic diagram of another embodiment of the substitution in this application;

[0168] Figure 15(c) is a schematic diagram of another embodiment of the substitution in the present application;

[0169] Figure 15(d) is a schematic diagram of another embodiment of the substitution in this application;

[0170] Figure 16 is a schematic diagram of another embodiment of the data processing method in this application;

[0171] Figure 17 is a schematic diagram of a data processing device in an embodiment of this application;

[0172] Figure 18 is a schematic diagram of an optical module in an embodiment of this application;

[0173] Figure 19 is a schematic diagram of a network device in an embodiment of this application. Detailed Implementation

[0174] This application provides a data processing method, apparatus, and system, which enable the proposed cascaded FEC scheme to have strong decoding performance and low latency, and can be applied to a wide range of coherent transmission scenarios.

[0175] It should be noted that the terms "first," "second," etc., in this application specification, claims, and the accompanying drawings are used to distinguish similar objects, not to limit a specific order or sequence. It should be understood that the above terms can be interchanged where appropriate so that the embodiments described in this application can be implemented in an order other than that described in this application. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to these processes, methods, products, or devices. It should be noted that in the embodiments of this application, unless otherwise stated, "a plurality of" refers to two or more. The "or" in the embodiments of this application is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A or B can be represented as: A existing alone, A and B existing simultaneously, and B existing alone.

[0176] Figure 1 is a schematic diagram of a communication system applied in an embodiment of this application. As shown in Figure 1, the communication system includes a transmitting device 01, a transmitting processing module 02, a channel transmission medium 03, a receiving processing module 04, and a receiving device 05. Taking a data center network as an example, the transmitting device 01 and the receiving device 05 can be devices such as switches, routers, or servers, and the channel transmission medium 03 can be an optical fiber. The connection interface between the transmitting device 01 and the transmitting processing module 02 (or between the receiving device 05 and the receiving processing module 04) can be an attachment unit interface (AUI). The transmitting processing module 02 and the receiving processing module 04 can be optical modules, electrical modules, or other modules that process data during data transmission. For example, the processing module can be an ER optical module, FR optical module, or LR optical module, such as a 1.6T LR1 coherent optical module (referred to as a 1.6T LR coherent optical module), a 1.6T FR1 coherent optical module (referred to as a 1.6T FR coherent optical module), or a 1.6T ER1 coherent optical module (referred to as a 1.6T ER coherent optical module). ER, FR, or LR optical modules can also be called simplified coherent (coherent-light or coherent-lite, CL) optical modules. Furthermore, the transmitting device 01, transmitting processing module 02, channel transmission medium 03, receiving processing module 04, and receiving device 05 in this communication system can all support bidirectional transmission or unidirectional transmission; specific limitations are not specified here.

[0177] Figure 2 is a schematic diagram of a data transmission process in the communication system shown in Figure 1. As shown in Figure 2, during the data transmission process from the transmitting device 01 to the receiving device 05, the transmitting device 01 performs external code encoding on the data and then transmits the externally encoded data to the transmitting processing module 02. The transmitting processing module 02 performs internal code encoding on the externally encoded data to obtain data with both external and internal code encoding, and transmits the data with both external and internal code encoding to the channel transmission medium 03. The channel transmission medium 03 transmits the data with both external and internal code encoding to the receiving processing module 04. The receiving processing module 04 performs internal code decoding on the data with both external and internal code encoding and transmits the internally decoded data to the receiving device 05. The receiving device 05 performs external code decoding on the data with internal code decoding.

[0178] It should be understood that the distinction between "internal" in "internal code" and "external" in "external code" is based solely on the distance between the entity performing the data operation and the channel transmission medium 03. The entity operating on the internal code is closer to the channel transmission medium, while the entity operating on the external code is farther away. In this embodiment, after data is sent from the transmitting device 01, it is transmitted to the channel transmission medium 03 via the transmitting processing module 02, and then from the channel transmission medium 03 via the receiving processing module 04 to the receiving device 05. The data encoded by the transmitting device 01 is farther from the channel transmission medium 03 than the data encoded by the transmitting processing module 02, and the data decoded by the receiving device 05 is farther from the channel transmission medium 03 than the data decoded by the receiving processing module 04. Therefore, the data encoded by the transmitting device 01 is called data encoded with the external code, the data encoded by the transmitting processing module 02 is called data encoded with the internal code, the data decoded by the receiving device 05 is called data decoded with the external code, and the data decoded by the receiving processing module 04 is called data decoded with the internal code. In one possible implementation, both the internal and external encoding described above employ FEC encoding, thus forming a cascaded FEC transmission scheme. For example, the transmitting device 01 can use Reed-Solomon (RS) encoding for external encoding, and the transmitting processing module 02 can use Hamming code for internal encoding. Alternatively, the transmitting device 01 can use RS code for external encoding, and the transmitting processing module 02 can use Bose-Chaudhuri-Hocquenghem (BCH) code for internal encoding. A BCH code correcting a single error is equivalent to a Hamming code. Again, the transmitting device 01 can use RS code for external encoding, and the transmitting processing module 02 can use Polar code for internal encoding. In some specific application scenarios, the transmitting device 01 can use RS(544,514) code for external code encoding. RS(544,514) code is also called KP4 code.

[0179] Figure 3 is a schematic diagram of another communication system applied in an embodiment of this application. As shown in Figure 3, the communication system includes a transmitting device 01, a channel transmission medium 03, and a receiving device 05. The transmitting device 01 performs external code encoding and internal code encoding on the data. The data after external code encoding and internal code encoding is sent to the channel transmission medium 03. The receiving device 05 decodes the data received from the channel transmission medium 03 using both internal code decoding and external code decoding. Taking a data center network as an example, the transmitting device 01 and the receiving device 05 can be devices such as routers, switches, servers, or optical transport network equipment, and the channel transmission medium 03 can be an optical fiber. The transmitting device 01, the channel transmission medium 03, and the receiving device 05 in this communication system can all support bidirectional transmission or unidirectional transmission; specific limitations are not specified here. That is, the transmitting device 01 shown in Figure 3 also integrates the functions of the transmitting processing module 02 shown in Figure 2, and the receiving device 05 shown in Figure 3 also integrates the functions of the receiving processing module 04 shown in Figure 2. At this time, the transmitting device 01 may also adopt linear pluggable optics (LPO), co-packaged optics (CPO), or near packaged optics (NPO) technology.

[0180] The above content is an exemplary description of the application scenarios of the data processing method provided in the embodiments of this application, and does not constitute a limitation on the application scenarios of the data processing method. As those skilled in the art will know, as business needs change, the application scenarios can be adjusted according to the application needs, and the embodiments of this application do not list them one by one.

[0181] Figure 4 is a schematic flowchart of a data processing method provided in an embodiment of this application. It should be understood that this data processing method is applied to the sending end, for example, it can be implemented by the sending end processing module 02 shown in Figure 2 above, or by the sending end device 01 shown in Figure 3 above.

[0182] 101. Obtain n first data streams after RS ​​encoding.

[0183] In this embodiment, all n first data streams are data streams encoded with external codes, where n is an integer greater than 1. For ease of explanation, the following description uses RS encoding as an example of external code encoding. In practical applications, other encoding methods can also be used for external code encoding. The first data stream after RS ​​encoding can include multiple RS codewords. In this embodiment, the code length of the RS code is counted in units of symbols. The symbols in the RS code can be called RS symbols. For example, the RS code uses RS(544,514) code, also known as KP4 code. The code length of the RS code is 544 RS symbols, that is, the codeword of the RS code includes 544 RS symbols, and one RS symbol contains 10 bits. Among them, four consecutive RS symbols in each first data stream come from four RS codewords. The n first data streams carry data from at least four Ethernet clients. The data of the Ethernet clients can also be called Ethernet services.

[0184] In specific applications, considering a 1.6T coherent transmission scenario, consider four 400G Ethernet clients (referred to as 400GE clients or 400G clients), where n = 8. Each of the eight first data streams has a nominal rate of 212.5 Gbits per second (b / s). In some specific applications, these eight first data streams are obtained by demodulating a total of eight signal streams from four 400G AUI-2 interfaces using four-level pulse amplitude modulation (PAM4), also known as PAM4 decoding. Each pair of signal streams originates from one corresponding 400G AUI-2 interface, meaning each pair of signal streams includes data from one Ethernet client. Therefore, the eight first data streams obtained by PAM4 demodulation carry the data from four Ethernet clients. In each of the eight first data streams, four consecutive RS symbols come from four RS codewords.

[0185] 102. Perform first processing on n first data streams to obtain m second data streams.

[0186] In this embodiment, m is greater than or equal to n, and the first process includes at least a permutation operation. In one possible implementation, the first process includes only a permutation operation, then m = n. In another possible implementation, the first process also includes a distribution operation, where permutation is performed first and then distribution is performed, then m > n. In yet another possible implementation, the first process also includes a distribution operation, where distribution is performed first and then permutation is performed, then m > n.

[0187] It should be noted that, regardless of the specific implementation method used in the first processing, each consecutive d in each second data stream obtained after the first processing s The RS symbols respectively come from d s d RS codewords, where the integer d s ≥8. Furthermore, multiple RS symbols in each second data stream originate from at least two first data streams; more specifically, in each consecutive d-bit second data stream... s Each RS symbol originates from at least two first data streams. That is, the permutation in this embodiment is performed between at least two first data streams, rather than on each first data stream independently. The at least two first data streams involved in the permutation carry data from different Ethernet clients, and the RS symbols in any two first data streams carrying data from different Ethernet clients originate from different RS codewords. This is equivalent to interleaving at least two first data streams in this embodiment, thereby scrambling the positions of some RS symbols in the n first data streams. In other words, the permutation in this embodiment is performed at the RS symbol level; the RS symbols in the at least two data streams before the permutation can be merged into the same permuted data stream. Since four consecutive RS symbols in each first data stream originate from four RS codewords, and the RS symbols in any two first data streams involved in the permutation originate from different RS codewords, the permutation can result in each second data stream having more consecutive (d) RS symbols. s At least 2 × 4 = 8 RS symbols come from different RS codewords, making it easier to adapt to more internal code encoding methods. Furthermore, this effect can be achieved without performing convolution and interleaving on each first data stream separately, effectively reducing data processing latency. Typically, integer d... s The integers d are 8, 11, 12, 16, etc. In some specific applications, the integer d... s It is K / 10, where K is the length of the information bits encoded in the internal code.

[0188] In some specific applications, the symbols in each second data stream are derived from at least three first data streams. Typically, permutations can be used to make each second data stream contain more consecutive (d) symbols. s≥11 RS symbols are derived from different RS codewords, facilitating adaptation to more internal code encoding methods. Furthermore, this effect can be achieved without performing separate convolution and interleaving on each first data stream, effectively reducing data processing latency. At this point, the integer d... s The numbers are 11, 12, 16, etc.

[0189] It should be understood that the first processing requires obtaining the boundary of four consecutive RS symbols in each first data stream, also known as the 4-symbol boundary. The specific method for obtaining the above 4-symbol boundary is described below. Symbol demultiplexing and alignment marker locking are performed on two first data streams from the same Ethernet service. Symbol demultiplexing demultiplexes the two first data streams from one 400GAUI-2 interface based on 2 symbols (also known as symbol pair demultiplexing), that is, each first data stream is demultiplexed based on 20 bits to distribute it into 8 demultiplexed data streams, resulting in a total of 16 demultiplexed data streams. Alignment marker locking is then performed on each of the 16 demultiplexed data streams. Alignment marker locking is also simply called alignment lock. Alignment marker locking uses the known alignment marker (AM) in the data stream for locking operations. The four 400GAUI-2 interfaces correspond to a total of 64 demultiplexed data streams. In some specific applications, the above 64 demultiplexed data streams are divided into 4 groups of data streams for alignment identification locking, that is, 16 data streams in 1 group are aligned identification locked.

[0190] Alignment flag locking can only be achieved when, in the above symbol demultiplexing, 20 bits are distributed corresponding to 2 symbols (i.e., 2 foreign code RS symbols), and the 20-bit boundary corresponds to 2 symbol boundaries. This ensures that the alignment flag is correctly locked for the 8 demultiplexed data streams obtained from one first data stream. In this case, the boundary of the 20 distributed bits is a symbol-pair boundary. Here, achieving alignment flag locking means correctly locking the alignment flag. When all 16 demultiplexed data streams corresponding to one 400GAUI-2 interface achieve alignment flag locking, the symbol-pair boundary of each first data stream is obtained. Two consecutive symbol-pair boundaries in each first data stream serve as the 4-symbol boundary of the first data stream. At this point, before the first processing, four consecutive RS symbols from four RS codewords can be obtained from each first data stream.

[0191] It should be noted that before performing the first processing on the n first data streams, offset removal can be performed on all n first data streams of Ethernet client services. This offset removal operation is performed on all n first data streams of Ethernet client services, allowing the first processing to be based on RS symbol granularity, thereby improving the overall performance of the concatenated FEC code. It should be understood that the existing offset removal technology removes the offset from the data streams of the same Ethernet client service, which results in the first processing not being based on RS symbol granularity, leading to slightly worse performance of the overall concatenated FEC code. Several possible offset removal methods are described below.

[0192] In one possible implementation, the de-offset operation employs a 10-bit de-offset, with a d-value between all the first data streams after de-offset. skew An offset of bits, where d skew It must be a multiple of 10. It should be noted that if there is no offset or a small offset between two first data streams, for example, an offset of 1 bit, 2 bits, or 5 bits, then d skew It can also be 0. Therefore, de-offset is also called 10-bit deskew or partial deskew. Furthermore, in some specific applications, the above de-offset operation ensures that there is no offset between the first data streams after de-offset from the same Ethernet client.

[0193] In another possible implementation, the de-offset operation employs a 20-bit de-offset, with a d-value between all the first data streams after de-offset. skew An offset of bits, where d skew It must be a multiple of 20. It should be noted that if there is no offset or a small offset between two first data streams, for example, an offset of 1 bit, 2 bits, or 5 bits, then d... skew It can also be 0. Therefore, de-offset is also called 20-bit deskew or partial deskew. Furthermore, in some specific applications, the above de-offset operation ensures that there is no offset between the first data streams after de-offset from the same Ethernet client.

[0194] In yet another possible implementation, the de-offset operation employs a 40-bit de-offset, with a d-value between all the first data streams after de-offset. skew An offset of bits, where d skew It must be a multiple of 40. It should be noted that if there is no offset or a small offset between two data streams, such as an offset of 1 bit, 2 bits, or 5 bits, then d... skewIt can also be 0. Therefore, de-offset is also called 40-bit de-offset (20-bit deskew) or partial de-offset. Furthermore, in some specific applications, the above de-offset operation also ensures that there is no offset between the first data streams after de-offset from the same Ethernet client.

[0195] 103. Perform a second processing step, including internal code encoding, dual-polarization symbol mapping, and framing, on the m second data streams to obtain a single dual-polarization data stream.

[0196] The following uses a second data stream as an example to illustrate the internal code encoding method. Specifically, every K information bits in the second data stream are internally encoded to generate NK check bits, thus obtaining an internal codeword consisting of N bits, where 1 < K < N. Here, the integer K ≤ 160.

[0197] In this embodiment, considering that K is a multiple of 10, the K information bits in each inner codeword correspond to K / 10 outer code RS symbols, and the corresponding K / 10 outer code RS symbols come from K / 10 outer code RS codewords. This allows the FEC concatenation scheme, which includes RS encoding and inner code encoding, to achieve optimal performance. For example, the inner code encoding uses a linear block code of N=126, K=110, such as BCH(126,110). The K=110 information bits in each inner codeword correspond to K / 10=11 RS symbols, and the corresponding K / 10=11 RS symbols come from K / 10=11 outer code RS codewords. As another example, the inner code encoding uses a linear block code of N=128, K=120. The K=120 information bits in each inner codeword correspond to K / 10=12 RS symbols, and the corresponding K / 10=12 RS symbols come from K / 10=12 different outer code RS codewords. For example, the internal code uses a linear block code with N=176 and K=160. Each internal code codeword contains K=160 information bits corresponding to K / 10=16 RS symbols, and the corresponding K / 10=16 RS symbols come from K / 10=16 different external code RS codewords.

[0198] In some specific applications, the aforementioned second processing also includes a first interleaving, used to interleave every K information bits in the second data stream to shuffle their order, thereby improving the overall burst resistance of the concatenated code. The first interleaving is also called bit shuffling or circular shift. As an example, the first interleaving is performed after internal code encoding; that is, the second data stream is first internally encoded, and then the internally encoded second data stream undergoes the first interleaving. As another example, the first interleaving is performed before internal code encoding; that is, the second data stream is first first interleaved, and then the second data stream after the first interleaving undergoes internal code encoding. As yet another example, considering that the first interleaving is only used to interleave K information bits to shuffle their order, and the parity bits do not participate in the first interleaving, the first interleaving and internal code encoding can also be processed in parallel.

[0199] In some specific applications, the second processing described above also includes a second interleaving, which is performed after the internal code encoding. The second interleaving is described in detail below. Specifically, one internal codeword is obtained from each internal code encoded data stream, resulting in a total of m internal codewords from m internal code encoded data streams, with a bit count of m×N. The second interleaving is used to shuffle the order of the m internal codewords (a total of m×N bits), thereby improving the burst resistance and colored noise resistance of the cascaded FEC scheme. The second interleaving can also be called codeword interleaving. As an example, the second interleaving here can be implemented in two steps: first, a multiplexing operation to obtain m internal codewords, and then interleaving the m internal codewords. As another example, the second interleaving here can be implemented in one step, achieving the same effect as the two-step implementation described above.

[0200] The data stream obtained after the second interleaving is subjected to dual-polarization symbol mapping and framing to obtain a first dual-polarization data stream to be transmitted. This framing can also be called DSP framing. The following description uses DP-16QAM symbol mapping as an example. For instance, dual-polarization symbol mapping is used to map every 8 bits in the second interleaved data stream to one dual-polarization 16QAM (DP-16QAM) symbol. Each DP-16QAM symbol includes one 16QAM symbol in the X-polarization direction and one 16QAM symbol in the Y-polarization direction, where the X-polarization and Y-polarization directions are orthogonal to each other. Furthermore, the 16QAM symbol in the X-polarization direction includes an in-phase component and a quadrature-phase component in the X-polarization direction, and the 16QAM symbol in the Y-polarization direction includes an in-phase component and a quadrature-phase component in the Y-polarization direction. It should be understood that dual-polarization symbol mapping is also called DP-16QAM symbol mapping, or 16QAM symbol mapping and polarization distribution. Specifically, the DP-16QAM symbol stream to be transmitted contains multiple DP-16QAM symbol sequences. DSP framing is used to insert target symbol sequences at fixed positions in each DP-16QAM symbol sequence. The DP-16QAM symbol sequence is also called a DSP frame.

[0201] The following section provides a detailed description of possible implementation methods for dual-polarization symbol mapping and DSP framing.

[0202] Figure 5(a) is a schematic diagram of one implementation of dual-polarization symbol mapping and DSP framing in this application. As shown in Figure 5(a), DSP framing is performed after DP-16QAM symbol mapping, and DSP framing is an operation performed on symbols. First, internal code encoding, first interleaving, second interleaving, and DP-16QAM symbol mapping are performed on m second data streams to obtain dual-polarization data stream A, which can also be called the pre-framing symbol stream. Then, DSP framing is performed on dual-polarization data stream A. Specifically, target symbol sequences are inserted into the symbol streams of dual-polarization data stream A in the X-polarization direction and the Y-polarization direction, respectively, to obtain the dual-polarization data stream B to be transmitted. Dual-polarization data stream B is the single dual-polarization data stream obtained after the second processing. It should be understood that the values ​​of the target symbol sequences inserted in the X-polarization direction and the target symbol sequences inserted in the Y-polarization direction may not be exactly the same. Here, they are collectively referred to as target symbol sequences without specific distinction. For example, the target symbol sequence includes at least one of the following: Frame Alignment Word Sequence (FAW Sequence), Training Symbol Sequence, Reserved Symbol Sequence, and Pilot Symbol Sequence. Optionally, reserved symbols may also be referred to as fixed stuff (FS), and frame alignment symbols may also be referred to as multi-frame alignment signal (MFAS).

[0203] In one possible scenario, the target symbol sequence is a pilot symbol sequence. In this case, the aforementioned framing (DSP framing) can be simply referred to as pilot insertion. In the X-polarization direction or the Y-polarization direction, every N... G One symbol at a fixed position among the symbols is the pilot symbol. As an example, every N... G The first symbol in the set is the pilot symbol. Typically, N G =32, 64, 96, or 128, etc. In the X-polarization or Y-polarization direction, each pilot symbol is one of 3+3j, 3-3j, -3+3j, or -3-3j. Here, j is the imaginary unit of a complex number. That is, each pilot symbol uses one of the outermost four symbols in the 16QAM constellation diagram.

[0204] In some specific applications, the DSP framing operation adds one pilot symbol to every 63 DP-16QAM symbols in every 96 × 63 = 6048 pre-framing DP-16QAM symbols, resulting in 96 × 64 = 6144 DP-16QAM symbols to be transmitted. These 6144 DP-16QAM symbols are called a DSP frame. It should be understood that, in the X-polarization direction or the Y-polarization direction, every N... G =The first symbol in the 64 symbols is the pilot symbol. The 96×63=6048 pre-framing DP-16QAM symbols are obtained by mapping 6048×8=48384 bits in the data stream obtained after the second interleaving through DP-16QAM.

[0205] Figure 5(b) is a schematic diagram of another implementation of dual-polarization symbol mapping and DSP framing in this application embodiment. As shown in Figure 5(b), DSP framing is performed before DP-16QAM symbol mapping, and DSP framing is performed on a bit-by-bit basis. Specifically, m second data streams are internally encoded, first interleaved, and second interleaved to obtain one data stream A. A target bit sequence is inserted into data stream A to obtain data stream B. DP-16QAM symbol mapping is performed on data stream B to obtain a dual-polarization data stream, which is the dual-polarization data stream obtained after the second processing. The target bit sequence is obtained by DP-16QAM symbol mapping to obtain a target symbol sequence.

[0206] Figure 5(c) is a schematic diagram of another implementation of dual-polarization symbol mapping and DSP framing in this application embodiment. As shown in Figure 5(c), DSP framing is performed before DP-16QAM symbol mapping. DSP framing is performed on bits, and the data after the second interleaving is represented by two data streams. Specifically, m second data streams are internally encoded, first interleaved, and second interleaved to obtain two data streams A. Target bit sequences X and Y are inserted into the two data streams A respectively to obtain two data streams B. DP-16QAM symbol mapping is performed on the two data streams B to obtain a dual-polarization data stream, which is one dual-polarization data stream obtained after the second processing. Specifically, the target bit sequence X is processed by DP-16QAM symbol mapping to obtain the target symbol sequence in the X polarization direction, and the target bit sequence Y is processed by DP-16QAM symbol mapping to obtain the target symbol sequence in the Y polarization direction.

[0207] Figure 5(d) is a schematic diagram of another implementation of dual-polarization symbol mapping and DSP framing in this application embodiment. As shown in Figure 5(d), DSP framing is performed before DP-16QAM symbol mapping. DSP framing is performed on a bit-by-bit basis, and the data after the second interleaving is represented by four data streams. Specifically, the m second data streams are internally encoded, first interleaved, and second interleaved to obtain four data streams A. The target bit sequence X is then inserted into each of the four data streams A. I Target bit sequence X Q Target bit sequence Y I Target bit sequence Y Q Four bit streams B are obtained. DP-16QAM symbol mapping is performed on the four data streams B to obtain the first dual-polarization data stream. The target bit sequence X is... I After DP-16QAM symbol mapping, the I component of the target symbol sequence in the X polarization direction is obtained, and the target bit sequence X is obtained. Q After DP-16QAM symbol mapping, the Q component of the target symbol sequence in the X-polarization direction is obtained, and the target bit sequence Y is obtained. I After DP-16QAM symbol mapping, the I component of the target symbol sequence in the Y polarization direction is obtained, and the target bit sequence Y... Q The Q component of the target symbol sequence in the Y polarization direction is obtained by DP-16QAM symbol mapping.

[0208] It should be noted that in some specific scenarios, the dual-polarization data stream obtained after the second processing is described using two symbol streams: one is the symbol stream of the dual-polarization data stream in the X-polarization direction, and the other is the symbol stream of the dual-polarization data stream in the Y-polarization direction. In other specific scenarios, the dual-polarization data stream obtained after the second processing is described using four data streams: the first is the data stream of the I-path component in the X-polarization direction corresponding to the dual-polarization data stream (referred to as X...). I The second data stream is the Q-path component data stream in the X-polarization direction corresponding to the dual-polarization data stream (abbreviated as X). Q The third data stream is the data stream of the I-path component in the Y-polarization direction corresponding to the dual-polarization data stream (abbreviated as Y). I The fourth data stream is the Q-path component data stream in the Y-polarization direction corresponding to the dual-polarization data stream (abbreviated as Y). Q (Data flow).

[0209] It should be noted that, considering that m can have multiple values, and that the first processing can adopt multiple methods such as "performing only replacement," "performing replacement first and then distributing," and "distributing first and then replacing," this application provides multiple possible implementation methods for the "first processing," which will be described below. The first processing will be specifically described below using the 1.6T transmission scenario of the above four 400G Ethernet clients as an example. For example, for n=8 first data streams, denoted as first data stream 0 to first data stream 7. First data stream 0 and first data stream 1 carry data from 400GE client 0, first data stream 2 and first data stream 3 carry data from 400GE client 1, first data stream 4 and first data stream 5 carry data from 400GE client 2, and first data stream 6 and first data stream 7 carry data from 400GE client 3. Any symbol in any one of the first data streams 0 and 1, any symbol in any one of the first data streams 2 and 3, any symbol in any one of the first data streams 4 and 5, and any symbol in any one of the first data streams 6 and 7 are derived from four RS codewords.

[0210] In a first aspect, embodiments of this application consider a first process that obtains consecutive d from each first data stream. m =16 RS symbols are processed.

[0211] 1) Considering the case where n = m = 8, the first treatment adopts the method of "only performing substitution".

[0212] The first process obtains consecutive d values ​​from each first data stream. m = 16 RS symbols, resulting in 8 rows and 16 columns, totaling 128 RS symbols. Then, permutation is performed to shuffle the order, resulting in 8 rows and 16 columns, totaling 128 RS symbols.

[0213] The above permutation operation is performed across 8 data streams, also known as lane permutation. That is, the 8 first data streams are permuted to obtain m = 8 second data streams, with each second data stream containing consecutive d... s =16 RS symbols from d s = 16 RS codewords, with each second data stream containing 16 consecutive RS symbols derived from 4 first data streams. That is, the 16 consecutive RS symbols from each of the 4 first data streams constitute a single second data stream containing 16 consecutive RS symbols. This permutation can also be called interleaving.

[0214] The above substitution operation satisfies the following first constraint:

[0215] Before the permutation, the 128 RS symbols are distributed in 8 rows and 16 columns. The 16 RS symbols in the i-th row (0≤i≤7) come from the 16 consecutive RS symbols in the first data stream i. After the permutation, the 128 RS symbols are distributed in 8 rows and 16 columns.

[0216] The 32 RS symbols in columns 0, 1, 2, and 3 of the 128 RS symbols after the permutation are derived from the 32 RS symbols in columns 0, 1, 2, and 3 of the 128 RS symbols before the permutation.

[0217] The 32 RS symbols in columns 4, 5, 6, and 7 of the 128 RS symbols after the permutation are derived from the 32 RS symbols in columns 4, 5, 6, and 7 of the 128 RS symbols before the permutation.

[0218] The 32 RS symbols in columns 8, 9, 10, and 11 of the 128 RS symbols after the permutation are derived from the 32 RS symbols in columns 8, 9, 10, and 11 of the 128 RS symbols before the permutation.

[0219] The 32 RS symbols in columns 12, 13, 14, and 15 of the 128 RS symbols after the permutation are derived from the 32 RS symbols in columns 12, 13, 14, and 15 of the 128 RS symbols before the permutation.

[0220] The 16 RS symbols in any row of the 128 RS symbols after the permutation are derived from the 4 RS symbols in row i0, row i1, row i2, and row i3 of the 128 RS symbols before the permutation, and i0 = 0 or 1, i1 = 2 or 3, i2 = 4 or 5, and i3 = 6 or 7.

[0221] In some specific applications, the above substitution operation also satisfies the following second constraint:

[0222] The 8 RS symbols in the j-th column (0≤j≤15) of the 128 RS symbols after the permutation are derived from the 8 RS symbols in the j-th column of the 128 RS symbols before the permutation.

[0223] In other specific applications, the above substitution operation also satisfies the following third constraint:

[0224] The 16 RS symbols in any row of the 128 RS symbols after the permutation are derived from the 4 consecutive RS symbols in row i0, row i1, row i2, and row i3 of the 128 RS symbols before the permutation, for a total of 16 RS symbols.

[0225] In some specific applications, the above substitution operation also satisfies the following fourth constraint:

[0226] The RS symbol in the i-th (0≤i≤7) row and j0 (0≤j0≤3) column of the 128 RS symbols after the permutation comes from the RS symbol in the i-th row and j0 column of the 128 RS symbols before the permutation, that is, the first 4 columns of symbols remain unchanged.

[0227] Figures 6(a) to 6(d) below illustrate several specific implementations of the permutation. In Figures 6(a) to 6(d), the 128 RS symbols before the permutation are represented by 128 boxes marked with numbers, ranging from 0 to 127. The permutation changes the position of some RS symbols, which is equivalent to changing the position of some of the boxes marked with numbers. Therefore, by comparing the 128 RS symbols before and after the permutation, boxes marked with the same number represent the same RS symbols. The specific permutation method can be seen from the changes in the position of the boxes marked with numbers in Figures 6(a) to 6(d).

[0228] Figure 6(a) is a schematic diagram of one implementation of the permutation in this application. As shown in Figure 6(a), taking the numbers marked by the 16 consecutive RS symbols in the data stream 0 before permutation as 0, 8, 16, 24, 32, 40, 48, 56, 64, 72, 80, 88, 96, 104, 112, 120 as an example, the numbers marked by the 16 consecutive RS symbols in the data stream 0 after permutation are 0, 8, 16, 24, 38, 46, 54, 62, 68, 76, 84, 92, 98, 106, 114, 122. That is to say, the 16 consecutive RS symbols in the data stream 0 after permutation come from the 4 consecutive RS symbols in the data stream 0 before permutation, the 4 consecutive RS symbols in the data stream 6, the 4 consecutive RS symbols in the data stream 4, and the 4 consecutive RS symbols in the data stream 2, totaling 16 RS symbols. It can be seen that the 16 consecutive RS symbols in the data stream 0 after permutation come from 16 RS codewords. The following section will use data stream 0 as an example to introduce the specific method of permutation in another way.

[0229] The RS symbol in row 0 and column 0 of the 128 RS symbols after the permutation comes from the RS symbol in row 0 and column 0 of the 128 RS symbols before the permutation;

[0230] The RS symbol in row 0 and column 1 of the 128 RS symbols after the permutation comes from the RS symbol in row 0 and column 1 of the 128 RS symbols before the permutation;

[0231] The RS symbol in row 0 and column 2 of the 128 RS symbols after the permutation comes from the RS symbol in row 0 and column 2 of the 128 RS symbols before the permutation;

[0232] The RS symbol in row 0 and column 3 of the 128 RS symbols after the permutation comes from the RS symbol in row 0 and column 3 of the 128 RS symbols before the permutation;

[0233] The RS symbol in row 0 and column 4 of the 128 RS symbols after the permutation comes from the RS symbol in row 6 and column 4 of the 128 RS symbols before the permutation;

[0234] The RS symbol in row 0 and column 5 of the 128 RS symbols after the permutation comes from the RS symbol in row 6 and column 5 of the 128 RS symbols before the permutation;

[0235] The RS symbol in row 0 and column 6 of the 128 RS symbols after the permutation comes from the RS symbol in row 6 and column 6 of the 128 RS symbols before the permutation;

[0236] The RS symbol in row 0 and column 7 of the 128 RS symbols after the permutation comes from the RS symbol in row 6 and column 7 of the 128 RS symbols before the permutation;

[0237] The RS symbol in row 0 and column 8 of the 128 RS symbols after the permutation comes from the RS symbol in row 4 and column 8 of the 128 RS symbols before the permutation;

[0238] The RS symbol in row 0 and column 9 of the 128 RS symbols after the permutation comes from the RS symbol in row 4 and column 9 of the 128 RS symbols before the permutation;

[0239] The RS symbol in row 0 and column 10 of the 128 RS symbols after the permutation comes from the RS symbol in row 4 and column 10 of the 128 RS symbols before the permutation;

[0240] The RS symbol in row 0 and column 11 of the 128 RS symbols after the permutation comes from the RS symbol in row 4 and column 11 of the 128 RS symbols before the permutation;

[0241] The RS symbol in row 0 and column 12 of the 128 RS symbols after the permutation comes from the RS symbol in row 2 and column 12 of the 128 RS symbols before the permutation;

[0242] The RS symbol in row 0 and column 13 of the 128 RS symbols after the permutation comes from the RS symbol in row 2 and column 13 of the 128 RS symbols before the permutation;

[0243] The RS symbol in row 0 and column 14 of the 128 RS symbols after the permutation comes from the RS symbol in row 2 and column 14 of the 128 RS symbols before the permutation;

[0244] The RS symbol in row 0, column 15 of the 128 RS symbols after the permutation comes from the RS symbol in row 2, column 15 of the 128 RS symbols before the permutation.

[0245] It should be understood that the above describes the specific method of replacement using data stream 0 before and after replacement as an example. Similarly, the replacement methods corresponding to data streams 0 to 7 can also be derived with reference to Figure 6(a), and will not be described in detail here.

[0246] Figure 6(b) is a schematic diagram of another embodiment of the substitution in this application. Figure 6(c) is a schematic diagram of another embodiment of the substitution in this application. As shown in Figures 6(b) and 6(c), two other substitution methods different from those shown in Figure 6(a) are provided. The specific methods can be understood in conjunction with the above description of Figure 6(a), and will not be repeated here.

[0247] Figure 6(d) is a schematic diagram of another implementation of the permutation in this application. As shown in Figure 6(d), in some possible scenarios, the above permutation operation can also be performed in two steps, referred to as the first permutation and the second permutation, respectively. The first permutation shuffles the RS symbols in data streams 0-3 and 4-7, that is, the first permutation is performed across 4 data streams. At this time, after the first permutation, each data stream has 8 consecutive RS symbols from 8 RS codewords. The second permutation then shuffles the 128 symbols after the first permutation, and the second permutation is performed across 8 data streams. At this time, each second data stream has 16 consecutive RS symbols from 16 RS codewords. The arrangement of the 128 symbols after the second permutation is the same as the arrangement of the 128 symbols after the permutation shown in Figure 6(c).

[0248] 2) Consider m = n × p, n = 8, and p is an integer greater than 1. The first processing adopts the method of "performing a substitution first, and then distributing".

[0249] The first process obtains consecutive d values ​​from each first data stream. m = 16 RS symbols, resulting in 8 rows and 16 columns, totaling 128 RS symbols. These are then permuted to shuffle the order, resulting in 8 rows and 16 columns, totaling 128 RS symbols. Here, the specific permutation method is the same as the permutation method in the first process of "permutation only" mentioned above. For details, please refer to the relevant descriptions above and refer to Figures 6(a) to 6(d) for understanding. It will not be repeated here.

[0250] Figure 7 is a schematic diagram of one implementation method of permutation followed by distribution in this application. As shown in Figure 7, 8 first data streams are permuted to obtain 8 permuted data streams, and each permuted data stream contains 16 consecutive RS symbols derived from 16 RS codewords. Each permuted data stream is then distributed to obtain p second data streams. Therefore, the above 8 permuted data streams, after distribution, yield a total of m = 8 × p second data streams.

[0251] In some specific applications, the above distribution uses a round-robin method, distributing each permuted data stream in granularity of 16 RS symbols (i.e., 160 bits) to obtain p second data streams, resulting in a total of m = 8 × p second data streams. In this case, each second data stream contains consecutive d... s =16 RS symbols respectively from d s = 16 RS codewords. When m = 16, the above distribution adopts a round-robin method, distributing each permuted data stream with a granularity of 16 RS symbols to obtain p = 2 second data streams, resulting in a total of m = 8 × p = 16 second data streams. When m = 32, the above distribution adopts a round-robin method, distributing each permuted data stream with a granularity of 16 RS symbols to obtain p = 4 second data streams, resulting in a total of m = 8 × p = 32 second data streams. When m = 64, the above distribution adopts a round-robin method, distributing each permuted data stream with a granularity of 16 RS symbols to obtain p = 8 second data streams, resulting in a total of m = 8 × p = 64 second data streams.

[0252] In other specific applications, the above distribution uses a round-robin method, distributing each permuted data stream in granularity of K bits (corresponding to K / 10 RS symbols) to obtain p second data streams, resulting in a total of m = 8 × p second data streams, where K is the length of information bits in the internal code encoding of the second processing, and the integer K ≤ 160. In this case, each second data stream contains consecutive d... s =K / 10 RS symbols from d s = K / 10 RS codewords, for example, when K=110, each second data stream contains consecutive d... s =11 RS symbols from d s= 11 RS codewords. When m = 16, the above distribution adopts a polling method, distributing each permuted data stream in units of K / 10 RS symbols to obtain p = 2 second data streams, resulting in a total of m = 8×p = 16 second data streams. When m = 32, the above distribution adopts a polling method, distributing each permuted data stream in units of K / 10 RS symbols to obtain p = 4 second data streams, resulting in a total of m = 8×p = 32 second data streams. When m = 64, the above distribution adopts a polling method, distributing each permuted data stream in units of K / 10 RS symbols to obtain p = 8 second data streams, resulting in a total of m = 8×p = 64 second data streams.

[0253] 3) Considering m = n×p, n = 8, and p is an integer greater than 1, the first process adopts the method of "first distributing and then permuting".

[0254] FIG. 8 is a schematic diagram of an implementation method of first distributing and then permuting in an embodiment of the present application. As shown in FIG. 8, each of the 8 first data streams adopts a polling method, distributing each first data stream in units of an integer multiple of 4 RS symbols (i.e., an integer multiple of 40 bits) to obtain p distributed data streams, resulting in a total of m = 8×p distributed data streams. Each consecutive 4 RS symbols in each distributed data stream come from 4 RS codewords. 16 consecutive RS symbols are obtained from each distributed data stream to obtain a total of 16m RS symbols in m rows and 16 columns, and permutation is performed to disrupt the order to obtain a total of 16m RS symbols in m rows and 16 columns. Among them, "16m RS symbols" can also be written as "16×m RS symbols". For example, when m = 16, 16m RS symbols are 16×16 = 256 RS symbols. The above m distributed data streams are permuted to obtain m second data streams. Each consecutive 16 RS symbols in each second data stream come from 16 RS codewords, and each consecutive 16 RS symbols in each second data stream come from 4 distributed data streams.

[0255] The above permutation operation satisfies the following fifth constraint:

[0256] Before permutation, the 16m RS symbols are distributed in m rows and 16 columns. The 16 RS symbols in the i-th (0≤i<m) row come from the distributed data stream i; after permutation, the 16m RS symbols are distributed in m rows and 16 columns.

[0257] Among the 16m RS symbols after permutation, the 4m RS symbols in the 0th, 1st, 2nd, and 3rd columns come from the 4m RS symbols in the 0th, 1st, 2nd, and 3rd columns of the 16m RS symbols before permutation.

[0258] The 4m RS symbols in columns 4, 5, 6, and 7 of the 16m RS symbols after the permutation are derived from the 4m RS symbols in columns 4, 5, 6, and 7 of the 16m RS symbols before the permutation.

[0259] The 4m RS symbols in columns 8, 9, 10, and 11 of the 16m RS symbols after the permutation are derived from the 4m RS symbols in columns 8, 9, 10, and 11 of the 16m RS symbols before the permutation.

[0260] The 4m RS symbols in columns 12, 13, 14, and 15 of the 16m RS symbols after the permutation are derived from the 4m RS symbols in columns 12, 13, 14, and 15 of the 16m RS symbols before the permutation.

[0261] The 16 RS symbols in any row of the 16m RS symbols after the permutation are derived from the 4 RS symbols in the i0th row, the i1th row, the i2th row, and the i3th row of the original 16m RS symbols, totaling 16 RS symbols. i0 is an integer from 0 to (m / 4-1), i1 is an integer from m / 4 to (m / 2-1), i2 is an integer from m / 2 to (3m / 4-1), and i3 is an integer from 3m / 4 to (m-1), where m is a positive multiple of 4. For example, if n=8, the constraints could be: i0 is an integer from 0 to (2p-1), i1 is an integer from 2p to (4p-1), i2 is an integer from 4p to (6p-1), and i3 is an integer from 6p to (m-1).

[0262] In some specific applications, the above substitution operation also satisfies the following sixth constraint:

[0263] The m RS symbols in the j-th column (0≤j≤15) of the 16m RS symbols after the permutation are derived from the m RS symbols in the j-th column of the 16m RS symbols before the permutation.

[0264] In other specific applications, the above substitution operation also satisfies the following seventh constraint:

[0265] The 16 RS symbols in any row of the 16m RS symbols after the permutation are derived from the 4 consecutive RS symbols in the i0th row, the 4 consecutive RS symbols in the i1th row, the 4 consecutive RS symbols in the i2th row, and the 4 consecutive RS symbols in the i3th row of the 16m RS symbols before the permutation, for a total of 16 symbols.

[0266] In some specific applications, the above permutation operation also satisfies the following eighth constraint:

[0267] The RS symbol in the \(i\) -th row (\(0\leq i\lt m\)) and \(j_0\) -th column (\(0\leq j_0\leq3\)) of the 16m RS symbols after permutation comes from the RS symbol in the \(i\) -th row and \(j_0\) -th column of the 16m RS symbols before permutation, that is, the symbols in the first 4 columns remain unchanged.

[0268] The following FIGS. 9(a) to 9(d) provide several specific implementation manners of the permutation. In FIGS. 9(a) to 9(d), the total of 16m RS symbols in \(m\) rows and 16 columns before permutation are divided into 16 boxes, which are respectively labeled as A0, A1, A2, A3, B0, B1, B2, B3, C0, C1, C2, C3, D0, D1, D2, D3. Each box contains a total of \(m\) RS symbols in \(2p\) rows and 4 columns. The 4 RS symbols in any one row of each box respectively come from 4 RS codewords. By permutation, the positions of some RS symbols are changed, which is equivalent to changing the positions of some marked boxes. Therefore, by comparing the 16m RS symbols before and after permutation, the boxes with the same label represent the same \(m\) RS symbols and have the same distribution manner. The specific manner of permutation can be seen from the position changes of the boxes in FIGS. 9(a) to 9(d).

[0269] FIG. 9(a) is a schematic diagram of another implementation manner of the permutation in an embodiment of the present application. As shown in FIG. 9(a), the 16 RS symbols in each row before permutation come from the same distributed data stream. For example, the total of 16 RS symbols in the 0 -th row of A0, A1, A2, A3 come from the distributed data stream 0, and the total of 16 RS symbols in the \((2p - 1)\) -th row of D0, D1, D2, D3 come from the distributed data stream \(m - 1\). As an example, the 4m RS symbols in the data streams 0 to \((2p - 1)\) after permutation respectively come from \(m\) symbols in the data streams 0 to \((2p - 1)\) before permutation, \(m\) symbols in the data streams \(6p\) to \((m - 1)\) before permutation, \(m\) symbols in the data streams \(4p\) to \((6p - 1)\) before permutation, and \(m\) symbols in the data streams \(2p\) to \((4p - 1)\) before permutation, that is, it reflects the positions before permutation corresponding to the 4 boxes A0, D1, C2, D3 after permutation. It can be seen that any one of the data streams 0 to \((2p - 1)\) after permutation contains consecutive \(d\) s = 16 RS symbols which respectively come from \(d\) s = 16 RS codewords.

[0270] It should be understood that the above takes the data streams 0 to \((2p - 1)\) before and after permutation as an example to introduce the specific manner of permutation. In a similar manner, the corresponding permutation manners of the data streams \(2p\) to \(m - 1\) can also be obtained by referring to FIG. 9(a), and will not be elaborated here one by one.

[0271] Figure 9(b) is a schematic diagram of another embodiment of the substitution in this application. Figure 9(c) is a schematic diagram of another embodiment of the substitution in this application. As shown in Figures 9(b) and 9(c), two other substitution methods different from those shown in Figure 9(a) are provided. The specific methods can be understood in conjunction with the above description of Figure 9(a), and will not be repeated here.

[0272] Figure 9(d) is a schematic diagram of another implementation of the permutation in this application. As shown in Figure 9(d), in some possible scenarios, the above permutation operation can also be performed in two steps, referred to as the first permutation and the second permutation, respectively. The first permutation shuffles the RS symbols in data stream 0 to data stream (4p-1) and the RS symbols in data stream 4p to data stream (m-1), that is, the first permutation is performed across 4p data streams. At this time, in each data stream after the first permutation, the 8 consecutive RS symbols come from 8 RS codewords. The second permutation then shuffles the 16m symbols after the first permutation, and the second permutation is performed across m data streams. At this time, in each second data stream after the second permutation, the 16 consecutive RS symbols come from 16 RS codewords. The arrangement of the 16m symbols after the second permutation is the same as the arrangement of the 16m symbols after the permutation shown in Figure 9(c).

[0273] The following describes several specific embodiments of the first and second processes in conjunction with the above descriptions.

[0274] Example 1: m = 8.

[0275] Figure 10 is a schematic diagram of one implementation of the data processing method in this application. This embodiment is geared towards a 1.6T coherent transmission scenario, considering four 400G Ethernet clients: 400GE client 0, 400GE client 1, 400GE client 2, and 400GE client 3. As shown in Figure 10, each 400GE client corresponds to one 400G AUI-2 interface containing two signal streams, and the four 400G AUI-2 interfaces contain a total of eight signal streams. The nominal rate of each signal stream is 212.5Gb / s. The above eight signal streams are PAM4 decoded (demodulated) to obtain eight first data streams, also known as eight demodulated data streams.

[0276] Symbol demultiplexing and alignment locking are performed on the two first data streams corresponding to one 400GE customer to obtain 16 data streams locked with alignment identifiers. The symbol boundaries, symbol pair boundaries, and 4-symbol boundaries within these data streams are also obtained. Offset removal is performed on the eight first data streams corresponding to four 400GE customers, ensuring that the offset between any two data streams in the eight de-offset data streams is 0 or d. skew bits, of which d skew It is a positive integer. In some specific applications, the above de-offset is a partial de-offset, d skew It is a multiple of 10. In some other specific applications, the above de-offset is a partial de-offset, d skew It is a multiple of 20. In some specific applications, the above de-offset is a partial de-offset, d skew It must be a multiple of 40. Furthermore, in some specific applications, for the same 400GE customer, de-offset data streams 0 and 1 have no offset (i.e., the offset is 0); de-offset data streams 2 and 3 have no offset (i.e., the offset is 0); de-offset data streams 4 and 5 have no offset (i.e., the offset is 0); and de-offset data streams 6 and 7 have no offset (i.e., the offset is 0).

[0277] The aforementioned eight first data streams undergo a first processing step to obtain m = eight second data streams, such that each second data stream contains 16 consecutive RS symbols derived from 16 RS codewords, and each second data stream contains 16 consecutive RS symbols derived from four first data streams. The first processing step can be implemented as shown in Figures 6(a), 6(b), 6(c), or 6(d). This embodiment uses the implementation shown in Figure 6(c) as an example, where the first processing step includes one permutation process. The first processing step obtains 16 consecutive RS symbols from each of the eight first data streams, resulting in a total of 128 RS symbols. The permutation shuffles these 128 RS symbols, ensuring that each data stream after the permutation contains 16 consecutive RS symbols derived from 16 RS codewords. This permutation is performed across eight data streams and is also known as channel permutation.

[0278] The aforementioned eight second data streams are respectively processed through internal code encoding and first interleaving to obtain eight internal code encoded and first interleaved data streams. The internal code encoding uses BCH(126,110), and the first interleaving cyclically shifts the 110 information bits in each internal codeword (i.e., BCH codeword). It should be understood that each internal codeword's 110 information bits correspond to 11 RS symbols, and these 11 RS symbols originate from 11 RS codewords.

[0279] The data stream encoded by the above 8 internal codes and after the first interleaving undergoes a second interleaving, dual-polarization 16QAM symbol mapping, and framing to obtain a dual-polarization data stream to be transmitted. The second interleaving interleaves 126 codeword bits of each internal codeword to further improve the burst error resistance of the cascaded FEC scheme.

[0280] The specific data processing method given in this embodiment does not use a convolutional interleaver. The cascaded FEC scheme has strong decoding performance and low latency, and can be applied to many coherent transmission scenarios, especially coherent transmission scenarios that are sensitive to latency requirements.

[0281] Example 2: m = 16.

[0282] Figure 11 is a schematic diagram of another implementation of the data processing method in this application. As shown in Figure 11, based on Embodiment 1, the first processing considers processing the input n=8 first data streams to obtain a total of m=16 output data streams, where each second data stream contains 16 consecutive RS symbols from 16 RS codewords, and each second data stream contains 16 consecutive RS symbols from 4 first data streams. The specific processing of the above first processing can be implemented as shown in Figure 7. The first processing includes a permutation process and a distribution process. The permutation process can be understood with reference to Embodiment 1. The distribution process distributes each permuted data stream with a granularity of 16 RS symbols to obtain 2 second data streams, resulting in a total of 32 second data streams.

[0283] The aforementioned 32 second data streams are respectively processed through internal code encoding and first interleaving to obtain 32 internal code encoded and first interleaved data streams. The internal code encoding uses BCH(126,110), and the first interleaving cyclically shifts the 110 information bits in each internal codeword (i.e., BCH codeword). It should be understood that each internal codeword's 110 information bits correspond to 11 RS symbols, and these 11 RS symbols originate from 11 RS codewords.

[0284] The aforementioned 32 internal code codes and the data stream after the first interleaving undergo a second interleaving, dual-polarization 16QAM symbol mapping, and framing to obtain a dual-polarization data stream to be transmitted. The second interleaving interleaves 126 codeword bits of each internal codeword to further enhance the burst error resistance of the cascaded FEC scheme.

[0285] The specific data processing method given in this embodiment does not use a convolutional interleaver. The cascaded FEC scheme has strong decoding performance and low latency, and can be applied to many coherent transmission scenarios, especially coherent transmission scenarios that are sensitive to latency requirements.

[0286] It should be noted that in some specific applications, the distribution process distributes each permuted data stream into two second data streams with a granularity of 11 RS symbols, resulting in a total of 16 second data streams. In this case, each of the m=16 second data streams contains 11 consecutive RS symbols from 11 RS codewords, and each second data stream contains 11 consecutive RS symbols from at least two first data streams.

[0287] Example 3: m = 32.

[0288] Figure 12 is a schematic diagram of another implementation of the data processing method in this application. As shown in Figure 12, based on Embodiment 1, the first processing considers processing the input n=8 first data streams to obtain a total of m=32 output data streams. In each second data stream, 16 consecutive RS symbols come from 16 RS codewords, and each second data stream contains 16 consecutive RS symbols from 4 first data streams. The specific implementation of the first processing can be shown in Figure 7. The first processing includes a permutation process and a distribution process. The permutation process can be understood with reference to Embodiment 1. The distribution process distributes each permuted data stream at a granularity of 16 RS symbols to obtain 4 second data streams, resulting in a total of 32 second data streams.

[0289] The aforementioned 32 second data streams are respectively processed through internal code encoding and first interleaving to obtain 32 internal code encoded and first interleaved data streams. The internal code encoding uses BCH(126,110), and the first interleaving cyclically shifts the 110 information bits in each internal codeword (i.e., BCH codeword). It should be understood that each internal codeword's 110 information bits correspond to 11 RS symbols, and these 11 RS symbols originate from 11 RS codewords.

[0290] The aforementioned 32 internal code codes and the data stream after the first interleaving undergo a second interleaving, dual-polarization 16QAM symbol mapping, and framing to obtain a dual-polarization data stream to be transmitted. The second interleaving interleaves 126 codeword bits of each internal codeword to further enhance the burst error resistance of the cascaded FEC scheme.

[0291] The specific data processing method given in this embodiment does not use a convolutional interleaver. The cascaded FEC scheme has strong decoding performance and low latency, and can be applied to many coherent transmission scenarios, especially coherent transmission scenarios that are sensitive to latency requirements.

[0292] It should be noted that in some specific applications, the distribution process distributes each permuted data stream into four second data streams with a granularity of 11 RS symbols, resulting in a total of 32 second data streams. In this case, each of the m=32 second data streams contains 11 consecutive RS symbols from 11 RS codewords, and each second data stream contains 11 consecutive RS symbols from at least two first data streams.

[0293] Example 4: m = 64.

[0294] Figure 13 is a schematic diagram of another implementation of the data processing method in this application. As shown in Figure 13, based on Embodiment 1, the first processing processes the input n = 8 first data streams to obtain a total of m = 64 second data streams. Each second data stream contains 16 consecutive RS symbols from 16 RS codewords, and each second data stream contains 16 consecutive RS symbols from 4 first data streams. The specific implementation of the first processing can be shown in Figure 7. The first processing includes a permutation process and a distribution process. The permutation process can be understood with reference to Embodiment 1. The distribution process distributes each permuted data stream at a granularity of 16 RS symbols to obtain 8 second data streams, resulting in a total of 64 second data streams.

[0295] The aforementioned 64 second data streams are respectively processed through internal code encoding and first interleaving to obtain 64 internal code encoded and first interleaved data streams. The internal code encoding uses BCH(126,110), and the first interleaving cyclically shifts the 110 information bits in each internal codeword (i.e., BCH codeword). It should be understood that each internal codeword's 110 information bits correspond to 11 RS symbols, and these 11 RS symbols come from 11 RS codewords.

[0296] The aforementioned 64 internal code codes and the data stream after the first interleaving undergo a second interleaving, dual-polarization 16QAM symbol mapping, and framing to obtain a dual-polarization data stream to be transmitted. The second interleaving interleaves 126 codeword bits of each internal codeword to further enhance the burst error resistance of the cascaded FEC scheme.

[0297] The specific data processing method given in this embodiment does not use a convolutional interleaver. The cascaded FEC scheme has strong decoding performance and low latency, and can be applied to many coherent transmission scenarios, especially coherent transmission scenarios that are sensitive to latency requirements.

[0298] It should be noted that in some specific applications, the distribution process distributes each permuted data stream into 8 second data streams with a granularity of 11 RS symbols, resulting in a total of 64 second data streams. In this case, each of the 64 second data streams contains 11 consecutive RS symbols from 11 RS codewords, and each second data stream contains 11 consecutive RS symbols from at least 2 first data streams.

[0299] Secondly, embodiments of this application consider the first process of obtaining consecutive d from each first data stream. m =12 RS symbols are processed.

[0300] 1) Considering the case where n = m = 8, the first treatment adopts the method of "only performing substitution".

[0301] The first process obtains consecutive d values ​​from each first data stream. m = 12 RS symbols, resulting in 8 rows and 12 columns, totaling 96 RS symbols. Then, permutation is performed to shuffle the order, resulting in 8 rows and 12 columns, totaling 96 RS symbols.

[0302] The above permutation operation is performed across 8 data streams, also known as lane permutation. That is, the 8 first data streams are permuted to obtain m = 8 second data streams, with each second data stream containing consecutive d... s =12 RS symbols from d s = 12 RS codewords, with 12 consecutive RS symbols in each second data stream coming from 3 first data streams. That is, 4 consecutive RS symbols from each of the 3 first data streams, totaling 12 RS symbols, constitute 12 consecutive RS symbols in a second data stream. The above permutation can also be called interleaving.

[0303] The above permutation operation satisfies the following ninth constraint:

[0304] Before the permutation, the 96 RS symbols are distributed in 8 rows and 12 columns. The 12 RS symbols in the i-th row (0≤i≤7) come from the 12 consecutive RS symbols in the first data stream i. After the permutation, the 96 RS symbols are distributed in 8 rows and 12 columns.

[0305] The 32 RS symbols in columns 0, 1, 2, and 3 of the 96 RS symbols after the permutation are derived from the 32 RS symbols in columns 0, 1, 2, and 3 of the 96 RS symbols before the permutation.

[0306] The 32 RS symbols in columns 4, 5, 6, and 7 of the 96 RS symbols after the permutation are derived from the 32 RS symbols in columns 4, 5, 6, and 7 of the 96 RS symbols before the permutation.

[0307] The 32 RS symbols in columns 8, 9, 10, and 11 of the 96 RS symbols after the permutation are derived from the 32 RS symbols in columns 8, 9, 10, and 11 of the 96 RS symbols before the permutation.

[0308] The 12 RS symbols in any row of the 96 RS symbols after the permutation are derived from the 4 RS symbols in row i0, the 4 RS symbols in row i1, and the 4 RS symbols in row i2 of the 96 RS symbols before the permutation, for a total of 12 RS symbols. And i0, i1, and i2 are one of the following combinations of values: (1) i0 = 0 or 1, i1 = 2 or 3, i2 = 4 or 5; (2) i0 = 0 or 1, i1 = 2 or 3, i2 = 6 or 7; (3) i0 = 0 or 1, i1 = 4 or 5, i2 = 6 or 7; (4) i0 = 2 or 3, i1 = 4 or 5, i2 = 6 or 7.

[0309] In some specific applications, the above substitution operation also satisfies the following tenth constraint:

[0310] The 8 RS symbols in the j-th column (0≤j≤11) of the 96 RS symbols after the permutation are derived from the 8 RS symbols in the j-th column of the 96 RS symbols before the permutation.

[0311] In other specific applications, the above substitution operation also satisfies the following eleventh constraint:

[0312] The 12 RS symbols in any row of the 96 RS symbols after the permutation are derived from the 4 consecutive RS symbols in row i0, row i1, and row i2 of the 96 RS symbols before the permutation, for a total of 12 RS symbols.

[0313] In some specific applications, the above permutation operation also satisfies the following twelfth constraint:

[0314] The RS symbol in the i-th (0≤i≤7) row and j0 (0≤j0≤3) column of the 96 RS symbols after the permutation comes from the RS symbol in the i-th row and j0 column of the 96 RS symbols before the permutation, that is, the first 4 columns of symbols remain unchanged.

[0315] Figures 14(a) to 14(d) below illustrate several specific implementations of the permutation. In Figures 14(a) to 14(d), the 96 RS symbols before the permutation are represented by 96 boxes marked with numbers, ranging from 0 to 95. The permutation changes the position of some RS symbols, which is equivalent to changing the position of some of the boxes marked with numbers. Therefore, by comparing the 96 RS symbols before and after the permutation, boxes marked with the same number represent the same RS symbols. The specific permutation method can be seen from the changes in the position of the boxes marked with numbers in Figures 14(a) to 14(d).

[0316] Figure 14(a) is a schematic diagram of another implementation of the permutation in this application. As shown in Figure 14(a), taking the numbers marked by the 12 consecutive RS symbols in data stream 0 before permutation as 0, 8, 16, 24, 32, 40, 48, 56, 64, 72, 80, 88, the numbers marked by the 12 consecutive RS symbols in data stream 0 after permutation are 0, 8, 16, 24, 38, 46, 54, 62, 68, 76, 84, 92. That is to say, the 12 consecutive RS symbols in data stream 0 after permutation come from the 4 consecutive RS symbols in data stream 0 before permutation, the 4 consecutive RS symbols in data stream 6, and the 4 consecutive RS symbols in data stream 4, a total of 12 RS symbols. It can be seen that the 12 consecutive RS symbols in data stream 0 after permutation come from 12 RS codewords. The specific method of permutation will be introduced below using data stream 0 as an example in another way.

[0317] The RS symbol in row 0 and column 0 of the 96 RS symbols after the permutation comes from the RS symbol in row 0 and column 0 of the 96 RS symbols before the permutation;

[0318] The RS symbol in row 0 and column 1 of the 96 RS symbols after the permutation comes from the RS symbol in row 0 and column 1 of the 96 RS symbols before the permutation;

[0319] The RS symbol in row 0 and column 2 of the 96 RS symbols after the permutation comes from the RS symbol in row 0 and column 2 of the 96 RS symbols before the permutation;

[0320] The RS symbol in row 0 and column 3 of the 96 RS symbols after the permutation comes from the RS symbol in row 0 and column 3 of the 96 RS symbols before the permutation;

[0321] The RS symbol in row 0 and column 4 of the 96 RS symbols after the permutation comes from the RS symbol in row 6 and column 4 of the 96 RS symbols before the permutation;

[0322] The RS symbol in row 0 and column 5 of the 96 RS symbols after the permutation comes from the RS symbol in row 6 and column 5 of the 96 RS symbols before the permutation;

[0323] The RS symbol in row 0 and column 6 of the 96 RS symbols after the permutation comes from the RS symbol in row 6 and column 6 of the 96 RS symbols before the permutation;

[0324] The RS symbol in row 0 and column 7 of the 96 RS symbols after the permutation comes from the RS symbol in row 6 and column 7 of the 96 RS symbols before the permutation;

[0325] The RS symbol in row 0 and column 8 of the 96 RS symbols after the permutation comes from the RS symbol in row 4 and column 8 of the 96 RS symbols before the permutation;

[0326] The RS symbol in row 0 and column 9 of the 96 RS symbols after the permutation comes from the RS symbol in row 4 and column 9 of the 96 RS symbols before the permutation;

[0327] The RS symbol in row 0 and column 10 of the 96 RS symbols after the permutation comes from the RS symbol in row 4 and column 10 of the 96 RS symbols before the permutation;

[0328] The RS symbol in row 0, column 11 of the 96 RS symbols after the permutation comes from the RS symbol in row 4, column 11 of the 96 RS symbols before the permutation.

[0329] It should be understood that the above describes the specific method of replacement using data stream 0 before and after replacement as an example. Similarly, the replacement methods corresponding to data streams 0 to 7 can also be derived with reference to Figure 14(a), and will not be described in detail here.

[0330] Figure 14(b) is a schematic diagram of another embodiment of the substitution in this application. Figure 14(c) is a schematic diagram of another embodiment of the substitution in this application. Figure 14(d) is a schematic diagram of another embodiment of the substitution in this application. As shown in Figures 14(b), 14(c), and 14(d), three other substitution methods different from those shown in Figure 14(a) are provided. The specific methods can be understood in conjunction with the above description of Figure 14(a), and will not be repeated here.

[0331] 2) Consider m = n × p, n = 8, and p is an integer greater than 1. The first processing adopts the method of "performing a substitution first, and then distributing".

[0332] The first process obtains consecutive d values ​​from each first data stream. m= 12 RS symbols, resulting in 8 rows and 12 columns, totaling 96 RS symbols. A permutation operation is then performed to shuffle the order, resulting in 8 rows and 12 columns, totaling 96 RS symbols. Here, the specific permutation method is the same as the permutation method in the first process of "permutation only" mentioned above. For details, please refer to the relevant descriptions above and refer to Figures 14(a) to 14(d) for understanding. It will not be repeated here.

[0333] As shown in Figure 7, the 8 first data streams are permuted to obtain 8 permuted data streams. Each permuted data stream contains 12 consecutive RS symbols derived from 12 RS codewords. Each permuted data stream is then distributed to obtain p second data streams, resulting in a total of m = 8 × p second data streams.

[0334] In some specific applications, the above distribution uses a round-robin method, distributing each permuted data stream in granularity of 12 RS symbols (i.e., 120 bits) to obtain p second data streams, resulting in a total of m = 8 × p second data streams. In this case, each second data stream contains consecutive d... s =12 RS symbols from d s = 12 RS codewords. When m = 16, the above distribution adopts a round-robin method, distributing each permuted data stream with a granularity of 12 RS symbols to obtain p = 2 second data streams, resulting in a total of m = 8 × p = 16 second data streams. When m = 32, the above distribution adopts a round-robin method, distributing each permuted data stream with a granularity of 12 RS symbols to obtain p = 4 second data streams, resulting in a total of m = 8 × p = 32 second data streams. When m = 64, the above distribution adopts a round-robin method, distributing each permuted data stream with a granularity of 12 RS symbols to obtain p = 8 second data streams, resulting in a total of m = 8 × p = 64 second data streams.

[0335] In other specific applications, the above distribution uses a round-robin method, distributing each permuted data stream in granularity of K bits (corresponding to K / 10 RS symbols) to obtain p second data streams, resulting in a total of m = 8 × p second data streams, where K is the length of information bits in the internal code encoding of the second processing, and the integer K ≤ 160. In this case, each second data stream contains consecutive d... s =K / 10 RS symbols from d s = K / 10 RS codewords, for example, when K=110, each second data stream contains consecutive d... s =11 RS symbols from d s= 11 RS codewords. When m = 16, the above distribution is carried out in a polling manner, distributing each permuted data stream in units of K / 10 RS symbols to obtain p = 2 second data streams, so as to obtain a total of m = 8×p = 16 second data streams. When m = 32, the above distribution is carried out in a polling manner, distributing each permuted data stream in units of K / 10 RS symbols to obtain p = 4 second data streams, so as to obtain a total of m = 8×p = 32 second data streams. When m = 64, the above distribution is carried out in a polling manner, distributing each permuted data stream in units of K / 10 RS symbols to obtain p = 8 second data streams, so as to obtain a total of m = 8×p = 64 second data streams.

[0336] 3) Considering m = n×p, n = 8, and p is an integer greater than 1, the first processing adopts the method of "first distributing and then permuting".

[0337] As shown in Figure 8, each of the 8 first data streams is distributed in a polling manner in units of an integer multiple of 4 RS symbols (i.e., an integer multiple of 40 bits) to obtain p distributed data streams, so as to obtain a total of m = 8×p distributed data streams. For each distributed data stream, 4 consecutive RS symbols come from 4 RS codewords respectively. 12 consecutive RS symbols are obtained from each distributed data stream to obtain a total of 12m RS symbols in m rows and 12 columns, and a permutation operation is performed to scramble the order to obtain 12m RS symbols in m rows and 12 columns. Among them, "12m RS symbols" can also be written as "12×m RS symbols". For example, when m = 16, 12m RS symbols are 12×16 = 192 RS symbols. The above m distributed data streams are permuted to obtain m second data streams. In each second data stream, 12 consecutive RS symbols come from 12 RS codewords respectively, and 12 consecutive RS symbols in each second data stream come from 3 distributed data streams.

[0338] The above permutation operation satisfies the following thirteenth constraint:

[0339] Before permutation, the 12m RS symbols are distributed in m rows and 12 columns. The 12 RS symbols in the i-th row (0 ≤ i < m) come from 12 consecutive symbols in the distributed data stream i. After permutation, the 12m RS symbols are distributed in m rows and 12 columns.

[0340] Among the 12m RS symbols after permutation, the 4m RS symbols in columns 0, 1, 2, and 3 come from the 4m RS symbols in columns 0, 1, 2, and 3 among the 12m RS symbols before permutation.

[0341] The 4m RS symbols in columns 4, 5, 6, and 7 of the 12m RS symbols after the permutation are derived from the 4m RS symbols in columns 4, 5, 6, and 7 of the 12m RS symbols before the permutation.

[0342] The 4m RS symbols in columns 8, 9, 10, and 11 of the 12m RS symbols after the permutation are derived from the 4m RS symbols in columns 8, 9, 10, and 11 of the 12m RS symbols before the permutation.

[0343] The 12 RS symbols in any row of the 12m RS symbols after the permutation are derived from the 4 RS symbols in row i0, row i1, and row i2 of the 12m RS symbols before the permutation, for a total of 12 RS symbols. i0, i1, and i2 are one of the following combinations of values: (1) i0 is an integer from 0 to (m / 4-1), i1 is an integer from m / 4 to (m / 2-1), and i2 is an integer from m / 2 to (3m / 4-1); (2) i0 is an integer from 0 to ( (3) i0 is an integer from 0 to (m / 4-1), i1 is an integer from m / 4 to (m / 2-1), i2 is an integer from 3m / 4 to (m-1); (4) i0 is an integer from m / 4 to (m / 2-1), i1 is an integer from m / 2 to (3m / 4-1), i2 is an integer from 3m / 4 to (m-1), and m is a positive integer multiple of 4. Taking n=8 as an example, i0, i1, and i2 can also be the following combinations of values: (1) i0 is an integer from 0 to (2p-1), i1 is an integer from 2p to (4p-1), and i2 is an integer from 4p to (6p-1); (2) i0 is an integer from 0 to (2p-1), i1 is an integer from 2p to (4p-1), and i2 is an integer from 6p to (m-1); (3) i0 is an integer from 0 to (2p-1), i1 is an integer from 4p to (6p-1), and i2 is an integer from 6p to (m-1); (4) i0 is an integer from 2p to (4p-1), i1 is an integer from 4p to (6p-1), and i2 is an integer from 6p to (m-1).

[0344] In some specific applications, the above permutation operation also satisfies the following fourteenth constraint:

[0345] The m RS symbols in the j-th column (0≤j≤11) of the 12m RS symbols after the permutation are derived from the m RS symbols in the j-th column of the 12m RS symbols before the permutation.

[0346] In other specific applications, the above substitution operation also satisfies the following fifteenth constraint:

[0347] Any 12 RS symbols in a row among the 12m RS symbols after permutation come from 12 RS symbols, which are 4 consecutive RS symbols from the i0-th row, 4 consecutive RS symbols from the i1-th row, and 4 consecutive RS symbols from the i2-th row among the 12m RS symbols before permutation.

[0348] In some other specific applications, the above permutation operation further satisfies the following sixteenth constraint:

[0349] The RS symbol in the j0-th column (0 ≤ j0 ≤ 3) of the i-th row (0 ≤ i < m) among the 12m RS symbols after permutation comes from the RS symbol in the j0-th column of the i-th row among the 12m RS symbols before permutation, that is, the first 4 columns of symbols remain unchanged.

[0350] The following FIGS. 15(a) to 15(d) provide several specific implementation manners of the permutation. In FIGS. 15(a) to 15(d), the total 12m RS symbols of m rows and 12 columns before permutation are divided into 12 boxes, which are respectively marked as A0, A1, A2, B0, B1, B2, C0, C1, C2, D0, D1, D2. Each box contains m RS symbols of 2p rows and 4 columns in total. The 4 RS symbols in any 1 row of each box come from 4 RS codewords respectively. By permutation, the positions of some RS symbols are changed, which is equivalent to changing the positions of some marked boxes. Therefore, by comparing the 12m RS symbols before and after permutation, the boxes with the same mark represent the same m RS symbols and have the same distribution manner. The specific manner of permutation can be seen from the position changes of the boxes in FIGS. 15(a) to 15(d).

[0351] FIG. 15(a) is a schematic diagram of another implementation manner of the permutation in the embodiment of the present application. As shown in FIG. 15(a), each row of 12 RS symbols before permutation comes from the same distributed data stream. For example, the total 12 RS symbols in the 0-th row of A0, A1, and A2 come from the data stream 0 after distribution, and the total 12 RS symbols in the (2p - 1)-th row of D0, D1, and D2 come from the data stream m - 1 after distribution. As an example, among the 3m RS symbols A0, D1, and C2 in the data streams 0 to (2p - 1) after permutation, they are respectively m symbols from the data streams 0 to (2p - 1) before permutation, m symbols from the data streams 6p to (m - 1) before permutation, and m symbols from the data streams 4p to (6p - 1) before permutation. It can be seen that any d s = 12 RS symbols in any one of the data streams 0 to (2p - 1) after permutation come from d s = 12 RS codewords.

[0352] It should be understood that the above describes the specific method of substitution using data streams 0 to (2p-1) before and after substitution as examples. Similarly, the substitution methods corresponding to data streams 2p to m-1 can also be derived with reference to Figure 15(a), and will not be described in detail here.

[0353] Figure 15(b) is a schematic diagram of another embodiment of the substitution in this application. Figure 15(c) is a schematic diagram of another embodiment of the substitution in this application. Figure 15(d) is a schematic diagram of another embodiment of the substitution in this application. As shown in Figures 15(b), 15(c), and 15(d), three other substitution methods different from those shown in Figure 15(a) are provided. The specific methods can be understood in conjunction with the above description of Figure 15(a), and will not be repeated here.

[0354] Based on the above description of the first and second processes, several specific embodiments for the second aspect are given below.

[0355] Example 5: m = 8.

[0356] This embodiment is designed for a 1.6T coherent transmission scenario, considering four 400G Ethernet clients: 400GE Client 0, 400GE Client 1, 400GE Client 2, and 400GE Client 3. As shown in Figure 10, each 400GE client corresponds to one 400G AUI-2 interface containing two signal streams, for a total of eight signal streams across the four 400G AUI-2 interfaces. The nominal rate of each signal stream is 212.5Gb / s. These eight signal streams are PAM4 decoded (demodulated) to obtain eight first data streams, also known as eight demodulated data streams.

[0357] Symbol demultiplexing and alignment locking are performed on the two first data streams corresponding to one 400GE customer to obtain 16 data streams locked with alignment identifiers. The symbol boundaries, symbol pair boundaries, and 4-symbol boundaries within these data streams are also obtained. Offset removal is performed on the eight first data streams corresponding to four 400GE customers, ensuring that the offset between any two data streams in the eight de-offset data streams is 0 or d. skew bits, of which d skew It is a positive integer. In some specific applications, the above de-offset is a partial de-offset, d skew It is a multiple of 10. In some other specific applications, the above de-offset is a partial de-offset, d skew It is a multiple of 20. In some specific applications, the above de-offset is a partial de-offset, d skewIt must be a multiple of 40. Furthermore, in some specific applications, for the same 400GE customer, de-offset data streams 0 and 1 have no offset (i.e., the offset is 0); de-offset data streams 2 and 3 have no offset (i.e., the offset is 0); de-offset data streams 4 and 5 have no offset (i.e., the offset is 0); and de-offset data streams 6 and 7 have no offset (i.e., the offset is 0).

[0358] The aforementioned eight first data streams undergo a first processing step to obtain m = eight second data streams, such that each second data stream contains 12 consecutive RS symbols derived from 12 RS codewords, and each second data stream contains 12 consecutive RS symbols derived from three first data streams. The first processing step can be implemented as shown in Figures 14(a), 14(b), 14(c), or 14(d). This embodiment uses the implementation shown in Figure 14(c) as an example, where the first processing step includes one permutation process. The first processing step obtains 12 consecutive RS symbols from each of the eight first data streams, resulting in a total of 96 RS symbols. The permutation shuffles these 96 RS symbols, ensuring that each data stream after the permutation contains 12 consecutive RS symbols derived from 12 RS codewords. This permutation is performed across eight data streams and is also known as channel permutation.

[0359] The aforementioned eight second data streams are respectively processed through internal code encoding and first interleaving to obtain eight internal code encoded and first interleaved data streams. The internal code encoding uses BCH(126,110), and the first interleaving cyclically shifts the 110 information bits in each internal codeword (i.e., BCH codeword). It should be understood that each internal codeword's 110 information bits correspond to 11 RS symbols, and these 11 RS symbols originate from 11 RS codewords.

[0360] The data stream encoded by the above 8 internal codes and after the first interleaving undergoes a second interleaving, dual-polarization 16QAM symbol mapping, and framing to obtain a dual-polarization data stream to be transmitted. The second interleaving interleaves 126 codeword bits of each internal codeword to further improve the burst error resistance of the cascaded FEC scheme.

[0361] The specific data processing method given in this embodiment does not use a convolutional interleaver. The cascaded FEC scheme has strong decoding performance and low latency, especially in coherent transmission scenarios that are sensitive to latency requirements.

[0362] Example 6: m = 16.

[0363] As shown in Figure 11, based on Embodiment 5, the first processing considers processing the input n = 8 first data streams to obtain a total of m = 16 second data streams. Each second data stream contains 12 consecutive RS symbols from 12 RS codewords, and each second data stream contains 12 consecutive RS symbols from 3 first data streams. The specific implementation of the first processing can be shown in Figure 7. The first processing includes a permutation process and a distribution process. The permutation process can be understood with reference to Embodiment 5. The distribution process distributes each permuted data stream at a granularity of 12 RS symbols to obtain 2 second data streams, resulting in a total of 32 second data streams.

[0364] The aforementioned 32 second data streams are respectively processed through internal code encoding and first interleaving to obtain 32 internal code encoded and first interleaved data streams. The internal code encoding uses BCH(126,110), and the first interleaving cyclically shifts the 110 information bits in each internal codeword (i.e., BCH codeword). It should be understood that each internal codeword's 110 information bits correspond to 11 RS symbols, and these 11 RS symbols originate from 11 RS codewords.

[0365] The aforementioned 32 internal code encodings and the first interleaved data stream undergo a second interleaving, dual-polarization 16QAM symbol mapping, and framing to obtain a dual-polarization data stream to be transmitted. The second interleaving interleaves the 126 codeword bits of each internal codeword to further enhance the burst error resistance of the cascaded FEC scheme.

[0366] The specific data processing method given in this embodiment does not use a convolutional interleaver. The cascaded FEC scheme has strong decoding performance and low latency, and can be applied to many coherent transmission scenarios, especially coherent transmission scenarios that are sensitive to latency requirements.

[0367] It should be noted that in some specific applications, the distribution process distributes each permuted data stream into four second data streams with a granularity of 11 RS symbols, resulting in a total of 32 second data streams. In this case, each of the m=32 second data streams contains 11 consecutive RS symbols from 11 RS codewords, and each second data stream contains 11 consecutive RS symbols from at least two first data streams.

[0368] Example 7: m = 32.

[0369] As shown in Figure 12, based on Embodiment 5, the first processing considers processing the input n = 8 first data streams to obtain a total of m = 32 second data streams. Each second data stream contains 12 consecutive RS symbols from 12 RS codewords, and each second data stream contains 12 consecutive RS symbols from 3 first data streams. The specific implementation of the first processing can be shown in Figure 7. The first processing includes a permutation process and a distribution process. The permutation process can be understood with reference to Embodiment 5. The distribution process distributes each permuted data stream at a granularity of 12 RS symbols to obtain 4 second data streams, resulting in a total of 32 second data streams.

[0370] The aforementioned 32 second data streams are respectively processed through internal code encoding and first interleaving to obtain 32 internal code encoded and first interleaved data streams. The internal code encoding uses BCH(126,110), and the first interleaving cyclically shifts the 110 information bits in each internal codeword (i.e., BCH codeword). It should be understood that each internal codeword's 110 information bits correspond to 11 RS symbols, and these 11 RS symbols originate from 11 RS codewords.

[0371] The aforementioned 32 internal code codes and the data stream after the first interleaving undergo a second interleaving, dual-polarization 16QAM symbol mapping, and framing to obtain a dual-polarization data stream to be transmitted. The second interleaving interleaves 126 codeword bits of each internal codeword to further enhance the burst error resistance of the cascaded FEC scheme.

[0372] The specific data processing method given in this embodiment does not use a convolutional interleaver. The cascaded FEC scheme has strong decoding performance and low latency, and can be applied to many coherent transmission scenarios, especially coherent transmission scenarios that are sensitive to latency requirements.

[0373] It should be noted that in some specific applications, the distribution process distributes each permuted data stream into four second data streams with a granularity of 11 RS symbols, resulting in a total of 32 second data streams. In this case, each of the m=32 second data streams contains 11 consecutive RS symbols from 11 RS codewords, and each second data stream contains 11 consecutive RS symbols from at least two first data streams.

[0374] Example 8: m = 64.

[0375] As shown in Figure 13, based on Embodiment 5, the first processing considers processing the input n = 8 first data streams to obtain a total of m = 64 second data streams. Each second data stream contains 16 consecutive RS symbols derived from 16 RS codewords, and each second data stream contains 16 consecutive RS symbols derived from 4 first data streams. The specific implementation of the first processing can be shown in Figure 7. The first processing includes a permutation process and a distribution process. The permutation process can be understood with reference to Embodiment 5. The distribution process distributes each permuted data stream to obtain 8 second data streams, resulting in a total of 64 second data streams.

[0376] The aforementioned 64 second data streams are respectively processed through internal code encoding and first interleaving to obtain 64 internal code encoded and first interleaved data streams. The internal code encoding uses BCH(126,110), and the first interleaving cyclically shifts the 110 information bits in each internal codeword (i.e., BCH codeword). It should be understood that each internal codeword's 110 information bits correspond to 11 RS symbols, and these 11 RS symbols come from 11 RS codewords.

[0377] The aforementioned 64 internal code codes and the data stream after the first interleaving undergo a second interleaving, dual-polarization 16QAM symbol mapping, and framing to obtain a dual-polarization data stream to be transmitted. The second interleaving interleaves 126 codeword bits of each internal codeword to further enhance the burst error resistance of the cascaded FEC scheme.

[0378] The specific data processing method given in this embodiment does not use a convolutional interleaver. The cascaded FEC scheme has strong decoding performance and low latency, and can be applied to many coherent transmission scenarios, especially coherent transmission scenarios that are sensitive to latency requirements.

[0379] It should be noted that in some specific applications, the distribution process distributes each permuted data stream into four second data streams with a granularity of 11 RS symbols, resulting in a total of 32 second data streams. In this case, each of the m=32 second data streams contains 11 consecutive RS symbols from 11 RS codewords, and each second data stream contains 11 consecutive RS symbols from at least two first data streams.

[0380] It should be noted that in some specific applications, based on the "perform only replacement" approach described in the first and second aspects above, a "distribution" operation can be added to the second process, which will be explained in detail below.

[0381] Each of the m second data streams is internally encoded to obtain m internally encoded data streams, where m = n. The internal encoding process encodes every K information bits in the second data stream to generate NK check bits, resulting in an internal codeword of N bits, where 1 < K < N. Then, each internally encoded data stream is distributed in N-bit granularity to obtain q distributed data streams, for a total of m × q distributed data streams. The m × q distributed data streams undergo a first interleaving and a second interleaving, followed by a second processing step involving dual-polarization symbol mapping and framing to obtain a single dual-polarization data stream.

[0382] In each of the aforementioned inner codewords, K information bits correspond to K / 10 outer code RS symbols, and these K / 10 outer code RS symbols come from K / 10 outer code RS codewords. This allows the FEC concatenation scheme, which includes RS encoding and inner code encoding, to achieve optimal performance. For example, the inner code encoding uses a linear block code of N=126, K=110, such as BCH(126,110). In this case, K=110 information bits in each inner codeword correspond to K / 10=11 RS symbols, and these K / 10=11 RS symbols come from K / 10=11 RS codewords. Another example is the inner code encoding using a linear block code of N=128, K=120. In this case, K=120 information bits in each inner codeword correspond to K / 10=12 RS symbols, and these K / 10=12 RS symbols come from K / 10=12 different RS codewords. For example, the internal code uses a linear block code with N=176 and K=160. Each internal code codeword contains K=160 information bits that correspond to K / 10=16 RS symbols, and the corresponding K / 10=16 RS symbols come from K / 10=16 different RS codewords.

[0383] Typically, m = n = 8. In some specific applications, q = 2, and each encoded data stream is distributed in N-bit granularity to obtain q = 2 distributed data streams, resulting in a total of m × q = 16 distributed data streams. In other specific applications, q = 4, and each encoded data stream is distributed in N-bit granularity to obtain q = 4 distributed data streams, resulting in a total of m × q = 32 distributed data streams. In still other specific applications, q = 8, and each encoded data stream is distributed in N-bit granularity to obtain q = 8 distributed data streams, resulting in a total of m × q = 64 distributed data streams. The above m × q distributed data streams undergo a second processing step, including dual-polarization symbol mapping and framing, to obtain one dual-polarization data stream.

[0384] The following describes a possible implementation method using q=4 as an example.

[0385] Example 9: Figure 16 is a schematic diagram of another implementation of the data processing method in this application. As shown in Figure 16, based on Example 5, 8 first data streams undergo a first processing to obtain m = 8 second data streams, such that 12 consecutive RS symbols in each second data stream come from 12 RS codewords, and 12 consecutive RS symbols in each second data stream come from 3 first data streams. The first processing can be implemented in the specific ways shown in Figures 14(a), 14(b), 14(c), or 14(d). This example uses the specific implementation shown in Figure 14(c), where the first processing includes one permutation process. The first processing obtains 12 consecutive RS symbols from each of the 8 first data streams to obtain a total of 96 RS symbols. The permutation shuffles the order of the 96 RS symbols, so that 12 consecutive RS symbols in each data stream obtained after the permutation come from 12 RS codewords. The permutation is performed across 8 data streams and is also called channel permutation.

[0386] The aforementioned eight second data streams are each encoded using internal codes to obtain eight encoded data streams, with the internal code employing BCH(126,110). Each encoded data stream is distributed in granularity of N = 126 bits to obtain q = 4 distributed data streams, resulting in a total of m × q = 32 distributed data streams. These 32 distributed data streams are then subjected to a first interleaving to obtain 32 first-interleaved data streams. The first interleaving cyclically shifts the 110 information bits in each internal codeword (i.e., BCH codeword) within the 32 distributed data streams. It should be understood that each internal codeword's 110 information bits correspond to 11 RS symbols, and these 11 RS symbols originate from 11 RS codewords.

[0387] The aforementioned 32 data streams after the first interleaving undergo a second interleaving (also known as internal codeword interleaving), dual-polarization 16QAM symbol mapping, and framing to obtain a single dual-polarization data stream to be transmitted. The second interleaving interleaves 126 codeword bits of each internal codeword to further enhance the burst error resistance of the cascaded FEC scheme.

[0388] The specific data processing method given in this embodiment does not use a convolutional interleaver. The cascaded FEC scheme has strong decoding performance and low latency, especially in coherent transmission scenarios that are sensitive to latency requirements.

[0389] The following section uses q=8 as an example to introduce another possible implementation method.

[0390] Example 10: Based on Example 9, consider q = 8. Each of the m = 8 second data streams is encoded using internal code to obtain 8 internally encoded data streams, where the internal code uses BCH(126, 110). Each internally encoded data stream is distributed in granularity of N = 126 bits to obtain q = 8 distributed data streams, resulting in a total of m × q = 64 distributed data streams. These 64 distributed data streams are then subjected to a first interleaving to obtain 64 first-interleaved data streams. The first interleaving cyclically shifts 110 information bits in each internal codeword (i.e., BCH codeword) within the 64 distributed data streams. It should be understood that each internal codeword's 110 information bits correspond to 11 RS symbols, and these 11 RS symbols come from 11 RS codewords.

[0391] The aforementioned 64 data streams after the first interleaving undergo a second interleaving (also known as internal codeword interleaving), dual-polarization 16QAM symbol mapping, and framing to obtain a single dual-polarization data stream to be transmitted. The second interleaving interleaves 126 codeword bits of each internal codeword to further enhance the burst error resistance of the cascaded FEC scheme.

[0392] The specific data processing method given in this embodiment does not use a convolutional interleaver. The cascaded FEC scheme has strong decoding performance and low latency, especially in coherent transmission scenarios that are sensitive to latency requirements.

[0393] Figure 17 is a schematic diagram of a data processing device according to an embodiment of this application. As shown in Figure 17, the data processing device includes an acquisition unit 201 and a processing unit 202. The acquisition unit 201 is used to perform the operation of step 101 in the embodiment shown in Figure 4 above. The processing unit 202 is used to perform the operations of steps 102 and 103 in the embodiment shown in Figure 4 above. The specific operations of the acquisition unit 201 and the processing unit 202 can be referred to the relevant description of the embodiment shown in Figure 4 above, and will not be repeated here.

[0394] It should be understood that the data processing device shown in Figure 17 can also be implemented in other ways. For example, the unit division in the above device is only a logical functional division, and there may be other division methods in actual implementation. For example, multiple units or components may be combined or integrated into another system. In addition, the functional units in the various embodiments of this application may be integrated into one processing unit, or they may be independent physical units, or two or more functional units may be integrated into one processing unit. The integrated unit described above can be implemented in hardware or in the form of software functional units.

[0395] Figure 18 is a schematic diagram of an optical module structure according to an embodiment of this application. As shown in Figure 18, the optical module includes a processor 301 and an interface 302. The interface 302 can be a transceiver or an input / output interface, and is used to receive signals from other devices and transmit them to the processor 301 or to send signals from the processor 301 to other devices. Optionally, the optical module may also include a memory 303, wherein the memory 303 is used to store program instructions and data.

[0396] In one possible scenario, processor 301 is used to perform the operations in the embodiment shown in FIG4 above. For example, processor 301 includes the processing unit 202 shown in FIG17. As an example, processor 301 performs the operations in the embodiment shown in FIG4 above to obtain at least one dual-polarization data stream and sends at least one dual-polarization data stream through interface 302. In this example, interface 302 may specifically refer to an electrical interface. As another example, processor 301 performs the operations in the embodiment shown in FIG4 above to obtain at least one dual-polarization data stream, and the modulator in the optical module performs signal processing such as electro-optic conversion based on at least one dual-polarization data stream to obtain an optical signal, and then sends the optical signal through interface 302. In this example, interface 302 may specifically refer to an optical interface.

[0397] Typically, an optical module consists of optoelectronic devices, a processor, and an interface. The optoelectronic devices include transmitting and receiving devices. The transmitting end of the optical module converts electrical signals into optical signals and transmits them through optical fibers. The receiving end of the optical module receives the optical signals and converts them back into electrical signals.

[0398] It should be noted that the types of optical modules in this application embodiment include, but are not limited to, normal optical modules, near package optics (NPO) modules, and co-packaged optics (CPO) modules. Normal optical modules can perform functions including, but not limited to, digital signal processing (DSP) and clock data recovery (CDR). For example, a normal optical module converts analog signals to digital signals, performs DSP on the digital signals, and then converts them back to analog signals before sending them to the host device. Because DSP requires retiming, a normal optical module can also be called a retimed module. Normal optical modules are connected to the host device via an attachment unit interface (AUI). NPO and CPO modules do not have pluggable physical packaging and are closer to the host device. NPO and CPO modules can also be called optical engines. NPO or CPO technology is a technology that "packages" the host device (or host chip) and the optical engine. When NPO technology is used to encapsulate the host-side device and the optical engine, the optical engine can be called an NPO module. When CPO technology is used to encapsulate the host-side device and the optical engine, the optical engine can be called a CPO module.

[0399] Figure 19 is a schematic diagram of a network device according to an embodiment of this application. As shown in Figure 19, the network device includes a host-side device 401 and an optical module 402. In one possible scenario, the network device acts as a data transmitter, with the host-side device 401 sending electrical signals to the optical module 402. The optical module 402 converts the electrical signals into optical signals and transmits them through a channel. In another possible scenario, the network device acts as a data receiver, with the optical module 402 converting the received optical signals into electrical signals and sending them to the host-side device 401. For example, the host-side device 401 may specifically be a switch, router, or server. It should be understood that the network device in this embodiment of the application has both transmitting and receiving functions.

[0400] This application also provides an Optical Transport Network (OTN) device, which includes line-side equipment and client-side equipment. The client-side equipment may also be referred to as a tributary-side equipment in some scenarios. The line-side equipment includes a processor and an interface. In one possible scenario, the processor is used to perform the operations of the embodiment shown in FIG3. The interface can be a transceiver or an input / output interface, used to receive signals from other devices outside the line-side equipment and transmit them to the processor, or to send signals from the processor to other devices outside the line-side equipment.

[0401] This application also provides a chip. The chip integrates circuitry for implementing the functions of the processor 301 described above and one or more interfaces. As an example, the chip integrates a memory. As another example, when the chip does not integrate a memory, it can be connected to an external memory via the interface. The chip can perform the method steps of any one or more of the foregoing embodiments. Alternatively, the chip can implement the method steps of any one or more of the foregoing embodiments based on program code stored in the memory.

[0402] As an example, the chip in the embodiments of this application can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. A general-purpose processor can be a microprocessor, any conventional processor, or a processing circuit that implements a specific function.

[0403] This application also provides a computer-readable storage medium including a program or instructions that, when run on a computer, cause the method performed as described in the above method embodiments to be implemented.

[0404] It should be understood that the processor mentioned in the embodiments of this application can be implemented in hardware or software. When implemented in hardware, the processor can be a logic circuit, integrated circuit, etc. When implemented in software, the processor can be a general-purpose processor that reads software code stored in memory. The memory can exist independently and be connected to the processor, or the memory can be integrated with the processor.

[0405] As an example, the processor in the embodiments of this application can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. A general-purpose processor can be a microprocessor, any conventional processor, or a processing circuit that implements a specific function.

[0406] In embodiments of this application, the memory may be random access memory (RAM), flash memory, read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), registers, hard disks, portable hard disks, CD-ROMs, or any other form of storage medium known in the art. An exemplary storage medium is coupled to a processor, enabling the processor to read information from and write information to the storage medium. Of course, the storage medium may also be a component of the processor. The processor and storage medium may reside in an ASIC. Additionally, the ASIC may reside in a network device or a terminal device. Alternatively, the processor and storage medium may exist as discrete components in the network device or terminal device.

[0407] In the above embodiments, it can be implemented entirely or partially by software, hardware, firmware, or any combination thereof.

[0408] When implemented in hardware, the data transmission method provided in this application embodiment may be implemented without reading software code or instructions. For example, it may be implemented by CPU, DSP, ASIC, FPGA, other programmable logic devices, transistor logic devices, hardware components, or any combination thereof.

[0409] When implemented using software, it can be implemented entirely or partially in the form of a computer program product. A computer program product includes one or more computer programs or instructions. When the computer program or instructions are loaded and executed on a computer, all or part of the processes or functions of the embodiments of this application are performed. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a network device, a terminal device, or other programmable device. The computer program or instructions can be stored in or transmitted through a computer-readable storage medium. The computer-readable storage medium can be any available medium that a computer can access, or a data storage device such as a server that integrates one or more available media. The available medium can be a magnetic medium, such as a floppy disk, hard disk, or magnetic tape; it can also be an optical medium, such as a Digital Versatile Disc (DVD); or it can be a semiconductor medium, such as a solid-state disk (SSD).

[0410] Finally, it should be noted that the above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A data processing method, characterized in that, include: Obtain n first data streams encoded by Reed-Solomon RS, where n>1, and in each of the n first data streams, every four consecutive RS symbols come from four RS codewords, and the n first data streams carry data from at least four Ethernet clients; The n first data streams are processed to obtain m second data streams, where m ≥ n. In each of the m second data streams, every consecutive d... s The RS symbols respectively come from d s One RS codeword, d s ≥8, wherein the plurality of RS symbols in each second data stream originate from at least two of the n first data streams; The m second data streams are subjected to a second process including forward error correction (FEC) coding.

2. The method according to claim 1, characterized in that, In each of the second data streams, every consecutive d s Each RS symbol comes from at least two of the n first data streams.

3. The method according to claim 1 or 2, characterized in that, Each n / 4 of the n first data streams carries the data of one Ethernet client, where n is a positive integer multiple of 4.

4. The method according to any one of claims 1 to 3, characterized in that, d s ≥11, wherein the plurality of RS symbols in each second data stream are derived from at least 3 of the n first data streams.

5. The method according to any one of claims 1 to 4, characterized in that, The first processing of the n first data streams to obtain m second data streams includes: The n first data streams are permuted to obtain m second data streams, where n = m.

6. The method according to claim 5, characterized in that, d s =16, wherein every 16 consecutive RS symbols in each second data stream come from 4 of the n first data streams, and every 16 consecutive RS symbols in each second data stream includes 4 consecutive RS symbols in each of the 4 first data streams.

7. The method according to claim 5, characterized in that, d s =12, wherein every 12 consecutive RS symbols in each second data stream come from 3 of the n first data streams, and every 12 consecutive RS symbols in each second data stream include 4 consecutive RS symbols in each of the 3 first data streams.

8. The method according to any one of claims 5 to 7, characterized in that, The second process further includes distribution, wherein the m second data streams are encoded by the FEC to obtain m third data streams, and the m third data streams are distributed to obtain m×q fourth data streams, wherein each of the m third data streams is distributed to obtain q fourth data streams, and q is an integer greater than 1.

9. The method according to claim 8, characterized in that, The granularity of the distribution is N bits, where N is the number of bits included in the codeword encoded by the FEC, and N>1.

10. The method according to any one of claims 1 to 4, characterized in that, The first processing of the n first data streams to obtain m second data streams includes: The n first data streams are permuted to obtain n fifth data streams; The n fifth data streams are distributed to obtain the m second data streams, where m = n × p. Each of the n fifth data streams is distributed to obtain p second data streams, where p is an integer greater than 1.

11. The method according to claim 10, characterized in that, In each of the n fifth data streams, every 16 consecutive RS symbols come from 16 RS codewords. In each of the n fifth data streams, every 16 consecutive RS symbols come from 4 of the n first data streams. Every 16 consecutive RS symbols in each fifth data stream includes 4 consecutive RS symbols in each of the 4 first data streams.

12. The method according to claim 10 or 11, characterized in that, The granularity of the distribution is 16 RS symbols, d s =16.

13. The method according to claim 10, characterized in that, In each of the n fifth data streams, every 12 consecutive RS symbols come from 12 RS codewords. In each of the n fifth data streams, every 12 consecutive RS symbols come from 3 of the n first data streams. Every 12 consecutive RS symbols in each fifth data stream includes 4 consecutive RS symbols in each of the 3 first data streams.

14. The method according to claim 10 or 13, characterized in that, The granularity of the distribution is 12 RS symbols, d s =12.

15. The method according to claim 10, 11, or 13, characterized in that, The granularity of the distribution is K / 10 RS symbols, d s = K / 10, where K is the number of information bits encoded by the FEC, 1 <K≤160。 16. The method according to claim 5, 6, 8, 9, 10, 11, 12 or 15, characterized in that, n=8, the 128 RS symbols distributed in 8 rows and 16 columns in the 8 first data streams are permuted to obtain 128 RS symbols distributed in 8 rows and 16 columns. The 16 RS symbols in the i-th row of the 128 RS symbols before the permutation come from the 16 consecutive RS symbols in the i-th first data stream of the 8 first data streams, 0≤i≤7; The 32 RS symbols in columns 0, 1, 2, and 3 of the 128 RS symbols after the permutation are derived from the 32 RS symbols in columns 0, 1, 2, and 3 of the 128 RS symbols before the permutation. The 32 RS symbols in columns 4, 5, 6, and 7 of the 128 RS symbols after the permutation are derived from the 32 RS symbols in columns 4, 5, 6, and 7 of the 128 RS symbols before the permutation. The 32 RS symbols in columns 8, 9, 10, and 11 of the 128 RS symbols after the permutation are derived from the 32 RS symbols in columns 8, 9, 10, and 11 of the 128 RS symbols before the permutation. The 32 RS symbols in columns 12, 13, 14, and 15 of the 128 RS symbols after the permutation are derived from the 32 RS symbols in columns 12, 13, 14, and 15 of the 128 RS symbols before the permutation. The 16 RS symbols in any row of the 128 RS symbols after the permutation are derived from the 4 RS symbols in row i0, row i1, row i2, and row i3 of the 128 RS symbols before the permutation, for a total of 16 RS symbols, i0 = 0 or 1, i1 = 2 or 3, i2 = 4 or 5, and i3 = 6 or 7.

17. The method according to claim 16, characterized in that, The 8 RS symbols in the j-th column of the 128 RS symbols after the permutation are derived from the 8 RS symbols in the j-th column of the 128 RS symbols before the permutation, where 0 ≤ j ≤ 15.

18. The method according to claim 16 or 17, characterized in that, The 16 RS symbols in any row of the 128 RS symbols after the permutation are derived from the 4 consecutive RS symbols in the i0th row, the 4 consecutive RS symbols in the i1th row, the 4 consecutive RS symbols in the i2th row, and the 4 consecutive RS symbols in the i3th row of the 128 RS symbols before the permutation, totaling 16 RS symbols.

19. The method according to any one of claims 16 to 18, characterized in that, The RS symbol in the i-th row and j0-th column of the 128 RS symbols after the permutation comes from the RS symbol in the i-th row and j0-th column of the 128 RS symbols before the permutation, where 0 ≤ j0 ≤ 3.

20. The method according to claim 5, 7, 8, 9, 10, 13, 14 or 15, characterized in that, n=8, the 96 RS symbols distributed in 8 rows and 12 columns in the 8 first data streams are permuted to obtain 96 RS symbols distributed in 8 rows and 12 columns. The 12 RS symbols in the i-th row of the 96 RS symbols before the permutation come from the 12 consecutive RS symbols in the i-th first data stream in the 8 first data streams, 0≤i≤7; The 32 RS symbols in columns 0, 1, 2, and 3 of the 96 RS symbols after the permutation are derived from the 32 RS symbols in columns 0, 1, 2, and 3 of the 96 RS symbols before the permutation. The 32 RS symbols in columns 4, 5, 6, and 7 of the 96 RS symbols after the permutation are derived from the 32 RS symbols in columns 4, 5, 6, and 7 of the 96 RS symbols before the permutation. The 32 RS symbols in columns 8, 9, 10, and 11 of the 96 RS symbols after the permutation are derived from the 32 RS symbols in columns 8, 9, 10, and 11 of the 96 RS symbols before the permutation. The 12 RS symbols in any row of the 96 RS symbols after the permutation are derived from the 4 RS symbols in row i0, the 4 RS symbols in row i1, and the 4 RS symbols in row i2 of the 96 RS symbols before the permutation, totaling 12 RS symbols. i0 = 0 or 1, i1 = 2 or 3, i2 = 4 or 5; or i0 = 0 or 1, i1 = 2 or 3, i2 = 6 or 7; or i0 = 0 or 1, i1 = 4 or 5, i2 = 6 or 7; or i0 = 2 or 3, i1 = 4 or 5, i2 = 6 or 7.

21. The method according to claim 20, characterized in that, The 8 RS symbols in the j-th column of the 96 RS symbols after the permutation are derived from the 8 RS symbols in the j-th column of the 96 RS symbols before the permutation, where 0 ≤ j ≤ 11.

22. The method according to claim 20 or 21, characterized in that, The 12 RS symbols in any row of the 96 RS symbols after the permutation are derived from the 4 consecutive RS symbols in the i0th row, the 4 consecutive RS symbols in the i1th row, and the 4 consecutive RS symbols in the i2th row of the 96 RS symbols before the permutation, totaling 12 RS symbols.

23. The method according to any one of claims 20 to 22, characterized in that, The RS symbol in the i-th row and j0-th column of the 96 RS symbols after the permutation comes from the RS symbol in the i-th row and j0-th column of the 96 RS symbols before the permutation, where 0 ≤ j0 ≤ 3.

24. The method according to any one of claims 1 to 4, characterized in that, The first processing of the n first data streams to obtain m second data streams includes: The n first data streams are distributed to obtain m sixth data streams, where m = n × p, and each of the n first data streams is distributed to obtain p sixth data streams, where p is an integer greater than 1; The m sixth data streams are permuted to obtain the m second data streams.

25. The method according to claim 24, characterized in that, The granularity of the distribution is an integer multiple of 4 RS symbols, and in each of the m sixth data streams, every 4 consecutive RS symbols come from 4 RS codewords.

26. The method according to claim 24 or 25, characterized in that, d s =16, where every 16 consecutive RS symbols in each second data stream come from 4 of the m sixth data streams, and every 16 consecutive RS symbols in each second data stream include 4 consecutive RS symbols in each of the 4 sixth data streams.

27. The method according to any one of claims 24 to 26, characterized in that, The 16m RS symbols distributed in m rows and 16 columns from m sixth data streams are permuted to obtain 16m RS symbols distributed in m rows and 16 columns. The 16 RS symbols in the i-th row of the 16m RS symbols before the permutation are derived from the 16 consecutive RS symbols in the i-th sixth data stream of the m sixth data streams, where 0 ≤ i <m; The 4m RS symbols in columns 0, 1, 2, and 3 of the 16m RS symbols after the permutation are derived from the 4m RS symbols in columns 0, 1, 2, and 3 of the 16m RS symbols before the permutation. The 4m RS symbols in columns 4, 5, 6, and 7 of the 16m RS symbols after the permutation are derived from the 4m RS symbols in columns 4, 5, 6, and 7 of the 16m RS symbols before the permutation. The 4m RS symbols in columns 8, 9, 10, and 11 of the 16m RS symbols after the permutation are derived from the 4m RS symbols in columns 8, 9, 10, and 11 of the 16m RS symbols before the permutation. The 4m RS symbols in columns 12, 13, 14, and 15 of the 16m RS symbols after the permutation are derived from the 4m RS symbols in columns 12, 13, 14, and 15 of the 16m RS symbols before the permutation. The 16 RS symbols in any row of the 16m RS symbols after the permutation are derived from the 4 RS symbols in row i0, row i1, row i2, and row i3 of the 16m RS symbols before the permutation, totaling 16 RS symbols. i0 is an integer from 0 to (m / 4-1), i1 is an integer from m / 4 to (m / 2-1), i2 is an integer from m / 2 to (3m / 4-1), and i3 is an integer from 3m / 4 to (m-1), where m is a positive integer multiple of 4.

28. The method according to claim 27, characterized in that, The m RS symbols in the j-th column of the 16m RS symbols after the permutation are derived from the m RS symbols in the j-th column of the 16m RS symbols before the permutation, where 0 ≤ j ≤ 15.

29. The method according to claim 27 or 28, characterized in that, The 16 RS symbols in any row of the 16m RS symbols after the permutation are derived from the 4 consecutive RS symbols in the i0th row, the 4 consecutive RS symbols in the i1th row, the 4 consecutive RS symbols in the i2th row, and the 4 consecutive RS symbols in the i3th row of the 16m RS symbols before the permutation, for a total of 16 RS symbols.

30. The method according to any one of claims 27 to 29, characterized in that, The RS symbol in the i-th row and j0-th column of the 16m RS symbols after the permutation comes from the RS symbol in the i-th row and j0-th column of the 16m RS symbols before the permutation, where 0 ≤ j0 ≤ 3.

31. The method according to claim 24 or 25, characterized in that, d s =12, wherein every 12 consecutive RS symbols in each second data stream come from 3 of the m sixth data streams, and every 12 consecutive RS symbols in each second data stream include 4 consecutive RS symbols in each of the 3 sixth data streams.

32. The method according to claim 24, 25 or 31, characterized in that, The 12m RS symbols distributed in m rows and 12 columns from the m sixth data streams are permuted to obtain 12m RS symbols distributed in m rows and 12 columns. The 12 RS symbols in the i-th row of the 12m RS symbols before the permutation are derived from the 12 consecutive RS symbols in the i-th sixth data stream of the m sixth data streams, where 0 ≤ i <m; The 4m RS symbols in columns 0, 1, 2, and 3 of the 12m RS symbols after the permutation are derived from the 4m RS symbols in columns 0, 1, 2, and 3 of the 12m RS symbols before the permutation. The 4m RS symbols in columns 4, 5, 6, and 7 of the 12m RS symbols after the permutation are derived from the 4m RS symbols in columns 4, 5, 6, and 7 of the 12m RS symbols before the permutation. The 4m RS symbols in columns 8, 9, 10, and 11 of the 12m RS symbols after the permutation are derived from the 4m RS symbols in columns 8, 9, 10, and 11 of the 12m RS symbols before the permutation. The 12 RS symbols in any row of the 12m RS symbols after the permutation are derived from the 4 RS symbols in the i0th row, the 4 RS symbols in the i1th row, and the 4 RS symbols in the i2th row of the 12m RS symbols before the permutation, for a total of 12 RS symbols. i0 is an integer from 0 to (m / 4-1), i1 is an integer from m / 4 to (m / 2-1), and i2 is an integer from m / 2 to (3m / 4-1); or, i0 is an integer from 0 to (m / 4-1), i1 is an integer from m / 4 to (m / 2-1), and i2 is an integer from 3m / 4 to (m-1); or, i0 is an integer from 0 to (m / 4-1), i1 is an integer from m / 2 to (3m / 4-1), and i2 is an integer from 3m / 4 to (m-1); or, i0 is an integer from m / 4 to (m / 2-1), i1 is an integer from m / 2 to (3m / 4-1), and i2 is an integer from 3m / 4 to (m-1), where m is a positive integer multiple of 4.

33. The method according to claim 32, characterized in that, The m RS symbols in the j-th column of the 12m RS symbols after the permutation are derived from the m RS symbols in the j-th column of the 12m RS symbols before the permutation, where 0 ≤ j ≤ 11.

34. The method according to claim 32 or 33, characterized in that, The 12 RS symbols in any row of the 12m RS symbols after the permutation are derived from the 4 consecutive RS symbols in the i0th row, the 4 consecutive RS symbols in the i1th row, and the 4 consecutive RS symbols in the i2th row of the 12m RS symbols before the permutation, for a total of 12 RS symbols.

35. The method according to any one of claims 32 to 34, characterized in that, The RS symbol in the i-th row and j0-th column of the 12m RS symbols after the permutation comes from the RS symbol in the i-th row and j0-th column of the 12m RS symbols before the permutation, where 0 ≤ j0 ≤ 3.

36. The method according to any one of claims 1 to 35, characterized in that, The second process also includes dual polarization symbol mapping and framing. The m second data streams, after being encoded by FEC, undergo dual polarization symbol mapping and framing to become one dual polarization data stream.

37. The method according to any one of claims 1 to 36, characterized in that, n＝8。 38. The method according to any one of claims 1 to 37, characterized in that, The FEC-encoded codeword consists of N bits, which include K information bits and NK check bits. N = 126, K = 110; or N = 128, K = 120; or N = 176, K = 160.

39. A data processing apparatus, characterized in that, The data processing device includes: an acquisition unit and a processing unit; The acquisition unit is used to: acquire n first data streams encoded by Reed-Solomon RS, where n>1, and in each of the n first data streams, every four consecutive RS symbols come from four RS codewords, and the n first data streams carry data from at least four Ethernet clients; The processing unit is configured to: perform a first process on the n first data streams to obtain m second data streams, where m ≥ n, and each of the m second data streams has consecutive d... s The RS symbols respectively come from d s One RS codeword, d s ≥8, wherein the plurality of RS symbols in each second data stream originate from at least two of the n first data streams; The m second data streams are subjected to a second process including forward error correction (FEC) coding.

40. A chip, characterized in that, The chip is used to perform the method as described in any one of claims 1 to 38.

41. An optical module, characterized in that, The optical module includes a processor and an interface, the interface being used for transmitting and receiving signals, and the processor being used for performing the method as described in any one of claims 1 to 38.

42. A network device, characterized in that, The network device includes a host-side device and an optical module as described in claim 41; the optical module is used to convert electrical signals from the host-side device into optical signals and transmit the optical signals, or the optical module is used to convert received optical signals into electrical signals and transmit the electrical signals to the host-side device.

43. A communication system, characterized in that, It includes a plurality of network devices as described in claim 42, wherein the plurality of network devices are used to send optical signals to each other.

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