Communication method and apparatus

Abstract

A communication method and apparatus, which relate to the field of communications, and are capable of reducing the number of low-repetition codewords after CRC precoding and improving the decoding performance in CRC technology. The method may be executed by means of a sending-end device, and comprises: determining a CRC sequence on the basis of a first sequence and a first polynomial, and precoding an information bit sequence on the basis of the CRC sequence, wherein the first polynomial is determined on the basis of the first sequence, the first sequence is obtained by inserting Y zeros at every X positions of the information bit sequence, X is less than the length A of the information bit sequence, and Y is a positive integer. The solution of the present application can be widely applied to the technical fields of communications, artificial intelligence, the Internet of Vehicles, intelligent home networking, etc.

Description

A communication method and device

[0001] This application claims priority to Chinese Patent Application No. 202411828949.0, filed with the State Intellectual Property Office of China on December 11, 2024, entitled “A Communication Method and Apparatus”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of communications, and more particularly to a communication method and apparatus. Background Technology

[0003] Cyclic redundancy check (CRC) is a fast algorithm that generates a short, fixed-length check code (or verification code) based on data. It is primarily used to detect or verify errors that may occur after data transmission or storage. CRC utilizes the principles of division and remainders to achieve error detection, and has advantages such as clear principles and simple implementation.

[0004] CRC technology can effectively reduce the number of low-similarity codewords in an encoded sequence. Specifically, for a CRC sequence of length L, the low-similarity codewords that pass the CRC check account for 2 / 3 of all low-similarity codewords. -L However, in many cases, the proportion of low-similarity codewords that can pass the CRC sequence check of length L will be greater than 2. -L Especially when the information bit sequence has a long code length and the CRC sequence length L is small, the proportion of low-similarity codewords that can pass the CRC sequence check of length L is greater than 2. -L The more pronounced the phenomenon, the less effective CRC technology becomes at reducing low-similarity codewords, thus limiting decoding performance. Therefore, improving the decoding performance of CRC technology has become an urgent problem to be solved. Summary of the Invention

[0005] This application provides a communication method and apparatus that can reduce the number of low-similarity codewords after CRC precoding and improve the decoding performance under CRC technology.

[0006] Firstly, this application provides a communication method that can be executed by a transmitting device. Unless otherwise specified, "transmitting device" in this application can refer to the transmitting device itself, a component within the transmitting device (e.g., a processor, chip, or chip system), or a logic module or software capable of implementing all or part of the functions of the transmitting device. The method includes: the transmitting device determining a CRC sequence based on a first sequence and a first polynomial; and precoding an information bit sequence based on the CRC sequence. The first sequence is obtained by inserting Y zeros at every X positions in the information bit sequence; the first polynomial is determined based on the first sequence; X is less than the length A of the information bit sequence; and Y is a positive integer.

[0007] Based on the method described in the first aspect, by inserting Y zeros at every X positions in the information bit sequence, the original structure of low-similarity codewords that can pass CRC check is destroyed, the number of low-similarity codewords after CRC precoding is reduced, thereby improving the ability of CRC technology to reduce low-similarity codewords and improving decoding performance.

[0008] Secondly, this application provides a communication method that can be executed by a transmitting device. Unless otherwise specified, "transmitting device" in this application can refer to the transmitting device itself, a component within the transmitting device (e.g., a processor, chip, or chip system), or a logic module or software capable of implementing all or part of the functions of the transmitting device. The method includes: the transmitting device determining a CRC sequence based on a first sequence and a first polynomial; and precoding an information bit sequence based on the CRC sequence. The first sequence is obtained by inserting Y zeros at every X positions in the information bit sequence, and the first polynomial is determined based on the first sequence, where X is a positive integer and Y is a positive integer.

[0009] The difference between the method described in the first aspect and the method described in the second aspect is that X in the method described in the second aspect can be any value. For example, X can be a value less than the length A of the information bit sequence, or X can be unrelated to the length A of the information bit sequence, i.e., X is a preset value. Based on the method described in the second aspect, by inserting Y zeros at every X positions in the information bit sequence, the structure of the original low-similarity codewords that can pass CRC check is disrupted, reducing the number of low-similarity codewords after CRC precoding. This improves the ability of CRC technology to reduce low-similarity codewords and enhances decoding performance.

[0010] Combining the first and second aspects, in one possible design, the first value B is equal to the ratio of A to X rounded down, or the first value B is equal to the ratio of A to X minus 1; where B is the number of bits in the first set included in the first sequence, and the first set of bits includes Y zeros.

[0011] Based on this possible design, the number B of the first bit set included in the first sequence is obtained under the technical solution of inserting Y zeros at every X positions of the information bit sequence and not inserting Y zeros at the end, so as to adjust the polynomial used to determine the CRC sequence based on B.

[0012] In combination with the first and second aspects, in one possible design, the method based on the first aspect and the method based on the second aspect further include: inserting Y zeros at the end of the information bit sequence.

[0013] Based on this possible design, Y additional 0s are inserted at the end of the bit sequence, further disrupting the original structure of low-similarity codewords that can pass CRC check, thus better improving the ability of CRC technology to reduce low-similarity codewords and decoding performance.

[0014] Combining the first and second aspects, in one possible design, the first value B is equal to the floor of the ratio of A to X; or the first value B is equal to the ratio of A to X; where B is the number of bits in the first set of bits included in the first sequence, and the first set of bits includes Y zeros.

[0015] Based on this possible design, to accurately obtain the number B of the first bit set included in the first sequence under the technical solution of inserting Y zeros at every X positions in the information bit sequence and inserting Y zeros at the end, the polynomial used to determine the CRC sequence is adjusted based on B. Combining the first and second aspects, in one possible design, the first polynomial is determined according to the first sequence, including: the first polynomial is determined based on the information bit sequence, A, the length L, X, Y of the CRC sequence, and a first value B; wherein B is the number of the first bit set included in the first sequence, and the first bit set includes the Y zeros.

[0016] Based on this possible design, since the information bit sequence is padded with zeros, the polynomial used to determine the CRC sequence needs to be adjusted accordingly. Specifically, the first polynomial can be obtained based on the information bit sequence, A, the length of the CRC sequence L, X, Y, and B, thereby improving the accuracy of the CRC sequence. Combining the first and second aspects, in one possible design, the degree of the i-th monomial in the first polynomial is obtained from B, Y, A, and L; where i = [0, 1, ..., A⁻¹ + B*Y], and the degree of the 0th monomial is the degree of the first polynomial.

[0017] Based on this possible design, since the information bit sequence is inserted with zeros, the degrees of the first A+B*Y monomials in the polynomial used to determine the CRC sequence need to be adjusted accordingly. That is, the degrees of the first A+B*Y monomials in the first polynomial can be accurately obtained based on the number B of the first bit set inserted in the information bit sequence, the number Y of zeros in the first bit set, the length A of the information bit sequence, and the length L of the CRC polynomial, thereby improving the accuracy of the CRC sequence.

[0018] Combining the first and second aspects, in one possible design, the coefficient of the i-th monomial is obtained from the i-th bit of the first sequence. Based on this possible design, since a 0-insertion operation is performed on the information bit sequence, the coefficients of the first A+B*Y monomials in the polynomial used to determine the CRC sequence need to be adjusted accordingly. That is, the coefficients of the first A+B*Y monomials in the first polynomial can be accurately obtained from the first sequence obtained by inserting Y zeros at every X positions of the information bit sequence, thereby accurately obtaining the CRC sequence corresponding to the information bit sequence.

[0019] Combining the first and second aspects, in one possible design, the number of monomials in the first polynomial is A + L + B*Y. Based on this possible design, since a 0-insertion operation is performed on the information bit sequence, the polynomial used to determine the CRC sequence needs to be adjusted accordingly. That is, the number of monomials in the first polynomial can be obtained based on the length A of the information bit sequence, the lengths L, B, and Y of the CRC polynomial. Here, B*Y equals the total number of 0s inserted into the information bit sequence.

[0020] Combining the first and second aspects, in one possible design, the first polynomial is:

[0021] Where a0, a1, ..., a A-1 The information bit sequence includes information bits, p0, p1, ..., p L-1 These are the CRC bits in the CRC sequence.

[0022] Based on this possible design, a specific implementation for determining the first polynomial is given, so that the transmitting device can accurately obtain the first polynomial based on the parameters in the first polynomial.

[0023] Combining the first and second aspects, in one possible design, determining the CRC sequence based on the first sequence and the first polynomial includes: determining the CRC sequence by dividing the CRC polynomial by the first polynomial substituted into the first sequence.

[0024] Thirdly, this application provides a communication method that can be executed by a receiving device. Unless otherwise specified, "receiving device" in this application can refer to the receiving device itself, a component within the receiving device (e.g., a processor, chip, or chip system), or a logic module or software capable of implementing all or part of the functions of the receiving device. The method includes: the receiving device acquiring a sequence to be verified, and performing CRC verification based on a second sequence and a second polynomial; wherein the second sequence is obtained by inserting Y zeros at every X positions in the first Z minus L positions of the sequence to be verified; X is less than the difference between the length Z of the sequence to be verified and the length L of the CRC sequence; Y is a positive integer; and the second polynomial is determined based on the second sequence.

[0025] Based on the method described in the third aspect, the receiving device inserts Y zeros at every X positions in the first Z minus L positions of the sequence to be checked, thereby disrupting the original structure of low-similarity codewords that can pass CRC check, reducing the number of low-similarity codewords after CRC precoding, and improving the ability of CRC technology to reduce low-similarity codewords and the decoding performance.

[0026] Fourthly, this application provides a communication method that can be executed by a receiving device. Unless otherwise specified, "receiving device" in this application can refer to the receiving device itself, a component within the receiving device (e.g., a processor, chip, or chip system), or a logic module or software capable of implementing all or part of the functions of the receiving device. The method includes: the receiving device acquiring a sequence to be verified, and performing CRC verification based on a second sequence and a second polynomial; wherein the second sequence is obtained by inserting Y zeros at every X positions in the sequence to be verified; and the second polynomial is determined based on the second sequence.

[0027] The difference between the method described in the third aspect and the method described in the fourth aspect is that X in the method described in the fourth aspect can be any value. For example, X can be a value less than Z-L, or X can be a preset value that has no relation to the length Z of the sequence to be checked. Based on the method described in the fourth aspect, the receiving device inserts Y zeros at every X positions in the first Z-L positions of the sequence to be checked, thereby disrupting the original structure of low-similarity codewords that can pass CRC check, reducing the number of low-similarity codewords after CRC precoding, and improving the ability of CRC technology to reduce low-similarity codewords, thus improving decoding performance.

[0028] Combining the third and fourth aspects, in one possible design, the first value B is equal to the ratio of the difference between Z and L (i.e., the value of Z-L) to X, rounded down; or, the first value B is equal to the ratio of the difference between Z and L to X minus 1; where B is the number of bits in the first bit set included in the second sequence, and the first bit set includes Y zeros.

[0029] Based on this possible design, the number of bits in the first bit set of the second sequence is obtained under the technical solution of inserting Y zeros at every X positions in the first Z minus L positions of the sequence to be checked, and not inserting Y zeros at the position immediately following the Z minus L position, so as to adjust the polynomial used for CRC check based on B.

[0030] In combination with the third and fourth aspects, one possible design, based on the method of the third aspect or the method of the fourth aspect, further includes: inserting Y zeros immediately following the Z-L position of the sequence to be verified.

[0031] Based on this possible design, Y zeros are inserted immediately after the Z-L position of the sequence to be checked, further disrupting the original structure of low-similarity codewords that can pass CRC check, thus better improving the ability of CRC technology to reduce low-similarity codewords and decoding performance.

[0032] Combining the third and fourth aspects, in one possible design, the first value B is equal to the floor of the ratio of the difference between Z and L to X; or the first value B is equal to the ratio of the difference between Z and L to X; where B is the number of bits in the first bit set included in the second sequence, and the first bit set includes Y zeros.

[0033] Based on this possible design, to accurately obtain the number of the first bit set included in the second sequence under the technical solution of inserting Y zeros at every X positions in the first Z-L positions of the sequence to be checked, and inserting Y zeros immediately following the Z-Lth position of the sequence to be checked, the polynomial used for CRC check is adjusted based on B. Combining the third and fourth aspects, in one possible design, the second polynomial is determined according to the second sequence, including: the second polynomial is determined based on the sequence to be checked, Z, L, X, Y, and a first value B; where B is the number of the first bit set included in the second sequence, and the first bit set includes Y zeros.

[0034] Based on this possible design, since the sequence to be checked is subjected to a 0-insertion operation, the polynomial used for CRC check needs to be adjusted accordingly. That is, a second polynomial can be obtained based on the sequence to be checked, Z, the lengths L, X, Y of the CRC sequence, and B, thereby improving the accuracy of CRC check.

[0035] Combining the third and fourth aspects, in one possible design, the degree of the i-th monomial in the second polynomial is obtained from B, Y, Z, and L; where i = [0, 1, ..., ZL-1 + B*Y], and the degree of the 0th monomial is the degree of the second polynomial.

[0036] Based on this possible design, since the sequence to be checked is subjected to a 0-insertion operation, the first Z-L+B*Y monomials in the polynomial used for CRC check need to be adjusted accordingly. That is, based on the number B of the first bit set inserted in the first Z-L positions of the sequence to be checked, the number Y of 0s in the first bit set, the length Z of the sequence to be checked, and the length L of the CRC polynomial, the exponent of the first Z-L+B*Y monomials in the second polynomial can be accurately obtained, thereby improving the accuracy of CRC check.

[0037] Combining the third and fourth aspects, in one possible design, the coefficient of the i-th monomial is obtained from the i-th bit of the second sequence. Based on this possible design, since a zero-insertion operation is performed on the sequence to be checked, the coefficients of the first Z-L+B*Y monomials in the polynomial used for CRC verification need to be adjusted accordingly. Specifically, the coefficients of the first Z-L+B*Y monomials in the second polynomial can be accurately obtained based on the number B of the first bit set inserted in the first Z-L positions of the sequence to be checked, the number Y of zeros in the first bit set, the length Z of the sequence to be checked, and the length L of the CRC polynomial, thereby improving the accuracy of CRC verification.

[0038] Combining the third and fourth aspects, in one possible design, the number of monomials in the second polynomial is Z + B*Y. Based on this possible design, since a zero-insertion operation is performed on the sequence to be checked, the polynomial used for CRC verification needs to be adjusted accordingly. That is, the number of monomials in the second polynomial can be obtained based on the lengths Z, B, and Y of the sequence to be checked. Here, B*Y equals the total number of zeros inserted into the sequence to be checked.

[0039] Combining the third and fourth aspects, in one possible design, the second polynomial is:

[0040] Where b0, b1, ..., b Z-1 The sequence to be verified contains information bits.

[0041] Based on this possible design, a specific implementation for determining the second polynomial is given, so that the receiving device can accurately obtain the second polynomial based on the parameters in the second polynomial.

[0042] Combining the third and fourth aspects, one possible design involves performing CRC verification based on the second sequence and the second polynomial, including dividing the CRC polynomial by the second polynomial substituted into the second sequence to obtain the verification result.

[0043] Combining aspects one through four, in one possible design, X is a positive integer; or X is obtained from L. Based on this possible design, several feasible schemes are provided for determining the position of inserting 0 in the information bit sequence or the sequence to be checked.

[0044] Combining aspects one through four, one possible design involves X being an integer power of 2. Based on this design, the positions where 0s are inserted into the information bit sequence or the sequence to be checked can be integer powers of 2, adhering to the characteristics of the binary system to ensure data integrity and alignment.

[0045] Combining aspects one through four, in one possible design, X is 2. L-1 Based on this possible design, the position of inserting 0 in the information bit sequence or the sequence to be checked can be determined according to the length L of the CRC polynomial, so as to destroy the structure of low-similarity codewords that can pass CRC checks under different CRC polynomials and control the complexity of CRC encoding and checking.

[0046] Combining aspects one through four, in one possible design, Y is a positive integer; or Y is obtained from L; or Y is a prime number. Based on this possible design, several feasible schemes are provided to determine the number of 0s inserted at every X positions in the information bit sequence or the sequence to be verified.

[0047] Combining aspects one through four, in one possible design, Y is the largest prime number less than or equal to the second value; the second value is determined by X. Based on this possible design, compared to inserting composite zeros at every X positions in the information bit sequence (or at every X positions in the first Z minus L positions of the sequence to be checked), inserting prime zeros at every X positions in the information bit sequence (or at every X positions in the first Z minus L positions of the sequence to be checked) can more effectively disrupt the original low-similarity codeword structure of the polar code and better improve decoding performance.

[0048] Fifthly, embodiments of this application provide a communication device that can be applied to the transmitting device described in the first aspect to realize the functions performed by the transmitting device. The communication device can be the transmitting device itself, or it can be a chip, chip system, or system-on-a-chip of the transmitting device, etc. The communication device can execute the functions performed by the transmitting device through hardware, or it can execute corresponding software through hardware. The hardware or software includes one or more modules corresponding to the above functions. For example, a processing module. The processing module can independently complete the following processing operations, or it can cooperate with a transceiver module to complete the following processing operations; there is no limitation.

[0049] For example, the processing module is configured to determine a CRC sequence based on a first sequence and a first polynomial; and pre-encode an information bit sequence based on the CRC sequence. The first sequence is obtained by inserting Y zeros at every X positions in the information bit sequence; X is less than the length A of the information bit sequence; Y is a positive integer; and the first polynomial is determined based on the first sequence.

[0050] Optionally, the communication device in the fifth aspect may also include a transceiver module, for example, a transceiver module for transmitting the processing results of the processing module.

[0051] Optionally, the processing module of the communication device in the fifth aspect may also perform the corresponding functions in the first aspect or any possible design of the first aspect, as detailed in the method examples, and the beneficial effects that can be achieved can also be found in the foregoing related content.

[0052] Sixthly, embodiments of this application provide a communication device that can be applied to the receiving device described in the third aspect to achieve the functions performed by the receiving device. The communication device can be the receiving device itself, or it can be a chip, chip system, or system-on-a-chip of the receiving device. The communication device can execute the functions performed by the receiving device through hardware, or it can execute corresponding software through hardware. The hardware or software includes one or more modules corresponding to the above functions. For example, a processing module. The processing module can independently complete the following processing operations, or it can cooperate with a transceiver module to complete the following processing operations; there is no limitation.

[0053] For example, the processing module is used to obtain the sequence to be verified; perform CRC verification according to the second sequence and the second polynomial; wherein, the second sequence is obtained by inserting Y zeros into every X positions in the first Z minus L positions of the sequence to be verified; X is less than the difference between the length Z of the sequence to be verified and the length L of the CRC sequence; Y is a positive integer; the second polynomial is determined according to the second sequence.

[0054] Optionally, the communication device in the sixth aspect may further include a transceiver module, for example, which is used to transmit the processing results of the processing module.

[0055] Optionally, the processing module of the communication device in the sixth aspect may also perform the corresponding functions in the third aspect or any possible design of the third aspect, as detailed in the method examples, and the beneficial effects that can be achieved can also be found in the foregoing related content.

[0056] In a seventh aspect, embodiments of this application provide a communication device, the communication device including one or more processors; the one or more processors are configured to run computer programs or instructions, such that when the one or more processors execute the computer instructions or instructions, the communication method described in any one of the first to fourth aspects is executed.

[0057] In one possible design, the communication device further includes one or more memories coupled to one or more processors, the memories used to store the aforementioned computer programs or instructions. In one possible implementation, the memories are located outside the communication device. In another possible implementation, the memories are located inside the communication device. In embodiments of this application, the processor and memory may also be integrated into a single device, i.e., the processor and memory may be integrated together. In one possible implementation, the communication device further includes a transceiver for receiving and / or transmitting information.

[0058] In one possible design, the communication device further includes one or more communication interfaces coupled to one or more processors, and the communication interfaces are used to communicate with other modules outside the communication device.

[0059] Eighthly, embodiments of this application provide a communication device, which includes an interface circuit and a logic circuit; the interface circuit is used to input and / or output information; the logic circuit is used to perform the communication method as described in any one of the first to fourth aspects, and to process and / or generate information based on the information.

[0060] In a ninth aspect, embodiments of this application provide a computer-readable storage medium storing computer instructions or programs that, when executed on a computer, cause the communication method described in any one of the first to fourth aspects to be performed.

[0061] In a tenth aspect, embodiments of this application provide a computer program product containing computer instructions that, when run on a computer, causes the communication method described in any one of the first to fourth aspects to be executed.

[0062] Eleventhly, embodiments of this application provide a computer program that, when run on a computer, causes the communication method described in any one of the first to fourth aspects to be executed.

[0063] In a twelfth aspect, embodiments of this application provide a chip, including: a processor coupled to a memory for storing programs or instructions, wherein when the program or instructions are executed by the processor, a communication method as described in any one of the first to fourth aspects is executed.

[0064] The technical effects of any of the design methods in aspects five through twelfth are similar to those in aspects one through four above, and will not be elaborated upon further.

[0065] In a thirteenth aspect, embodiments of this application provide a communication system that may include communication means for performing the communication described in the first aspect or any possible design of the first aspect, and / or communication means for performing the communication described in the third aspect or any possible design of the third aspect; or the communication system may include communication means for performing the communication described in the second aspect or any possible design of the second aspect, and / or communication means for performing the communication described in the fourth aspect or any possible design of the fourth aspect. Attached Figure Description

[0066] Figure 1 is a schematic diagram of a signal transmission process provided in an embodiment of this application;

[0067] Figure 2 is a schematic diagram illustrating the working principle of a polar code provided in an embodiment of this application;

[0068] Figure 3 is a schematic diagram illustrating the working principle of successive cancellation decoding provided in an embodiment of this application;

[0069] Figure 4 is a schematic diagram showing the change of the proportion R of low-similarity codewords that can pass the CRC sequence check of length 6 under different information bit numbers A according to the embodiments of this application.

[0070] Figure 5 is a schematic diagram of a communication system provided in an embodiment of this application;

[0071] Figure 6 is a schematic diagram of the structure of a communication device provided in an embodiment of this application;

[0072] Figure 7 is a flowchart illustrating a communication method provided in an embodiment of this application;

[0073] Figure 8 is a schematic diagram showing the change of the proportion R of low-similarity codewords that can pass the CRC sequence check of length 6 under another different number of information bits A provided in the embodiments of this application;

[0074] Figure 9 is a schematic diagram of a process for obtaining an encoded sequence according to an embodiment of this application;

[0075] Figure 10 is a flowchart illustrating another communication method provided in an embodiment of this application;

[0076] Figure 11 is a schematic diagram of a code spectrum provided in an embodiment of this application;

[0077] Figure 12 is a schematic diagram of another code spectrum provided in an embodiment of this application;

[0078] Figure 13 is a schematic diagram of another code spectrum provided in an embodiment of this application;

[0079] Figure 14 is a schematic diagram of another code spectrum provided in an embodiment of this application;

[0080] Figure 15 is a schematic diagram of another communication device provided in an embodiment of this application;

[0081] Figure 16 is a schematic diagram of the structure of a transmitting device provided in an embodiment of this application;

[0082] Figure 17 is a schematic diagram of the structure of a receiving device provided in an embodiment of this application;

[0083] Figure 18 is a schematic diagram of the structure of another communication device provided in an embodiment of this application. Detailed Implementation

[0084] Before introducing the embodiments of this application, some technical terms involved in the embodiments of this application will be explained. It should be noted that the following explanations are for the purpose of making the embodiments of this application easier to understand, and should not be regarded as a limitation on the scope of protection claimed by the embodiments of this application.

[0085] 1. Signal transmission:

[0086] In a communication system, as shown in Figure 1, the information sent by the source can be transformed into a signal through processes such as source coding, channel coding, and modulation. After being transmitted through the channel, the sink receives the signal. The signal then undergoes demodulation, channel decoding, and source recovery to become information, thus enabling signal transmission between the sink and the source.

[0087] Among them, channel coding schemes (or channel coding types) mainly include: convolutional codes (such as tail biting convolutional coding (TBCC)), low density parity check (LDPC) codes, and polar codes (or simply Polar codes), etc.

[0088] 2. Polar code:

[0089] Polar codes are the first channel coding type that can be rigorously proven to "achieve" Shannon channel capacity, featuring good error correction performance and low decoding complexity. They have been selected by the Third Generation Partnership Project (3GPP) as the channel coding type for the uplink / downlink control channels in the enhanced mobile broadband (eMBB) scenario of 5G mobile communication systems.

[0090] In the channel coding scheme of Polar codes, bit positions can be divided into frozen bit positions (or fixed bit positions) and information bit positions based on the reliability of each bit's location in the bit sequence. The positions of bits with lower reliability are the frozen bit positions, which can be used to carry frozen bits (or fixed bits). These frozen bits are typically set to 0 and are known to both the sending and receiving ends during actual transmission. The positions of bits with higher reliability are the information bit positions, which can be used to carry information bits (data) during actual transmission.

[0091] For example, as shown in Figure 2, a typical Polar code encoding diagram with a length of 8 is provided. The positions of the bits with higher reliability (such as u7, u6, u5, u3) can be set as the positions of the information bits, carrying information bits 0 or 1; the positions of the bits with lower reliability (such as u4, u2, u1, u0) can be set as the positions of the frozen bits, carrying frozen bits 0.

[0092] The reliability of the position of each bit in the bit sequence is determined by a reliability sequence of the same length as the bit sequence; that is, the reliability sequence can be used to indicate the reliability corresponding to the position of each bit in the bit sequence. The larger the reliability value, the more reliable the position corresponding to that reliability.

[0093] The encoding process of the Polar code shown in Figure 2 can include several polarization kernel operations (the polarization kernel is the part included by the dashed line in Figure 2). The polarization kernel ANDs the two input bits with... Multiplying them yields two output bits. It can be seen that the Polar code is constructed recursively; an 8-length Polar code can be seen as the result of coupling two 4-length Polar codes, and a 4-length Polar code can be seen as the result of coupling two 2-length Polar codes.

[0094] For example, the reliability sequence can be predefined by the protocol. Thus, the transmitting device can select a reliability sequence of the same length as the bit sequence from one or more predefined reliability sequences.

[0095] Polar code decoding: Mainstream Polar code decoding methods can be divided into two categories according to their decoding timing: sequential decoding and non-sequential decoding. For sequential decoding, the main Polar code sequential decoding algorithms include: successive cancellation (SC) decoding, successive cancellation list (SCL) decoding, etc.

[0096] For SC decoding, when decoding Polar codes using the SC decoding algorithm, the log-likelihood ratio (LLR) of the information bits can be calculated step by step. For an information bit, if LLR > 0, the information bit is determined to be 0; if LLR < 0, the information bit is determined to be 1. For frozen bits, the frozen bit is set to 0 regardless of the LLR value. For example, Figure 3 provides a simple schematic diagram of SC decoding. Figure 3 has 8 calculation nodes, including 4 f nodes and 4 g nodes. The calculation of the f node requires two LLR inputs on its right side, and the calculation of the g node requires two LLR inputs on its right side and one "partial sum" input above it. Note that the output can only be calculated after the input items are calculated. According to the above rules, starting from the received signal on the right side, the 8 nodes are calculated sequentially, resulting in the decoding sequence ①→②→③→④, which is the SC decoding process.

[0097] 3. CRC encoding:

[0098] CRC encoding is an error detection method widely used in data communication and storage. CRC encoding detects errors during data transmission or storage by appending one or more CRC sequences to the data (or information bit sequence).

[0099] In one example, the CRC sequence can be obtained using the CRC polynomial and the polynomial a0D as shown in Equation 1. A+L-1 +a1D A+L-2 +...+a A-1 D L +p0D L-1 +p1D L-2 +...+p L-2 D 1 +p L-1 (Formula 1) yields the result. Specifically, when this polynomial is divided by the CRC polynomial, the remainder is 0. The coefficients of this polynomial are a0, a1, ..., a... A-1These are the bits in the information bit sequence, which are known parameters. The degree of the polynomial A+L-1 is the length of the information bit sequence A plus the degree of the CRC polynomial L minus 1, which is also a known parameter. The coefficients of the polynomial are p0, p1, ..., p... L-1 These are the bits in the CRC sequence, and are unknown parameters; therefore, dividing the CRC polynomial by this polynomial yields the CRC sequence. Further, the CRC-encoded bit sequence b0, b1, b2, b3, ..., b... is obtained. A+L-1 The k-th bit b in the CRC-encoded bit sequence k equals a k or p k-A When k = 0, 1, 2, ..., A-1, the k-th bit b in the CRC-encoded bit sequence k equals a k When k = A, A+1, A+2, ..., A+L-1, the k-th bit b in the CRC-encoded bit sequence k equals p k-A .

[0100] CRC technology can effectively reduce the number of low-similarity codewords in an encoded sequence. Specifically, for a CRC sequence of length L, the low-similarity codewords that pass the CRC check account for 2 / 3 of all low-similarity codewords. -L However, in many cases, the proportion of low-similarity codewords that can pass the CRC sequence check of length L will be greater than 2. -L Especially when the information bit sequence has a long code length and the CRC sequence length L is small, the proportion of low-similarity codewords that can pass the CRC sequence check of length L is greater than 2. -L The more pronounced the phenomenon, the less effective CRC technology becomes at reducing low-similarity codewords, thus limiting decoding performance.

[0101] For example, with a code length N = 1024, the CRC polynomial is g. CRC6 (D)=[D 6 +D 5 In the case of +1], using the CRC technique based on formula (1), the proportion R of low-similarity codewords that can pass the CRC sequence check of length 6 is obtained under different information bit numbers A. The distribution of R under different K can be seen in Figure 4 below. Figure 4 is a schematic diagram of the change of the proportion R of low-similarity codewords that can pass the CRC sequence check of length 6 under different information bit numbers A provided in the embodiment of this application. As shown in Figure 4, the proportion of low-similarity codewords that can pass the CRC sequence check of length 6 is greater than 2. -6The phenomenon of R ≈ 0.0156 (as shown by the dotted line in Figure 4) is obvious, indicating a decrease in the ability of CRC technology to reduce low-similarity codewords and limiting decoding performance. Furthermore, in Figure 4, the difference between R and 0.0156 is large for each information bit count A when R is greater than 0.0156. For example, the difference between R and 0.0156 is approximately 0.05 for K = 460 and approximately 0.09 for K = 485. This indicates a larger number of low-similarity codewords that can pass the CRC sequence check with a length of 6, further illustrating the decreased ability of CRC technology to reduce low-similarity codewords and limiting decoding performance.

[0102] Therefore, to improve the decoding performance under CRC technology, this application provides a communication method, which may include: a transmitting device (or a transmitter, or a source) determines a CRC sequence according to a first sequence and a first polynomial, and pre-encodes an information bit sequence according to the CRC sequence; wherein the first polynomial is determined according to the first sequence, and the first sequence is obtained by inserting Y zeros at every X positions of the information bit sequence; X is less than the length A of the information bit sequence, and Y is a positive integer.

[0103] Optionally, embodiments of this application provide another communication method, which may include: a receiving device (or receiver, or sink) acquiring a sequence to be verified, and performing CRC verification according to a second sequence and a second polynomial; wherein, the second sequence is obtained by inserting Y zeros into every X positions in the first ZL positions of the sequence to be verified; X is less than the difference between the length Z of the sequence to be verified and the length L of the CRC sequence; Y is a positive integer, and the second polynomial is determined according to the second sequence.

[0104] In this way, by inserting Y zeros at every X positions of the A bits in the information bit sequence, or by inserting Y zeros at every X positions in the first Z-L positions of the sequence to be checked, the structure of the original low-similarity codewords that can pass the CRC check is destroyed, the number of low-similarity codewords after CRC precoding is reduced, and the ability of CRC technology to reduce low-similarity codewords is improved, thus improving the decoding performance.

[0105] The embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0106] The communication method provided in this application embodiment can be used in any communication system, such as a 3GPP communication system, for example, a long term evolution (LTE) system, or a 5G mobile communication system, a hybrid LTE and 5G network system, a new radio (NR) system, a vehicle-to-everything (V2X) system, a device-to-device (D2D) communication system, a machine-to-machine (M2M) communication system, an Internet of Things (IoT) system, a narrow band Internet of Things (NB-IoT) system, a global system for mobile communications (GSM), an enhanced data rate for GSM evolution (EDGE) system, a wideband code division multiple access (WCDMA) system, a code division multiple access (CDMA2000) system, or a time division-synchronization code division multiple access (TDMA) system. Access, TD-SCDMA, enhanced mobile broadband (eMBB), ultra-reliable and low-latency communication (URLLC), enhanced machine-type communication (eMTC), and various types of future communication systems are not restricted. Non-terrestrial network (NTN) systems (such as satellite communication systems) and non-3GPP communication systems are also included.

[0107] The communication method provided in this application can be applied to various communication scenarios. For example, it can be applied to one or more of the following communication scenarios: coding of control channels, coding of data channels, etc., without limitation.

[0108] The communication system provided in the embodiments of this application will be described below using Figure 5 as an example.

[0109] Figure 5 is a schematic diagram of a communication system provided in an embodiment of this application. As shown in Figure 5, the communication system may include at least one terminal device and at least one network device.

[0110] In Figure 5, the terminal device can be located within the beam / cell coverage area of ​​the network device, and the network device can provide communication services to the terminal device. For example, the network device can use channel coding to encode downlink data and then transmit it to the terminal device via air interface after constellation modulation (i.e., the network device is the transmitting device, and the terminal device is the receiving device); the terminal device can also use channel coding to encode uplink data and then transmit it to the network device via air interface after constellation modulation (i.e., the terminal device is the transmitting device, and the network device is the receiving device). It is understood that when network devices communicate with each other, or when terminal devices communicate with each other, communication can also be based on channel coding; that is, the transmitting and receiving devices can both be network devices or both be terminal devices, without restriction.

[0111] The terminal device in Figure 5 can be a device with wireless transceiver capabilities or a chip or chip system that can be installed on the device. It allows users to access the network and is used to provide voice and / or data connectivity to users. The terminal device can also be called user equipment (UE), subscriber unit, terminal, mobile station (MS), or mobile terminal (MT), etc.

[0112] For example, the terminal device in Figure 5 can be a mobile phone, a tablet computer, or a computer with wireless transceiver capabilities. Terminal equipment can also be user stations, mobile stations, remote stations, remote terminal equipment, mobile terminal equipment, user terminal equipment, wireless communication equipment, user agents, user devices, cellular phones, cordless phones, session initiation protocol (SIP) phones, wireless local loop (WLL) stations, personal digital assistants (PDAs), handheld devices with wireless communication capabilities, computing devices, processing devices connected to wireless modems, in-vehicle equipment, wearable devices, terminal equipment in the Internet of Things (IoT), home appliances, virtual reality (VR) terminals, augmented reality (AR) terminals, wireless terminals in industrial control, wireless terminals in autonomous driving, wireless terminals in telemedicine, wireless terminals in smart grids, wireless terminals in smart cities, wireless terminals in smart homes, vehicles with vehicle-to-vehicle (V2V) communication capabilities, intelligent connected vehicles, and UAV-to-UAV communication. Unmanned aerial vehicles (UAVs) with U2U communication capabilities, terminal devices in future networks, or terminal devices in future evolved public land mobile networks (PLMNs) are not subject to restrictions.

[0113] In Figure 5, the network device can be any device deployed in the access network capable of wireless communication with terminal devices. It can also be a chip or chip system that can be configured within such a device, a logical node or module, or a function implemented in software. Its main responsibilities include air interface-side wireless physical control, resource scheduling, wireless resource management, quality of service management, data compression and encryption, wireless access control, and mobility management. Specifically, the network device can be either a wired access device or a wireless access device.

[0114] For example, a network device can consist of one or more access network (AN) / radio access network (RAN) nodes. AN / RAN nodes can be various types of base stations, such as: satellite base stations, evolved Node Bs (gNBs), transmission reception points (TRPs), evolved Node Bs (eNBs), radio network controllers (RNCs), Node Bs (NBs), base station controllers (BSCs), base transceiver stations (BTSs), home base stations (e.g., home evolved Node Bs, or home Node Bs (HNBs), macro base stations, micro base stations, pico base stations, small cells, relay stations, balloon stations, drone stations, wireless backhaul nodes, base band units (BBUs), or wireless fidelity (Wi-Fi) access points (APs), etc. It is understood that network devices can be terrestrial devices or non-terrestrial devices (such as satellites, drones, high-altitude communication equipment, etc.). Furthermore, in communication systems employing different wireless access technologies, the names of network devices with base station functions may differ, and this application does not impose any restrictions on this.

[0115] In another example, the network equipment may include a BBU and a remote radio unit (RRU). The BBU and RRU can be located in different places; for example, the RRU can be moved remotely to a high-traffic area, while the BBU is located in the central equipment room. The BBU and RRU can also be located in the same equipment room. The BBU and RRU can also be different components under the same rack.

[0116] In another example, the network device can be a device that includes centralized unit (CU) nodes, distributed unit (DU) nodes, or both CU and DU nodes. For instance, the network device can be logically divided into CUs and DUs, with some protocol layer functions centrally controlled by the CU, and the remaining partial or complete protocol layer functions distributed in the DU, which is centrally controlled by the CU. The CU and DU can be separate entities or included in the same network element, such as a BBU. Furthermore, the centralized unit (CU) can be further divided into a control plane (CU-CP) and a user plane (CU-UP).

[0117] In another example, the network device may also be a device that includes a radio unit (RU), or a device that includes a CU, a DU, and a RU. The RU may be included in a radio frequency device or radio frequency unit, such as an RRU, an active antenna unit (AAU), or a remote radio head (RRH).

[0118] It is understood that CU (or CU-CP and CU-UP), DU, or RU may have different names in different systems, but those skilled in the art will understand their meaning. For example, in an open radio access network (O-RAN) system, CU can also be called O-CU (open CU), DU can also be called O-DU, CU-CP can also be called O-CU-CP, CU-UP can also be called O-CU-UP, and RU can also be called O-RU. For ease of description, this application uses CU, CU-CP, CU-UP, DU, and RU as examples. Any of the units among CU (or CU-CP, CU-UP), DU, and RU in this application can be implemented through software modules, hardware modules, or a combination of software modules and hardware modules.

[0119] Based on the above description of the terminal device and network device, optionally, the communication method provided in the embodiments of this application can be implemented by the aforementioned terminal device or network device, or by components of the terminal device or network device, such as by application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or software (such as program code in memory) deployed in the terminal device or network device, without limitation.

[0120] Optionally, in this embodiment of the application, the transmitting device (or transmitting device, information source) and the receiving device (or receiving device, information sink) can perform channel transmission using the process shown in Figure 1 above. The transmitting device can be any terminal device or network device in the communication system shown in Figure 5, and the receiving device can also be any terminal device or network device in the communication system shown in Figure 5.

[0121] In specific implementations, as shown in Figure 5, both terminal devices and network devices can adopt the composition structure shown in Figure 6, or include the components shown in Figure 6. Figure 6 is a schematic diagram of the composition of a communication device 600 provided in an embodiment of this application. The communication device 600 can be a terminal device or a chip or system-on-a-chip in a terminal device; it can also be a network device or a chip or system-on-a-chip in a network device. As shown in Figure 6, the communication device 600 includes a processor 601, a transceiver 602, and a communication line 603.

[0122] Furthermore, the communication device 600 may also include a memory 604. The processor 601, memory 604, and transceiver 602 can be connected via a communication line 603.

[0123] The processor 601 can be a central processing unit (CPU), a network processor (NP), a digital signal processor (DSP), a microprocessor, a microcontroller, a programmable logic device (PLD), or any combination thereof. The processor 601 can also be other devices with processing capabilities, such as circuits, devices, or software modules, without limitation.

[0124] Transceiver 602 is used to communicate with other devices or other communication networks. These other communication networks can be Ethernet, radio access network (RAN), wireless local area network (WLAN), etc. Transceiver 602 can be a module, circuit, transceiver, or any device capable of enabling communication.

[0125] Communication line 603 is used to transmit information between the components included in communication device 600.

[0126] Memory 604 is used to store instructions. These instructions can be computer programs.

[0127] The memory 604 can be a read-only memory (ROM) or other type of static storage device that can store static information and / or instructions; it can also be a random access memory (RAM) or other type of dynamic storage device that can store information and / or instructions; it can also be an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical discs, laser discs, optical discs, universal optical discs, Blu-ray discs, etc.), magnetic disk storage media or other magnetic storage devices, etc., without limitation.

[0128] It should be noted that the memory 604 can exist independently of the processor 601, or it can be integrated with the processor 601. The memory 604 can be used to store instructions, program code, or some data, etc. The memory 604 can be located inside or outside the communication device 600, without limitation. The processor 601 is used to execute the instructions stored in the memory 604 to implement the communication method provided in the following embodiments of this application.

[0129] In one example, processor 601 may include one or more CPUs, such as CPU0 and CPU1 in Figure 6.

[0130] As an optional implementation, the communication device 600 may include multiple processors, for example, in addition to the processor 601 in FIG. 6, it may also include a processor 607.

[0131] As an optional implementation, the communication device 600 also includes an output device 605 and an input device 606. For example, the input device 606 is a device such as a keyboard, mouse, microphone, or joystick, and the output device 605 is a device such as a display screen or speaker.

[0132] It should be noted that the communication device 600 can be a desktop computer, a portable computer, a web server, a mobile phone, a tablet computer, a wireless terminal, an embedded device, a chip system, or a device with a similar structure to that shown in Figure 6. Furthermore, the composition shown in Figure 6 does not constitute a limitation on the communication device. In addition to the components shown in Figure 6, the communication device may include more or fewer components than shown, or combine certain components, or have different component arrangements.

[0133] In this embodiment of the application, the chip system may be composed of chips or may include chips and other discrete devices.

[0134] Furthermore, the actions, terms, etc., involved in the various embodiments of this application can be referenced interchangeably without limitation. The message names or parameter names in the messages exchanged between the various devices in the embodiments of this application are merely examples, and other names may be used in specific implementations without limitation.

[0135] The communication method provided in the embodiments of this application will be described below with reference to the communication system shown in Figure 5 and Figure 7. The transmitting device can be any terminal device or network device in the communication system shown in Figure 5, and the receiving device can also be any terminal device or network device in the communication system shown in Figure 5. The transmitting or receiving device described in the following embodiments may include the components shown in Figure 6.

[0136] Figure 7 is a flowchart of a communication method provided in an embodiment of this application. As shown in Figure 7, the method may include:

[0137] S701: The transmitting device determines the CRC sequence based on the first sequence and the first polynomial.

[0138] The first sequence is obtained by inserting Y zeros at every X positions in the information bit sequence, where X is less than the length A of the information bit sequence and Y is a positive integer.

[0139] Inserting Y zeros at every X (X < A) positions in the information bit sequence can include: inserting Y zeros at every X positions in the information bit sequence, without inserting Y zeros at the end. Based on this, the first set of bits included in the first sequence has a first value B, where B equals... Each first bit set includes Y zeros. In this case, regardless of whether the information bit sequence ends at X positions, Y zeros are not inserted at the end of the information bit sequence. Optionally, B in this case can be varied in different possible designs; for example, B can be derived from... Transformed into A / X-1 or For details, please refer to the first and second possible designs below.

[0140] Alternatively, inserting Y zeros at every X (X < A) positions in the information bit sequence can also include: inserting Y zeros at every X positions in the information bit sequence, and inserting Y zeros at the end. Based on this, the first sequence can include B sets of first bits, the number of which is equal to the first value B. Each first bit set consists of Y zeros. In this case, regardless of whether the information bit sequence ends at X positions, Y zeros are inserted at the end of the information bit sequence. Optionally, B in this case can be varied in different possible designs; for example, B can be derived from... Transformed into A / X or For details, please refer to the third and fourth possible designs below.

[0141] In the first possible design, if the remainder when A is divided by X is 0 (or, as can be described, if the ratio of A to X is a positive integer), Y zeros are inserted at every X positions in the information bit sequence, but no Y zeros are inserted at the end. This can be understood as inserting A / X-1 first bit sets containing Y zeros into the information bit sequence. In this case, even if the information bit sequence ends at X positions, Y zeros do not need to be inserted at the end of the information bit sequence.

[0142] Based on this, the number B of the first bit set included in the first sequence can be determined from... Transformed into A / X-1, meaning B can be equal to the floor of the ratio of A minus 1 to X, or B can be equal to the difference between the ratio of A to X minus 1. Each first bit set includes Y zeros.

[0143] For example, taking an information bit sequence of length 4 including a0, a1, a2, a3, X is 2, Y is 1 as an example, one 0 can be inserted at every 2 positions of the information bit sequence, and no 0 is inserted at the end of the information bit sequence, so that the first sequence can be a0, a1, 0, a2, a3.

[0144] In the second possible design, if the remainder of A divided by X is not 0 (or it can be described as: if the ratio of A divided by X is not a positive integer), Y zeros are inserted at every X positions in the information bit sequence, without inserting Y zeros at the end. This can be understood as inserting zeros into the information bit sequence. The first bit set consists of Y zeros. In this case, since there are no X positions at the end of the information bit sequence, Y zeros do not need to be inserted.

[0145] Based on this, the number B of the first bit set included in the first sequence can be determined from... Transformed into That is, B can be equal to the floor of the ratio of the difference between A and 1 to X, or B can be equal to the floor of the ratio of A to X.

[0146] For example, taking an information bit sequence of length 5 including a0, a1, a2, a3, a4, X is 2, Y is 1 as an example, one 0 can be inserted at every 2 positions of the information bit sequence, and no 0 is inserted at the end of the information bit sequence, so that the first sequence can be a0, a1, 0, a2, a3, 0, a4.

[0147] In the third possible design, when the remainder of A divided by X is 0, Y zeros are inserted at every X positions in the information bit sequence, and Y zeros are inserted at the end. This can be understood as inserting A / X sets of the first bit sequence, including Y zeros, into the information bit sequence. In this case, since the end of the information bit sequence satisfies X positions, Y zeros can be inserted at the end of the information bit sequence.

[0148] Based on this, the number B of the first bit set included in the first sequence can be determined from... Transformed into A / X, meaning B can be equal to the sum of the floor of the ratio of A minus 1 to X and 1, or B can be equal to the ratio of A to X.

[0149] For example, taking an information bit sequence of length 4 including a0, a1, a2, a3, X is 2, Y is 1 as an example, a 0 can be inserted at every 2 positions of the information bit sequence, and a 0 can be inserted at the end to obtain the first sequence a0, a1, 0, a2, a3, 0.

[0150] In the fourth possible design, if the remainder of A divided by X is not 0, Y zeros are inserted at every X positions in the information bit sequence, and Y zeros are inserted at the end. This can be understood as inserting Y zeros into the information bit sequence. Given a first set of bits containing Y zeros, in this case, even if the information bit sequence does not satisfy X positions at the end, Y zeros can still be inserted at the end of the information bit sequence, i.e., Y zeros can be inserted into the information bit sequence. A first bit set consisting of Y zeros. It can also be understood as That is, the rounded-up result of the ratio of A to X.

[0151] Based on this, the number B of the first bit set included in the first sequence can be determined from... Transformed into That is, B can be equal to the sum of the ratio of A minus 1 to X, rounded down and then up by 1, or B can be equal to the ratio of A to X, rounded up.

[0152] For example, taking an information bit sequence of length 5 including a0, a1, a2, a3, a4, X is 2, Y is 1 as an example, one 0 can be inserted at every 2 positions of the information bit sequence, and one 0 can be inserted at the end, so that the first sequence can be a0, a1, 0, a2, a3, 0, a4, 0.

[0153] In this application, the value of X can be determined through negotiation between the sending and receiving devices. Alternatively, the value of X can be predefined, or it can be indicated by the network device.

[0154] Optionally, any positive integer less than A can be chosen as the value of X, based on the size of A.

[0155] Optionally, X is a positive integer, or X is derived from L. In one example, X is an integer power of 2, such as X being 2 to the power of 3. In another example, X is 2... L-1 For example, when the length L of the CRC polynomial is 6, X is 2. 5 .

[0156] Optionally, Y can be a positive integer, or Y can be derived from L, or Y can be a prime number. In one example, Y is a positive integer, such as Y = 1. In another example, Y is derived from L, such as Y being less than 2. L-1 A positive integer, optional, can be less than 2. L-1 In another example, Y is any prime number less than or equal to the second value. Optionally, Y is the largest prime number less than or equal to the second value, which can be determined based on X. For example, the second value is the ratio of X to any positive integer, such as X / 4. Y is the largest prime number less than or equal to the second value, or Y is any prime number less than or equal to the second value.

[0157] Optionally, for information bit sequences of different lengths A, X can be the same or different. Similarly, for information bit sequences of different lengths A, Y can be the same or different. In other words, for information bit sequences of different lengths A, X and Y can be all the same, all different, or partially the same.

[0158] In one example, when information bit sequences of different lengths A have the same X and Y, for an information bit sequence of length 20 (A=20, X=19, Y=2), based on the second possible design mentioned above, the first sequence is obtained by inserting two 0s at the 19th position of the information bit sequence; for an information bit sequence of length 25 (A=25, X=19, Y=2), based on the second possible design mentioned above, the first sequence is obtained by inserting two 0s at the 19th position of the information bit sequence.

[0159] In another example, when information bit sequences of different lengths A have different values ​​for X and Y, for an information bit sequence of length 20 (A = 20, X = 19, Y = 2), based on the second possible design mentioned above, the first sequence is obtained by inserting two 0s at the 19th position of the information bit sequence; for an information bit sequence of length 25 (A = 25, X = 21, Y = 1), based on the second possible design mentioned above, the first sequence is obtained by inserting one 0 at the 21st position of the information bit sequence.

[0160] In another example, when information bit sequences of different lengths A have different X values ​​but the same Y value, for an information bit sequence of length 20 (A = 20, X = 19, Y = 2), based on the second possible design mentioned above, the first sequence is obtained by inserting two 0s at the 19th position of the information bit sequence; for an information bit sequence of length 25 (A = 25, X = 21, Y = 2), based on the second possible design mentioned above, the first sequence is obtained by inserting two 0s at the 21st position of the information bit sequence.

[0161] In another example, when information bit sequences of different lengths A have the same X but different Y, for an information bit sequence of length 20 (A=20, X=19, Y=2), based on the second possible design mentioned above, the first sequence is obtained by inserting two 0s at the 19th position of the information bit sequence; for an information bit sequence of length 25 (A=25, X=19, Y=1), based on the second possible design mentioned above, the first sequence is obtained by inserting one 0 at the 19th position of the information bit sequence.

[0162] The first polynomial is determined based on the first sequence.

[0163] Optionally, the first polynomial can be determined based on the information bit sequence, the length A of the information bit sequence, the length L of the CRC polynomial, X, Y, and the first value B.

[0164] The first polynomial includes A+L+B*Y monomials, where A, L, B, and Y are described in the above description and will not be repeated here.

[0165] Optionally, the first polynomial includes A+L+B*Y monomials, which can be composed of the i-th monomial and the j-th monomial, i = [0, 1, ..., A-1+B*Y], j = [A+B*Y, A+B*Y+1, ..., A+L-1+B*Y].

[0166] In the first polynomial, the degree of the i-th monomial can be obtained from B, Y, A, L, i = [0, 1, ..., A-1 + BY], and the degree of the 0th monomial is the degree of the first polynomial.

[0167] Optionally, the degree of the i-th monomial in the first polynomial can be obtained from A + L - i - 1 + B * Y, where i = [0, 1, ..., A - 1 + B * Y]. For example, the degree of the 0th monomial in the first polynomial is A + L - 1 + B * Y, the degree of the 1st monomial in the first polynomial is A + L - 2 + B * Y, ..., and the degree of the A-1 + B * Y-th monomial in the first polynomial is L.

[0168] In this context, the degree of the j-th monomial in the first polynomial can be obtained from L, where L is the length of the CRC polynomial, and j = [A + B * Y, A + B * Y + 1, ..., A + L - 1 + B * Y]. A, L, B, and Y are described above and will not be repeated here.

[0169] Optionally, the degree of the j-th monomial in the first polynomial decreases by 1 sequentially, starting from L-1 and ending at 0, where j = [A+B*Y, A+B*Y+1, ..., A+L-1+B*Y]. For example, the degree of the A+B*Y-th monomial in the first polynomial is L-1, the degree of the A+B*Y+1-th monomial is L-2, ..., and the degree of the A+L-1+B*Y-th monomial is 0.

[0170] The first sequence may include A+B*Y bits, where A, B, and Y are described in the above description and will not be repeated here.

[0171] Optionally, the i-th bit in the A+B*Y bits of the first sequence, i = [0, 1, ..., A-1+B*Y], is any one of the following: a bit in the information bit sequence, or a 0 inserted in the information bit sequence.

[0172] The coefficient of the i-th monomial in the first polynomial can be obtained from the i-th bit of the first sequence, i = [0, 1, ..., A⁻¹ + B*Y]. Optionally, the coefficient of the i-th monomial in the first polynomial is the i-th bit of the first sequence, i = [0, 1, ..., A⁻¹ + B*Y].

[0173] The coefficient of the j-th monomial in the first polynomial can be obtained from the CRC sequence, where j = [A + B * Y, A + B * Y + 1, ..., A + L - 1 + B * Y]. Optionally, the coefficient of the j-th monomial in the first polynomial is a CRC bit in the CRC sequence.

[0174] In one example, Y zeros are inserted at every X positions in the information bit sequence, without inserting Y zeros at the end. The first polynomial is:

[0175] Where a0, a1, ..., a A-1 The information bit sequence includes information bits, p0, p1, ..., p L-1 For the CRC bits in the CRC sequence, B is equal to the ratio of A to X minus 1, or B is equal to the ratio of A to X rounded down. A, B, L, and Y are described in the above descriptions and will not be repeated here.

[0176] Optionally, by omitting the monomials with a value of 0 in the first polynomial, the simplified first polynomial can be obtained as: a0DA+L-1+BY +a1D A+L-2+BY +…+a X-1 D A+L-X+BY +a X D A+L-X-1+(B-1)Y +…+a 2X-1 D A+L-2X+(B-1)Y +…+a A-1 D L +p0D L-1 +p1D L-2 +…+p L-2 D+p L-1 The simplified first polynomial consists of A+L monomials, the coefficients and degrees of which are given in the aforementioned formula.

[0177] In another example, Y zeros are inserted at every X positions in the information bit sequence, and Y zeros are inserted at the end. The first polynomial is:

[0178] Where a0, a1, ..., a A-1 The information bit sequence includes information bits, p0, p1, ..., p L-1 For CRC bits in the CRC sequence, B is equal to the ratio of A to X or the ratio of A to X rounded up. A, B, L, and Y are described above and will not be repeated here.

[0179] Optionally, by omitting the monomials with a value of 0 in the first polynomial, the simplified first polynomial can be obtained as: a0D A+L-1+BY +a1D A+L-2+BY +…+a X-1 D A+L-X+BY +a x D A+L-X-1+(B-1)Y +…+a 2X-1 D A+L-2X+(B-1)Y +…+a A-1 D L+Y +p0D L-1 +p1D L-2 +…+p L-2 D+p L-1 The simplified first polynomial consists of A+L monomials, the coefficients and degrees of which are given in the aforementioned formula.

[0180] Optionally, the sending device determines the CRC sequence based on the first sequence and the first polynomial by dividing the CRC polynomial by the first polynomial substituted into the first sequence to determine the CRC sequence.

[0181] The division of the CRC polynomial by the first polynomial in the first sequence can be alternatively described as the remainder of the first polynomial divided by the CRC polynomial being zero.

[0182] Different CRC polynomials correspond to CRC sequences of different lengths. For example, when the CRC polynomial is g... CRC6 (D)=[D 6 +D 5 When +1], the length of the CRC sequence corresponding to this CRC polynomial is 6 bits; when the CRC polynomial is g CRC11 (D)=[D 11 +D 10 +D 9 +D 5 When +1], the length of the CRC sequence corresponding to this CRC polynomial is 11 bits; when the CRC polynomial is g CRC4 (D)=[D 4 When +D+1], the length of the CRC corresponding to this CRC polynomial is 4 bits.

[0183] S702: The transmitting device pre-encodes the information bit sequence according to the CRC sequence.

[0184] The pre-encoding of the information bit sequence by the transmitting device based on the CRC sequence may include: the transmitting device adding the CRC sequence determined in S701 to the end of the information bit sequence.

[0185] Based on the communication method shown in Figure 7, the transmitting device inserts Y zeros at every X positions in the information bit sequence, thereby disrupting the original structure of low-similarity codewords that can pass CRC check, reducing the number of low-similarity codewords after CRC precoding, and improving the ability of CRC technology to reduce low-similarity codewords and the decoding performance.

[0186] For example, with a code length N = 1024, the CRC polynomial is g. CRC6 (D)=[D 6 +D 5In the case of +1], using the method shown in Figure 7, the proportion R of low-similarity codewords that can pass the CRC sequence check of length 6 is obtained under different information bit numbers A. The distribution of R under different A is shown in Figure 8 below. Figure 8 is a schematic diagram of the change of the proportion R of low-similarity codewords that can pass the CRC sequence check of length 6 under another different information bit number A provided by the embodiment of this application. Comparing Figure 4 and Figure 8, it can be seen that the R corresponding to the information bit number A in Figure 8 is smaller than the R corresponding to the information bit number A in Figure 4, A = 450, 455, ..., 500. Therefore, compared with the communication method based on formula (1), the communication method shown in Figure 7 has fewer low-similarity codewords that can pass the CRC sequence check of length 6, which improves the ability of CRC technology to reduce low-similarity codewords and improves the limited decoding performance.

[0187] Optionally, after precoding based on the communication method shown in Figure 7, the transmitting device can perform Polar code encoding to obtain an encoded sequence, thereby improving the reliability of information transmission. The process of obtaining the encoded sequence is shown in Figure 9 below. Figure 9 is a schematic diagram of a process for obtaining an encoded sequence according to an embodiment of this application. As shown in Figure 9, the process of obtaining the encoded sequence may include: 1. Obtaining the information bit sequence a0, a1, ..., a A-1 2. In the information bit sequence a0, a1, ..., a A-1 1. Insert Y zeros at every X positions to obtain the first sequence; 2. Determine the CRC sequence based on the first sequence and the first polynomial; 3. Pre-encode the information bit sequence based on the CRC sequence. Specifically, append the CRC sequence to the information bit sequence to obtain the pre-encoded results a0, a1, ..., a A-1 ,p0,p1,...p, L-1 5. Encode the precoding result using Polar codes to obtain the encoded sequence c. Steps 1 and 5 are based on existing technologies, and steps 2 to 4 are described in Figure 7 and will not be repeated here.

[0188] Optionally, after precoding, the transmitting device can perform encoding, rate matching, and modulation to obtain a symbol sequence, which is then transmitted back to the transmitting device. The receiving device acquires the sequence to be decoded, which is a symbol sequence affected by noise and other interference, and determines the sequence to be checked based on the decoded sequence. The receiving device can check the sequence to be checked using the method shown in Figure 10 below.

[0189] Figure 10 is a flowchart of a communication method provided in an embodiment of this application. As shown in Figure 10, the method may include:

[0190] S1001: The receiving device obtains the sequence to be verified.

[0191] The sequence to be verified is the decoded sequence.

[0192] Optionally, the receiving device uses Polar code decoding to obtain the sequence to be verified. Polar code decoding is described above and will not be repeated here.

[0193] S1002: The receiving device performs CRC verification based on the second sequence and the second polynomial.

[0194] The second sequence is obtained by inserting Y zeros into every X positions in the first Z minus L (denoted as Z-L) positions of the sequence to be verified. X is less than the difference between the length Z of the sequence to be verified and the length L of the CRC sequence; Y is a positive integer.

[0195] Inserting Y zeros at every X (X < Z - L) positions in the first Z - L positions of the sequence to be checked can include: inserting Y zeros at every X (X < Z - L) positions in the first Z - L positions of the sequence to be checked, without inserting Y zeros immediately following the Z - Lth ​​position. Based on this, the number of bits in the first bit set included in the second sequence is a first value B, where B equals... Each first bit set includes Y zeros. In this case, regardless of whether the (Z-L)th position of the sequence to be checked satisfies the condition of position X, Y zeros are not inserted at the position immediately following the (Z-L)th position of the sequence to be checked. Optionally, B in this case can be modified in different possible designs; for example, B can be derived from... The transformation is (Z-L) / X-1 or For details, please refer to the first and second possible designs below.

[0196] Alternatively, inserting Y zeros at every X (X < Z - L) positions in the first Z - L positions of the sequence to be checked can include: inserting Y zeros at every X (X < Z - L) positions in the first Z - L positions of the sequence to be checked, without inserting Y zeros immediately following the Z - Lth ​​position of the sequence to be checked. Based on this, the second sequence can include B sequences, the number of which is equal to the first value B. Each first bit set consists of Y zeros. In this case, regardless of whether the (Z-L)th position of the sequence to be checked satisfies the condition of position X, Y zeros are inserted immediately following the (Z-L)th position of the sequence to be checked. Optionally, B in this case can be modified in different possible designs; for example, B can be derived from... Transformed into (Z-L) / X or For details, please refer to the third and fourth possible designs below.

[0197] In the first possible design, if the remainder of (Z-L) divided by X is 0 (or it can be described as: if the ratio of (Z-L) divided by X is a positive integer), Y zeros are inserted at every X (X < Z-L) positions in the first Z-L positions of the sequence to be checked, and Y zeros are not inserted immediately after the Z-Lth position of the sequence to be checked. This can be understood as inserting a first set of (Z-L) / X-1 bits, including Y zeros, into the first Z-L positions of the sequence to be checked. In this case, even if the Z-Lth position of the sequence to be checked satisfies X conditions, Y zeros do not need to be inserted immediately after the Z-Lth position of the sequence to be checked.

[0198] Based on this, the number B of the first bit set included in the second sequence can be determined from... The transformation is (Z-L) / X-1, meaning B can be equal to the down-taking result of the ratio of (Z-L-1) to X, or B can be equal to the difference obtained by subtracting 1 from the ratio of (Z-L) to X. Each first bit set includes Y zeros.

[0199] For example, taking a sequence to be checked with a length of 8, including a0, a1, a2, a3, a4, a5, a6, a7, and a CRC polynomial with a length L of 4, X of 2, and Y of 1, one 0 can be inserted in every two positions of the first four positions of the sequence to be checked, and one 0 is not inserted in the position immediately following the fourth position of the sequence to be checked. The resulting second sequence can be a0, a1, 0, a2, a3, a4, a5, a6, a7.

[0200] In the second possible design, if the remainder of (Z-L) divided by X is not 0 (or, as can be described, if the ratio of (Z-L) divided by X is not a positive integer), insert Y zeros at every X (X < Z-L) positions in the first Z-L positions of the sequence to be checked, without inserting Y zeros immediately following the Z-Lth position. This can be understood as inserting Y zeros in the first (Z-L) positions of the sequence to be checked. The first bit set contains Y zeros. In this case, if the (Z-L)th position of the sequence to be checked does not satisfy X positions, then Y zeros do not need to be inserted.

[0201] Based on this, the number B of the first bit set included in the second sequence can be determined from... Transformed into That is, B can be equal to the down-rounded result of the ratio of (Z-L-1) to X, or B can be equal to the floor result of the ratio of (Z-L) to X.

[0202] For example, taking a sequence to be checked with a length of 9, including a0, a1, a2, a3, a4, a5, a6, a7, a8, and a CRC polynomial with a length L of 4, X of 2, and Y of 1, one 0 can be inserted in every two positions of the first 5 positions of the sequence to be checked, and one 0 is not inserted in the position immediately following the 5th position of the sequence to be checked. The resulting second sequence can be a0, a1, 0, a2, a3, 0, a4, a5, a6, a7, a8.

[0203] In the third possible design, when the remainder of (Z-L) divided by X is 0 (or can be described as when the ratio of (Z-L) divided by X is a positive integer), Y zeros are inserted at every X (X < Z-L) positions in the first Z-L positions of the sequence to be checked, and Y zeros are inserted immediately after the Z-Lth position of the sequence to be checked. This can be understood as inserting a first set of (Z-L) / X bits, including Y zeros, into the first Z-L positions of the sequence to be checked. In this case, since the Z-Lth position of the sequence to be checked satisfies X conditions, Y zeros can be inserted immediately after the Z-Lth position of the sequence to be checked.

[0204] Based on this, the number B of the first bit set included in the second sequence can be determined from... The transformation is (Z-L) / X, meaning B can be equal to the sum of the floor of the ratio of (Z-L-1) to X plus 1, or B can be equal to the ratio of (Z-L) to X.

[0205] For example, taking a sequence to be checked with a length of 8, including a0, a1, a2, a3, a4, a5, a6, a7, and a CRC polynomial with a length L of 4, X of 2, and Y of 1, one 0 can be inserted in every two positions of the first four positions of the sequence to be checked, and one 0 can be inserted in the position immediately following the fourth position of the sequence to be checked, so that the second sequence can be a0, a1, 0, a2, a3, 0, a4, a5, a6, a7, a8.

[0206] In the fourth possible design, if the remainder of (Z-L) divided by X is not 0 (or it can be described as: if the ratio of (Z-L) divided by X is not a positive integer), insert Y zeros at every X (X < Z-L) positions in the first Z-L positions of the sequence to be checked, and insert Y zeros immediately following the Z-Lth position in the sequence to be checked. This can be understood as inserting Y zeros in the first (Z-L) positions of the sequence to be checked. The first bit set includes Y zeros. In this case, even if the (Z-L)th bit of the sequence to be checked does not satisfy the X position, Y zeros can be inserted at the position immediately following the Z-Lth position of the sequence to be checked, that is, Y zeros can be inserted in the first Z-L positions of the sequence to be checked. A first bit set consisting of Y zeros. It can also be understood as That is, the rounded-up result of the ratio of (Z-L) to X.

[0207] Based on this, the number B of the first bit set included in the second sequence can be determined from... Transformed into That is, B can be equal to the sum of the ratio of (Z-L-1) to X, which is rounded down and then increased by 1, or B can be equal to the ratio of (Z-L) to X, which is rounded up.

[0208] For example, taking a sequence to be checked with a length of 9 as a0, a1, a2, a3, a4, a5, a6, a7, a8, and a CRC polynomial with a length L of 4, X of 2, and Y of 1 as an example, one 0 can be inserted in every two positions of the first 5 positions of the sequence to be checked, and one 0 can be inserted in the position immediately following the 5th position of the sequence to be checked, so that the second sequence can be a0, a1, 0, a2, a3, 0, a4, 0, a5, a6, a7, a8.

[0209] X and Y can be referred to in the relevant description in S701, and will not be repeated here.

[0210] Optionally, for sequences of different lengths Z to be checked, X can be the same or different. Similarly, for sequences of different lengths Z to be checked, Y can be the same or different. In other words, for sequences of different lengths Z to be checked, X and Y can be completely the same, completely different, or partially the same.

[0211] In this application, the X and Y of the transmitting device and the receiving device should be consistent. There are no restrictions on how the transmitting device and the receiving device align their X and Y. For example, the transmitting device can indicate its own determined X and Y to the receiving device, and the receiving device can use the X and Y indicated by the transmitting device as its own X and Y.

[0212] The second polynomial is determined based on the second sequence.

[0213] Optionally, the second polynomial is determined based on the second sequence, and may include: the second polynomial is determined based on the sequence to be verified, Z, L, X, Y, and the first value B.

[0214] The second polynomial includes Z + B * Y monomials, where Z, B, and Y are described in the above description and will not be repeated here.

[0215] Optionally, the Z+B*Y monomials included in the second polynomial can be composed of the i-th monomial and the j-th monomial, i = [0, 1, ..., Z-L-1+B*Y], j = [Z-L+B*Y, Z-L+B*Y+1, ..., Z-1+B*Y].

[0216] In the second polynomial, the degree of the i-th monomial can be obtained from B, Y, and Z, i = [0, 1, ..., Z - L - 1 + B * Y], and the degree of the 0th monomial is the degree of the second polynomial.

[0217] Optionally, the degree of the i-th monomial in the second polynomial can be obtained from Z-i-1+B*Y, where i=[0,1,…,Z-L-1+B*Y]. For example, the degree of the 0th monomial in the second polynomial is Z-1+B*Y, the degree of the 1st monomial in the second polynomial is Z-2+B*Y,…, and the degree of the Z-L-1+B*Y monomial in the first polynomial is L.

[0218] In the second polynomial, the degree of the j-th monomial can be obtained from L, where L is the length of the CRC polynomial, and j = [Z - L + B * Y, Z - L + B * Y + 1, ..., Z]. － [1+B*Y]. Z, L, B, and Y are described above and will not be repeated here.

[0219] Optionally, the degree of the j-th monomial in the second polynomial decreases by 1 sequentially, starting from L-1 and ending at 0, where j = [Z-L+B*Y, Z-L+B*Y+1, ..., Z-1+B*Y]. For example, the degree of the Z-L+B*Y monomial in the second polynomial is L-1, the degree of the Z-L+B*Y+1 monomial in the first polynomial is L-2, ..., and the degree of the Z-1+B*Y monomial in the first polynomial is 0.

[0220] The second sequence may include Z+B*Y bits, where Z, B, and Y are described in the above description and will not be repeated here.

[0221] Optionally, the i-th bit of the Z+B*Y bits included in the second sequence, i = [0,1,…,Z-L-1+B*Y], is any one of the following: a bit in the sequence to be checked, or a 0 inserted in the sequence to be checked.

[0222] The coefficient of the i-th monomial in the second polynomial can be obtained from the i-th bit of the second sequence, i = [0, 1, ..., Z-L-1 + B*Y]. Optionally, the coefficient of the i-th monomial in the second polynomial is the i-th bit of the second sequence, i = [0, 1, ..., Z-L-1 + B*Y].

[0223] The coefficient of the j-th monomial in the second polynomial can be obtained from the j-th bit of the second sequence, j = [Z-L+B*Y, Z-L+B*Y+1, ..., Z-1+B*Y]. Optionally, the coefficient of the j-th monomial in the second polynomial is the j-th bit of the second sequence, j = [Z-L+B*Y, Z-L+B*Y+1, ..., Z-1+B*Y].

[0224] In one example, Y zeros are inserted at every X positions in the first Z-L positions of the sequence to be checked, and Y zeros are not inserted at the positions immediately following the Z-Lth position of the sequence to be checked. The second polynomial is: Where b0, b1, ..., b Z-1 Let B be the information bits included in the sequence to be verified; when (Z-L) is divisible by X, B is equal to the ratio of (Z-L) divided by X minus 1; when the remainder of (Z-L) divided by X is not 0, B is equal to the result of rounding down the ratio of (Z-L) divided by X; Z, B, L, and Y are described in the above descriptions and will not be repeated here.

[0225] Optionally, omitting monomials with a value of 0 in the second polynomial yields the simplified second polynomial: b0D Z-1+BY +b1D Z-2+BY +…+b X-1 D Z-X+BY +b X D Z-X-1+(B-1)Y +…+b 2X-1 D Z-2X+(B-1)Y +…+b Z-L-1 D L ++b Z-L D L-1 +b Z-L+1 D L-2 +…+b Z-2 D+b Z-1 The simplified second polynomial consists of Z monomials, the coefficients and degrees of which are given in the aforementioned formula.

[0226] In another example, Y zeros are inserted at every X positions in the first Z-L positions of the sequence to be checked, and Y zeros are inserted at the position immediately following the Z-Lth position of the sequence to be checked. The second polynomial is: Where b0, b1, ..., b Z-1 Let B be the information bits included in the sequence to be verified; when (Z-L) divides X, B is equal to the ratio of (Z-L) divided by X; when the remainder of (Z-L) divided by X is not 0, B is equal to the result of rounding up the ratio of (Z-L) divided by X; Z, B, L, and Y are described in the above descriptions and will not be repeated here.

[0227] Optionally, omitting monomials with a value of 0 in the second polynomial yields the simplified second polynomial: b0D Z-1+BY +b1D Z-2+BY +…+b X-1 D Z-X+BY +b X D Z-x-1+(B-1)Y +…+b 2X-1 D Z-2X+(B-1)Y +…+b Z-L-1 D L+Y +b Z-L D L-1 +b Z-L+1 D L-2 +…+b Z-2 D+b Z-1 The simplified second polynomial consists of Z monomials, the coefficients and degrees of which are given in the aforementioned formula.

[0228] Optionally, the receiving device performs CRC verification based on the second sequence and the second polynomial, which may include: dividing the CRC polynomial by the second polynomial substituted into the second sequence to obtain the verification result. The relevant description of the CRC polynomial is given above and will not be repeated here.

[0229] Specifically, the division of the CRC polynomial by the second polynomial in the second sequence can be alternatively described as the remainder of the second polynomial divided by the CRC polynomial being zero. The CRC polynomial can be found in the description above and will not be repeated here.

[0230] Based on the communication method shown in Figure 10, the receiving device inserts Y zeros at every X position in the first Z-L positions of the sequence to be checked, thereby disrupting the original structure of low-similarity codewords that can pass CRC check, reducing the number of low-similarity codewords after CRC precoding, and improving the ability of CRC technology to reduce low-similarity codewords and the decoding performance.

[0231] The values ​​of X and Y in the method embodiments of Figures 7 and 10 above are summarized. In order to better understand this case, the first sequence, the first polynomial, the second sequence, and the second polynomial in the communication method provided in this application embodiment will be described in detail below using different X and Y as examples.

[0232] Example 1:

[0233] The information bit sequence (or the sequence to be encoded) is a0, a1, ..., a A-1 The length of the information bit sequence is A, and X is 2. L-1 Y is 1, and the sequence to be verified is b0, b1, ..., b Z-1 The length of the sequence to be verified is Z, and the length of the CRC polynomial is L. The method of obtaining B differs in different polynomials. For example, for B in the first polynomial, B is the integer result of the ratio of A to X; for B in the second polynomial, B is the integer result of the ratio of ZL to X.

[0234] The communication method provided in this application embodiment, under the above parameter settings, can determine the interval of inserting Y zeros in the information bit sequence or the sequence to be checked according to the CRC polynomial length. On the one hand, it can destroy the structure of low-similarity codewords that can pass CRC check under different CRC polynomials, thereby improving the decoding performance; on the other hand, it can also obtain the gain of controlling the complexity of CRC encoding and check.

[0235] In one example, in every 2 bits of the information bit sequence L-1 Inserting a zero at each position, but not at the end, based on the second possible design in the method shown in Figure 7, the remainder of A divided by X is not 0, and B in the first polynomial is equal to A and 2. L-1 The floor value of the ratio, i.e. 2 in the first Z-L positions of the sequence to be verified L-1 Inserting a 0 at each position, without inserting a 0 immediately following the Z-Lth position in the sequence to be verified, based on the second possible design in the method shown in Figure 10, the remainder of (Z-L) divided by X is not 0, and B in the second polynomial is equal to (Z-L) and 2. L-1 The floor value of the ratio, i.e.

[0236] Based on the above parameter settings, the first sequence, the first polynomial, the second sequence, and the second polynomial are respectively:

[0237] The first sequence is:

[0238] The first polynomial is: By omitting the monomials with a value of 0 in the first polynomial, we obtain the simplified first polynomial as follows:

[0239] The second sequence is: b0, b1, ..., b X-1 ,0,b X ,b X+1 ,...,b 2X-1 ,0,b 2X ...,0,...,b Z-L-1 ,b Z-L ,b Z-L+1 ,...,b Z-1 .

[0240] The second polynomial is: By omitting the monomials with a value of 0 in the second polynomial, we obtain the simplified second polynomial as follows:

[0241] In another example, in every 2 bits of the information bit sequence L-1 Inserting a zero at each position and at the end, based on the fourth possible design in the method shown in Figure 7, the remainder of A divided by X is not 0, and B in the first polynomial is equal to A and 2. L-1 The rounded-up result of the ratio, i.e. 2 in the first Z-L positions of the sequence to be verified L-1 Inserting a 0 at each position, and inserting a 0 immediately following the Z-Lth position in the sequence to be verified, based on the fourth possible design in the method shown in Figure 10, the remainder of (Z-L) divided by X is not 0, and B in the second polynomial is equal to (Z-L) and 2. L-1 The rounded-up result of the ratio, i.e.

[0242] Based on the above parameter settings, the first sequence, the first polynomial, the second sequence, and the second polynomial are respectively:

[0243] The first sequence is:

[0244] The first polynomial is: By omitting the monomials with a value of 0 in the first polynomial, we obtain the simplified first polynomial as follows:

[0245] The second sequence is: b0, b1, ..., b X-1 ,0,b X ,b X+1 ,...,b 2X-1 ,0,b 2X ...,0,...,b Z-L-1 ,0,b Z-L ,bZ-L+1 ,...,b Z-1 .

[0246] The second polynomial is: By omitting the monomials with a value of 0 in the second polynomial, we obtain the simplified second polynomial as follows:

[0247] For example, with code length N = 1024, information bit sequence length 512, and CRC polynomial g... CRC6 (D)=[D 6 +D 5 In the case of +1], the code spectrum under the technical solution based on formula (1) or the method shown in Figure 7 under the parameter settings of Embodiment 1 is used for precoding. Then, Polar code encoding and SCL8 decoding are used to obtain the code spectrum under the technical solution of Embodiment 1 and the code spectrum under the technical solution based on formula (1). The code spectra under the two technical solutions are shown in Figure 11 below.

[0248] Figure 11 is a schematic diagram of a code spectrum provided in an embodiment of this application. As shown in Figure 11, the horizontal axis of the code spectrum is the signal-noise ratio (SNR), and the vertical axis of the code spectrum is the block error rate (BLER). As shown in Figure 11, under the same SNR, the BLER of the technical solution in Embodiment 1 is less than that of the technical solution based on formula (1). Therefore, the technical solution in Embodiment 1 improves the decoding performance compared to the technical solution based on formula (1).

[0249] In addition, based on the above parameter settings, the minimum code weight and the number of code words with the minimum code weight (or the number of low-weight code words) under the technical solution of Embodiment 1 can also be obtained, as well as the minimum code weight and the number of code words with the minimum code weight under the technical solution based on formula (1). The specific values ​​of the minimum code weight and the number of code words with the minimum code weight under the two technical solutions are shown in Table 1 below.

[0250] Table 1

[0251] In Table 1, the minimum code weight of the technical solution in Example 1 and the minimum code weight of the technical solution based on formula (1) are both 16. However, the number of codewords with the minimum code weight under the technical solution in Example 1 is significantly lower than the number of codewords with the minimum code weight under the technical solution based on formula (1). Therefore, the technical solution in Example 1 improves the ability of CRC technology to reduce low-similarity codewords compared with the technical solution based on formula (1), and achieves improved decoding performance.

[0252] Example 2:

[0253] The difference between Example 2 and Example 1 is that Y is a positive integer 1 in Example 1, while Y is a prime number in Example 2. The information bit sequence, A, the sequence to be verified, Z, L, B in Example 2 are the same as those in Example 1, and will not be repeated here.

[0254] The communication method provided in this application, under the above parameter settings, increases the number of 0s inserted in each interval based on Embodiment 1, to further reduce the number of low-similarity codewords that pass CRC check, thereby more effectively improving decoding performance. Furthermore, since Y is a prime number, meaning the number of 0s inserted in each interval is prime, it can more effectively disrupt the original low-similarity codeword structure of the polar code, thus further reducing the number of low-similarity codewords that can pass CRC check.

[0255] In one example, in every 2 bits of the information bit sequence L-1 Insert Y zeros at each position, but not at the end, where Y is the largest prime number less than X / 4. Based on the second possible design in the method shown in Figure 7, the remainder of A divided by X is not 0, and B in the first polynomial equals A and 2. L-1 The floor value of the ratio, i.e. 2 in the first Z-L positions of the sequence to be verified L-1 Insert Y zeros at position Z, but not at the position immediately following the Z-Lth position of the sequence to be verified. Based on the second possible design in the method shown in Figure 10, the remainder of (Z-L) divided by X is not 0, and B in the second polynomial is equal to (Z-L) and 2. L-1 The floor value of the ratio, i.e.

[0256] Based on the above parameter settings, the first sequence, the first polynomial, the second sequence, and the second polynomial are respectively:

[0257] The first sequence is:

[0258] The first polynomial is: By omitting the monomials with a value of 0 in the first polynomial, we obtain the simplified first polynomial as follows:

[0259] The second sequence is:

[0260] The second polynomial is: By omitting the monomials with a value of 0 in the second polynomial, we obtain the simplified second polynomial as follows:

[0261] In another example, in every 2 bits of the information bit sequence L-1 Insert Y zeros at each position, and insert Y zeros at the end, where Y is the largest prime number less than X / 4. Based on the fourth possible design in the method shown in Figure 7, the remainder of A divided by X is not 0, and B in the first polynomial is equal to A and 2. L-1 The rounded-up result of the ratio, i.e. 2 in the first Z-L positions of the sequence to be verified L-1 Insert Y zeros at each position, and insert Y zeros immediately after the Z-Lth position in the sequence to be verified. Based on the fourth possible design in the method shown in Figure 10, the remainder of (Z-L) divided by X is not 0, and B in the second polynomial is equal to (Z-L) and 2. L-1 The rounded-up result of the ratio, i.e.

[0262] Based on the above parameter settings, the first sequence, the first polynomial, the second sequence, and the second polynomial are respectively:

[0263] The first sequence is:

[0264] The first polynomial is: By omitting the monomials with a value of 0 in the first polynomial, we obtain the simplified first polynomial as follows:

[0265] The second sequence is:

[0266] The second polynomial is: By omitting the monomials with a value of 0 in the second polynomial, we obtain the simplified second polynomial as follows:

[0267] For example, with code length N = 1024, information bit sequence length 512, and CRC polynomial g... CRC6 (D)=[D 6 +D 5In the case of +1], the code spectrum under the technical solution based on formula (1) or the method shown in Figure 7 under the parameter setting of embodiment 2 is used for precoding. Then, Polar code encoding and SCL8 decoding are used to obtain the code spectrum under the technical solution of embodiment 2 and the code spectrum under the technical solution based on formula (1). The code spectra under the two technical solutions are shown in Figure 12 below.

[0268] Figure 12 is another schematic diagram of the code spectrum provided in the embodiment of this application. As shown in Figure 12, the horizontal axis of the code spectrum is the signal-to-noise ratio (SNR), and the vertical axis of the code spectrum is the block error rate (BLER). As shown in Figure 12, under the same signal-to-noise ratio, the block error rate of the technical solution of Embodiment 2 is less than that of the technical solution based on formula (1). Therefore, the technical solution of Embodiment 2 improves the decoding performance compared with the technical solution based on formula (1).

[0269] In addition, based on the above parameter settings, the minimum code weight and the number of codewords with the minimum code weight under the technical solution of Embodiment 2, as well as the minimum code weight and the number of codewords with the minimum code weight under the technical solution based on formula (1), are obtained. The specific values ​​of the minimum code weight and the number of codewords with the minimum code weight under the two technical solutions are shown in Table 2 below.

[0270] Table 2

[0271] In Table 2, the minimum code weight of the technical solution in Example 2 and the minimum code weight of the technical solution based on formula (1) are both 16. However, the number of codewords with the minimum code weight under the technical solution in Example 2 is significantly lower than the number of codewords with the minimum code weight under the technical solution based on formula (1). Therefore, the technical solution based on Example 2 improves the ability of CRC technology to reduce low-similarity codewords compared to the technical solution based on formula (1), and achieves improved decoding performance.

[0272] Furthermore, the technical solution of Embodiment 2 differs from that of Embodiment 1 in the value of Y. Therefore, Tables 1 and 2 can be used to compare the technical effects of Embodiment 2 and Embodiment 1. Comparing Tables 1 and 2, it can be seen that the minimum code weight of both Embodiment 1 and Embodiment 2 is 16. However, the number of codewords with the minimum code weight in Embodiment 2 is 501, while the number of codewords with the minimum code weight in Embodiment 1 is 522. The number of codewords with the minimum code weight in Embodiment 2 is significantly lower than that in Embodiment 1. Therefore, the technical solution of Embodiment 2 further improves the ability of CRC technology to reduce low-similarity codewords compared to the technical solution of Embodiment 1, and more effectively improves decoding performance.

[0273] Example 3:

[0274] The difference between Example 3 and Example 1 is that X in Example 1 is 2. L-1 In Example 1, Y is 1; however, in Example 3, X is a positive integer, and Y is a positive integer. The information bit sequence, A, the sequence to be verified, Z, and L in Example 3 are the same as those in Example 1, and will not be repeated here. Optionally, X and Y can be the same or different positive integers.

[0275] The communication method provided in this application, under the above parameter settings, improves decoding performance by inserting Y (Y is a constant) zeros at every X (X is a constant) positions in the information bit sequence (or the first Z-L positions of the sequence to be checked), thereby disrupting the original structure of low-similarity codewords that can pass CRC check and reducing the number of low-similarity codewords that can pass CRC check. Furthermore, this technical solution is simple to implement.

[0276] In one example, a 0 is inserted at every 8 positions in the information bit sequence, without inserting a 0 at the end, i.e., X is 8 and Y is 1. Based on the first possible design in the method shown in Figure 7, A is a positive integer divisible by 8, and B in the first polynomial is equal to the ratio of A to 8 minus 1. A 0 is inserted at every 8 positions in the first Z-L positions of the sequence to be checked, without inserting a 0 immediately following the Z-Lth position. Based on the first possible design in the method shown in Figure 10, Z-L is a positive integer divisible by 8, and B in the second polynomial is equal to the ratio of (Z-L) to 8 minus 1. Based on the above parameter settings, the first sequence, first polynomial, second sequence, and second polynomial are respectively:

[0277] The first sequence is:

[0278] The first polynomial is:

[0279] By omitting the monomials with a value of 0 in the first polynomial, we obtain the simplified first polynomial as follows:

[0280] The second sequence is: b0, b1, ..., b7, 0, b8, b9, ..., b 15 ,0,b 16 ,...,0,...,b Z-L-1 ,b Z-L ,b Z-L+1 ,...,b Z-1 .

[0281] The second polynomial is: By omitting the monomials with a value of 0 in the second polynomial, we obtain the simplified second polynomial as follows:

[0282] In another example, a 0 is inserted at every 8 positions of the information bit sequence, and a 0 is inserted at the end, i.e., X is 8 and Y is 1. Based on the third possible design in the method shown in Figure 7, A is a positive integer divisible by 8, and B in the first polynomial is equal to the ratio of A to 8. A 0 is inserted at every 8 positions in the first Z-L positions of the sequence to be checked, and a 0 is inserted immediately after the Z-Lth position in the sequence to be checked. Based on the third possible design in the method shown in Figure 10, Z-L is a positive integer divisible by 8, and B in the second polynomial is equal to the ratio of (Z-L) to 8. Based on the above parameter settings, the first sequence, the first polynomial, the second sequence, and the second polynomial are respectively:

[0283] The first sequence is:

[0284] The first polynomial is: By omitting the monomials with a value of 0 in the first polynomial, we obtain the simplified first polynomial as follows:

[0285] The second sequence is: b0, b1, ..., b7, 0, b8, b9, ..., b 15 ,0,b 16 ,...,0,...,b Z-L-1 ,0,b Z-L ,b Z-L+1 ,...,b Z-1 .

[0286] The second polynomial is: By omitting the monomials with a value of 0 in the second polynomial, we obtain the simplified second polynomial as follows:

[0287] For example, with code length N = 1024, information bit sequence length is 256, and CRC polynomial is g. CRC6 (D)=[D 6 +D 5In the case of +1], the code spectrum under the technical solution based on formula (1) or the method shown in Figure 7 under the parameter settings of Embodiment 3 is used for precoding. Then, Polar code encoding and SCL8 decoding are used to obtain the code spectrum under the technical solution of Embodiment 3 and the code spectrum under the technical solution based on formula (1). The code spectra under the two technical solutions are shown in Figure 13 below.

[0288] Figure 13 is a schematic diagram of another code spectrum provided in the embodiments of this application. As shown in Figure 13, the horizontal axis of the code spectrum is the signal-to-noise ratio (SNR), and the vertical axis of the code spectrum is the block error rate (BLER). As shown in Figure 13, under the same signal-to-noise ratio, the block error rate of the technical solution of Embodiment 3 is less than that of the technical solution based on formula (1). Therefore, the technical solution of Embodiment 3 improves the decoding performance compared with the technical solution based on formula (1).

[0289] In addition, based on the above parameter settings, the minimum code weight and the number of code words with the minimum code weight (or the number of low-weight code words) under the technical solution of Embodiment 3 can also be obtained, as well as the minimum code weight and the number of code words with the minimum code weight under the technical solution based on formula (1). The specific values ​​of the minimum code weight and the number of code words with the minimum code weight under the two technical solutions are shown in Table 3 below.

[0290] Table 3

[0291] In Table 3, the minimum code weight of the technical solution in Example 3 and the minimum code weight of the technical solution based on formula (1) are both 32. However, the number of codewords with the minimum code weight under the technical solution in Example 3 is significantly lower than the number of codewords with the minimum code weight under the technical solution based on formula (1). Therefore, the technical solution in Example 3 improves the ability of CRC technology to reduce low-similarity codewords compared with the technical solution based on formula (1), and realizes the improvement of decoding performance.

[0292] In the embodiments shown in Figures 7 to 10 above, and in Embodiments 1 to 3, X is limited to being less than the length A of the information bit sequence. Unlike this scheme, the value of X can also be completely unrelated to A. For details, please refer to the relevant description of Scheme 1 below:

[0293] Option 1:

[0294] Here, the value of X can be predefined, and different lengths of A can correspond to different X values. Alternatively, different intervals of A can correspond to different X values, while A values ​​within the same interval can correspond to the same X value.

[0295] Similarly, unlike the above embodiments where X is limited to be less than the difference between Z and L, the value of X can also be unrelated to the difference between Z and L. That is, the value of X can be predefined, and different differences between Z and L can correspond to different X values. Alternatively, the differences between Z and L in different intervals can correspond to different X values, while the differences between Z and L in the same interval can correspond to the same X value.

[0296] Under this technical solution, the transmitting device can determine the CRC sequence based on the first sequence and the first polynomial; and pre-encode the information bit sequence based on the CRC sequence. The first sequence is obtained by inserting Y zeros at every X positions in the information bit sequence; X is a positive integer, and Y is a positive integer; the first polynomial is determined based on the first sequence.

[0297] Under this technical solution, the receiving device acquires the sequence to be verified; performs CRC verification based on the second sequence and the second polynomial; wherein, the second sequence is obtained by inserting Y zeros into every X positions in the first Z-L positions of the sequence to be verified; X is a positive integer, Y is a positive integer; the second polynomial is determined based on the second sequence.

[0298] X can be a positive integer or obtained from the length L of the CRC polynomial. For relevant descriptions, please refer to the above and will not be repeated here.

[0299] Where Y can be a positive integer, or be obtained from the length L of the CRC polynomial, or be a prime number. See the above for relevant descriptions, which will not be repeated here.

[0300] Accordingly, under this technical solution, the transmitting device can insert Y zeros into the information bit sequence based on X. The insertion of Y zeros into the information bit sequence based on X can include the following implementation methods:

[0301] 1. A is greater than X

[0302] Where A is greater than X, it can be replaced by X being less than A. In the case of X being less than A, the relevant description of inserting Y zeros into the information bit sequence based on X is shown in Figure 7, and will not be repeated here.

[0303] II. A is less than or equal to X

[0304] When A is less than or equal to X, the position of X is greater than or equal to the length A of the information bit sequence. Therefore, Y zeros can be inserted at the end of the information bit sequence to destroy the original structure of the low-similarity codeword that can pass the CRC check.

[0305] Accordingly, under this technical solution, the receiving device can insert Y zeros into the first Z-L positions of the sequence to be verified based on X. The insertion of Y zeros into the first Z-L positions of the sequence to be verified based on X can include the following implementation methods:

[0306] I. Z-L is greater than X

[0307] Where Z-L is greater than X, it can be replaced by X being less than Z-L. In the case that X is less than Z-L, the relevant description of inserting Y zeros in the first Z-L positions of the sequence to be verified based on X is shown in the relevant description in the method shown in Figure 10, which will not be repeated here.

[0308] II. Z-L is less than or equal to X

[0309] For cases where Z-L is less than or equal to X, the position of X is greater than or equal to the Z-Lth position. Therefore, Y zeros can be inserted immediately after the Z-Lth position of the sequence to be checked to disrupt the original structure of the low-similarity codeword that can pass the CRC check.

[0310] In the embodiments shown in Figures 7 to 10 and Embodiments 1 to 3 above, X is limited to be less than the length A of the information bit sequence, and a 0-insertion operation is performed on the information bit sequence based on X; in Scheme 1 above, the value of X can be unrelated to A, and a 0-insertion operation is performed on the information bit sequence based on X; unlike these two schemes, referring to Scheme 2 below, when performing a 0-insertion operation on the information bit sequence, X can also be disregarded, and only Y zeros are inserted at the end.

[0311] Option 2:

[0312] Under this technical solution, the transmitting device can determine the CRC sequence based on the first sequence and the first polynomial; and pre-encode the information bit sequence based on the CRC sequence. The first sequence is obtained by inserting Y zeros at the end of the information bit sequence; Y is a positive integer; and the first polynomial is determined based on the first sequence.

[0313] For example, the information bit sequence is a0, a1, ..., a A-1 Inserting Y zeros at the end of the information bit sequence yields the first sequence, which is:

[0314] Optionally, determining the first polynomial based on the first sequence may include: determining the first polynomial based on the information bit sequence, A, the length L and Y of the CRC sequence, and a first value B. In this technical solution, since only Y zeros are inserted at the end of the information bit sequence, the first bit set included in the first sequence contains the first value B, where B equals 1, and the first bit set includes Y zeros.

[0315] Optional, the first polynomial is By omitting the zeros in the first polynomial, we obtain the simplified first polynomial, which is a0D. A+L-1+Y +a1DA+L-2+Y +…+a X-1 D A+L-X+Y +a X D A+L-X-1+Y +…+a A-1 D L+Y +p0D L-1 +p1D L-2 +…+p L-2 D+p L-1 .

[0316] Accordingly, under this technical solution, the receiving device can obtain the sequence to be verified and perform CRC verification based on the second sequence and the second polynomial; wherein, the second sequence is obtained by inserting Y zeros immediately after the ZLth position of the sequence to be verified; Y is a positive integer; the second polynomial is determined based on the second sequence.

[0317] For example, the sequence to be verified is b0, b1, ..., b Z-L-1 ,b Z-L ,b Z-L+1 ,...,b Z-1 Insert Y zeros immediately following the ZLth position of the sequence to be checked to obtain the second sequence, which is:

[0318] Optionally, determining the second polynomial based on the second sequence may include: the second polynomial being determined based on the sequence to be verified, Z, the length L and Y of the CRC sequence, and the first value B. In this technical solution, since Y zeros are inserted only immediately following the ZLth position of the sequence to be verified, the number of bits in the first bit set included in the second sequence is the first value B, where B equals 1, and the first bit set includes Y zeros.

[0319] Optional, the second polynomial is

[0320] By omitting the zeros in the second polynomial, we obtain the simplified second polynomial, which is b0D. Z-1+Y +b1D Z-2+Y +…+b Z-L-1 D L+Y +b Z-L D L-1 +b Z-L+1 D L-2 +...+b Z-2 D+b Z-1 .

[0321] In one example, Y is 1. Based on the above parameter settings, the first sequence, the first polynomial, the second sequence, and the second polynomial are respectively:

[0322] The first sequence is: a0, a1, ..., a A-1 ,0.

[0323] The first polynomial is: a0D A+L +a1D A+L-1 +…+a X-1 D A+L-X+1 +a X D A+L-X +…+a A-1 D L+1 +0+p0D L-1 +p1D L-2 +…+p L-2 D+p L-1 By omitting the monomials with a value of 0 in the first polynomial, we can obtain the simplified first polynomial as: a0D A+L +a1D A+L-1 +…+a X-1 D A+L-X+1 +a X D A+L-X +…+a A-1 D L+1 +p0D L-1 +p1D L-2 +…+p L-2 D+p L-1 .

[0324] The second sequence is: b0, b1, ..., b Z-L-1 ,0,b Z-L ,b Z-L+1 ,...,b Z-1 .

[0325] The second polynomial is: b0D Z +b1D Z-1 +…+b Z-L-1 D L+1 +0+b Z-L D L-1 +b Z-L+1 D L-2 +…+b Z-2 D+b Z-1 By omitting the monomials with a value of 0 in the second polynomial, we obtain the simplified second polynomial as: b0D Z +b1D Z-1 +…+b Z-L-1 D L+1 +b Z-L D L-1 +b Z-L+1 D L-2 +…+b Z-2 D+b Z-1 .

[0326] For example, with code length N = 1024, information bit sequence length is 256, and CRC polynomial is g. CRC6 (D)=[D 6 +D 5 In the case of +1], the code spectrum under scheme 2 and the code spectrum under the technical scheme based on formula (1) can be obtained by using the technical scheme based on formula (1) or using scheme 2 for precoding, and then using Polar code encoding and SCL8 decoding. The code spectrum under the two technical schemes is shown in Figure 14 below.

[0327] Figure 14 is a schematic diagram of another code spectrum provided in the embodiments of this application. As shown in Figure 14, the horizontal axis of the code spectrum is the signal-to-noise ratio (SNR), and the vertical axis of the code spectrum is the block error rate (BLER). As shown in Figure 14, under the same signal-to-noise ratio, the block error rate of Scheme 2 is less than that of the technical solution based on formula (1). Therefore, Scheme 2 improves the decoding performance compared with the technical solution based on formula (1).

[0328] In addition, based on the above parameter settings, we can also obtain the minimum code weight and the number of code words with the minimum code weight (or the number of low-weight code words) under scheme 2, as well as the minimum code weight and the number of code words with the minimum code weight under the technical scheme based on formula (1). The specific values ​​of the minimum code weight and the number of code words with the minimum code weight under the two technical schemes are shown in Table 4 below.

[0329] Table 4

[0330] In Table 4, the minimum code weight of Scheme 2 and the minimum code weight of the technical scheme based on Formula (1) are both 32. However, the number of codewords with the minimum code weight under Scheme 2 is significantly lower than the number of codewords with the minimum code weight under the technical scheme based on Formula (1). Therefore, compared with the technical scheme based on Formula (1), Scheme 2 improves the ability of CRC technology to reduce low-similarity codewords and achieves improved decoding performance.

[0331] In addition, Scheme 2 only inserts Y zeros at the end of the information bit sequence. Compared with the technical solutions of other embodiments, Scheme 2 has a weaker ability to reduce the number of low-duplicate codewords after CRC precoding, but it is simpler to implement.

[0332] To achieve the above functions, the chip of this invention may include hardware structures and / or software modules corresponding to the execution of each function. Those skilled in the art will readily recognize that, based on the units and algorithm steps of the examples described in conjunction with the embodiments disclosed herein, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0333] This application embodiment can divide terminal devices or network devices into functional modules according to the above method examples. For example, each function can be divided into its own functional module, or two or more functions can be integrated into one processing module. The integrated module can be implemented in hardware or as a software functional module. It should be noted that the module division in this application embodiment is illustrative and only represents one logical functional division. In actual implementation, there may be other division methods.

[0334] Referring to Figure 15, which is a schematic diagram of a communication device provided in an embodiment of this application, the communication device can be applied to the methods shown in any of the embodiments in Figures 7 and 10. As shown in Figure 15, the communication device includes a processing module and a transceiver module. The processing module may be one or more processors, and the transceiver module may be a transceiver or a communication interface. The communication device can be used to implement the terminal device or network device involved in any of the above method embodiments, or to implement the functions of the network element involved in any of the above method embodiments. The network element or network function may be a network component in a hardware device, a software function running on dedicated hardware, or a virtualization function instantiated on a platform (e.g., a cloud platform). Optionally, the communication device may also include a storage module for storing the program code and data of the communication device.

[0335] In one example, the communication device functions as a terminal device or is a chip applied within a terminal device, and executes the steps performed by the terminal device in the above method embodiments. The transceiver module is used to specifically execute the sending and / or receiving actions performed by the terminal device in any of the embodiments of Figures 7 and 10, for example, supporting the terminal device in performing other processes of the technology described herein. The processing module can be used to support the communication device in performing the processing actions in the above method embodiments, for example, supporting the terminal device in performing other processes of the technology described herein.

[0336] For example, the processing module is configured to: determine a CRC sequence based on a first sequence and a first polynomial; and pre-encode the information bit sequence based on the CRC sequence. The first sequence is obtained by inserting Y zeros at every X positions in the information bit sequence, where X is less than the length A of the information bit sequence, Y is a positive integer, and the first polynomial is determined based on the first sequence.

[0337] In one possible implementation, when the terminal device or network device is a chip, the transceiver module can be a communication interface, pins, or circuits. The communication interface can be used to input data to be processed to the processor and can output the processor's processing results. Specifically, the communication interface can be a general purpose input / output (GPIO) interface, which can connect to multiple peripheral devices (such as displays (LCDs), cameras, radio frequency (RF) modules, antennas, etc.). The communication interface is connected to the processor via a bus.

[0338] The processing module can be a processor, which can execute computer execution instructions stored in the storage module to cause the chip to execute the methods involved in any of the embodiments shown in Figures 7 and 10. Further, the processor may include a controller, an arithmetic logic unit (ALU), and registers. For example, the controller is mainly responsible for instruction decoding and issuing control signals for the operations corresponding to the instructions. The ALU is mainly responsible for performing fixed-point or floating-point arithmetic operations, shift operations, and logical operations, and can also perform address operations and conversions. The registers are mainly responsible for storing register operands and intermediate operation results temporarily stored during instruction execution. In specific implementations, the processor's hardware architecture can be an ASIC architecture, a microprocessor without interlocked piped stages architecture (MIPS), an advanced reduced instruction set machine (RISC) machine (ARM) architecture, or a network processor (NP) architecture, etc. The processor can be single-core or multi-core. The storage module can be an internal storage module of the chip, such as registers or caches. Storage modules can also be external to the chip, such as ROM or other types of static storage devices that can store static information and instructions, RAM, etc.

[0339] It should be noted that the functions of the processor and interface can be implemented through hardware design, software design, or a combination of both; no restrictions are imposed here.

[0340] The various embodiments of this application can be implemented independently or in combination, without limitation. Unless otherwise specified or in conflict of logic, the terminology and / or descriptions between the different embodiments provided in this application are consistent and can be referenced mutually. Technical features in different embodiments can be combined to form new embodiments based on their inherent logical relationships.

[0341] It is understood that in the embodiments of this application, the executing entity may perform some or all of the steps in the embodiments of this application. These steps or operations are merely examples, and the embodiments of this application may also perform other operations or variations thereof. Furthermore, the various steps may be executed in different orders as presented in the embodiments of this application, and it is not necessarily necessary to execute all the operations in the embodiments of this application.

[0342] The foregoing primarily describes the solutions provided in this application from the perspective of device-to-device interaction. It is understood that each device, in order to achieve the aforementioned functions, includes corresponding hardware structures and / or software modules for executing each function. Those skilled in the art will readily recognize that, in conjunction with the algorithm steps of the examples described in the embodiments disclosed herein, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0343] This application embodiment can divide each device into functional modules according to the above method example. For example, each function can be divided into a separate functional module, or two or more functions can be integrated into one processing module. The integrated module can be implemented in hardware or as a software functional module. The module division in this application embodiment is illustrative and only represents one logical functional division. In actual implementation, there may be other division methods.

[0344] With each functional module divided according to its corresponding function, Figure 16 shows a transmitting device 160. The transmitting device 160 can perform the actions performed by the transmitting device in the method shown in Figure 7. All relevant content of each step involved in the above method embodiment can be referred to the functional description of the corresponding functional module. The technical effects that can be obtained can be referred to the above method embodiment, and will not be repeated here.

[0345] The transmitting device 160 may include a transceiver module 1601 and a processing module 1602. Exemplarily, the transmitting device 160 may be a communication device, or a chip or other combination device or component having the aforementioned transmitting device functions applied in a communication device. When the transmitting device 160 is a communication device, the transceiver module 1601 may be a transceiver, which may include an antenna and radio frequency circuits, etc.; the processing module 1602 may be a processor (or processing circuit), such as a baseband processor, which may include one or more CPUs. When the transmitting device 160 is a component having the aforementioned transmitting device functions, the transceiver module 1601 may be a radio frequency unit; the processing module 1602 may be a processor (or processing circuit), such as a baseband processor. When the transmitting device 160 is a chip system, the transceiver module 1601 may be an input / output interface of a chip (e.g., a baseband chip); the processing module 1602 may be a processor (or processing circuit) of the chip system, and may include one or more central processing units. It should be understood that the transceiver module 1601 in the embodiments of this application can be implemented by a transceiver or transceiver-related circuit components; the processing module 1602 can be implemented by a processor or processor-related circuit components (or, referred to as processing circuit).

[0346] For example, the transceiver module 1601 can be used to perform all the transceiver operations performed by the transmitting device in the embodiment shown in FIG7, and / or to support other processes of the technology described herein; the processing module 1602 can be used to perform all operations other than the transceiver operations performed by the transmitting device in the embodiment shown in FIG7, and / or to support other processes of the technology described herein.

[0347] Figure 17 shows a receiving device 170, which can perform the actions performed by the receiving device in the method shown in Figure 10. All relevant content of each step involved in the above method embodiment can be referred to the functional description of the corresponding functional module, and the technical effects that can be obtained can be referred to the above method embodiment, which will not be repeated here.

[0348] The receiving device 170 may include a transceiver module 1701 and a processing module 1702. Exemplarily, the receiving device 170 may be a communication device, or a chip or other combination device or component having the aforementioned receiving device functions applied in a communication device. When the receiving device 170 is a communication device, the transceiver module 1701 may be a transceiver, which may include an antenna and radio frequency circuits, etc.; the processing module 1702 may be a processor (or processing circuit), such as a baseband processor, which may include one or more CPUs. When the receiving device 170 is a component having the aforementioned receiving device functions, the transceiver module 1701 may be a radio frequency unit; the processing module 1702 may be a processor (or processing circuit), such as a baseband processor. When the receiving device 170 is a chip system, the transceiver module 1701 may be an input / output interface of a chip (e.g., a baseband chip); the processing module 1702 may be a processor (or processing circuit) of the chip system, and may include one or more central processing units. The transceiver module 1701 in this embodiment can be implemented by a transceiver or transceiver-related circuit components; the processing module 1702 can be implemented by a processor or processor-related circuit components (or, referred to as processing circuit).

[0349] For example, transceiver module 1701 can be used to perform all transceiver operations performed by the receiving device in the embodiment shown in FIG10, and / or to support other processes of the technology described herein; processing module 1702 can be used to perform all operations other than transceiver operations performed by the receiving device in the embodiment shown in FIG10, and / or to support other processes of the technology described herein.

[0350] As another possible implementation, the transceiver module 1601 in Figure 16 can be replaced by a transceiver that integrates the functions of the transceiver module 1601; the processing module 1602 can be replaced by a processor that integrates the functions of the processing module 1602. Furthermore, the transmitting device 160 shown in Figure 16 may also include a memory. Alternatively, the transceiver module 1701 in Figure 17 can be replaced by a transceiver that integrates the functions of the transceiver module 1701; the processing module 1702 can be replaced by a processor that integrates the functions of the processing module 1702. Furthermore, the receiving device 170 shown in Figure 17 may also include a memory.

[0351] Alternatively, when the processing module 1602 is replaced by a processor and the transceiver module 1601 is replaced by a transceiver, the transmitting end device 160 involved in the embodiments of this application can also be the communication device 180 shown in FIG18. Or, when the processing module 1702 is replaced by a processor and the transceiver module 1701 is replaced by a transceiver, the receiving end device 170 involved in the embodiments of this application can also be the communication device 180 shown in FIG18.

[0352] The processor can be logic circuit 1801, and the transceiver can be interface circuit 1802. Furthermore, the communication device 180 shown in FIG18 may also include a memory 1803.

[0353] This application also provides a computer program product that, when executed by a computer, can implement the functions of any of the above method embodiments.

[0354] This application also provides a computer program that, when executed by a computer, can implement the functions of any of the above method embodiments.

[0355] This application also provides a computer-readable storage medium. All or part of the processes in the above method embodiments can be implemented by a computer program instructing related hardware. This program can be stored in the computer-readable storage medium, and when executed, it can include the processes of the above method embodiments. The computer-readable storage medium can be an internal storage unit of the terminal (including a data sending device and / or a data receiving device) of any of the foregoing embodiments, such as the terminal's hard disk or memory. The computer-readable storage medium can also be an external storage device of the terminal, such as a plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, etc., equipped on the terminal. Further, the computer-readable storage medium can include both the terminal's internal storage unit and external storage devices. The computer-readable storage medium is used to store the computer program and other programs and data required by the terminal. The computer-readable storage medium can also be used to temporarily store data that has been output or will be output.

[0356] The terms "first" and "second," etc., used in the specification, claims, and drawings of this application are used to distinguish different objects, not to describe a specific order. "First" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined with "first" and "second" may explicitly or implicitly include one or more of that feature. In the description of this embodiment, unless otherwise stated, "a plurality of" means two or more.

[0357] Furthermore, the terms “comprising” and “having”, and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the steps or units listed, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to such process, method, product, or apparatus.

[0358] In this application, "at least one (item)" means one or more. "More than one" means two or more. "At least two (items)" means two or three or more. "And / or" is used to describe the relationship between related objects, indicating that there can be three relationships. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the related objects before and after are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple. "...when" and "if" both mean that a corresponding action will be taken under certain objective circumstances, not a time limit, nor do they require a judgment action at the time of implementation, nor do they imply any other limitations.

[0359] In the embodiments of this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design that is described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a specific manner to facilitate understanding.

[0360] In this application, "sending information to...(terminal device)" can be understood as the destination of the information being the terminal device. This can include sending information directly or indirectly to the terminal device. "Receiving information from...(terminal device)" can be understood as the source of the information being the terminal device, and can include receiving information directly or indirectly from the terminal device. Information may undergo necessary processing between the source and destination, such as format changes, but the destination can understand the valid information from the source.

[0361] Through the above description of the embodiments, those skilled in the art can clearly understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0362] In the several embodiments provided in this application, the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed. Furthermore, the displayed or discussed mutual couplings, direct couplings, or communication connections may be through some interfaces; indirect couplings or communication connections between devices or units may be electrical, mechanical, or other forms.

[0363] The units described as separate components may or may not be physically separate. A component shown as a unit can be one or more physical units; that is, it can be located in one place or distributed in multiple different locations. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0364] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0365] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solution of this application embodiment, or all or part of the technical solution, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause a device (which may be a microcontroller, chip, etc.) or processor to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, ROM, RAM, magnetic disks, or optical disks.

Claims

1. A communication method, characterized in that, The method includes: A Cyclic Redundancy Check (CRC) sequence is determined based on a first sequence and a first polynomial; wherein the first sequence is obtained by inserting Y zeros at every X positions in the information bit sequence; X is less than the length A of the information bit sequence; Y is a positive integer; and the first polynomial is determined based on the first sequence. The information bit sequence is pre-encoded according to the CRC sequence.

2. The method according to claim 1, characterized in that, The method further includes: The first value B is equal to the floor result of the ratio of A to X; or, The first value B is equal to the ratio of A to X minus 1; Wherein, B is the number of the first bit set included in the first sequence, and the first bit set includes the Y zeros.

3. The method according to claim 1, characterized in that, The method further includes: Insert the Y zeros at the end of the information bit sequence.

4. The method according to claim 3, characterized in that, The first value B is equal to the floor of the ratio of A to X; or, The first value B is equal to the ratio of A to X; Wherein, B is the number of the first bit set included in the first sequence, and the first bit set includes the Y zeros.

5. The method according to any one of claims 1-4, characterized in that, The first polynomial is determined based on the first sequence, including: The first polynomial is determined based on the information bit sequence, A, the length L of the CRC sequence, X, Y, and a first value B.

6. The method according to any one of claims 1-5, characterized in that, The degree of the i-th monomial in the first polynomial is obtained from B, Y, A, and L; where i = [0, 1, ..., A-1 + B*Y], and the degree of the 0th monomial is the degree of the first polynomial.

7. The method according to claim 6, characterized in that, The coefficient of the i-th monomial is obtained from the i-th bit of the first sequence.

8. The method according to any one of claims 1-7, characterized in that, The first polynomial includes A+L+B*Y monomials.

9. The method according to any one of claims 6-8, characterized in that, The first polynomial is: Wherein, a0, a1, ..., a A-1 The information bits included in the information bit sequence are p0, p1, ..., p1. L-1 is the CRC bit in the CRC sequence.

10. A communication method, characterized in that, The method includes: Obtain the sequence to be verified; CRC verification is performed according to a second sequence and a second polynomial; wherein, the second sequence is obtained by inserting Y zeros into every X positions in the first Z minus L positions of the sequence to be verified; X is less than the difference between the length Z of the sequence to be verified and the length L of the CRC sequence; Y is a positive integer; the second polynomial is determined according to the second sequence.

11. The method according to claim 10, characterized in that, The method further includes: The first value B is equal to the floor result of the ratio of the difference between Z and L to X; or, The first value B is equal to the ratio of the difference between Z and L to X minus 1; Wherein, the first value B is the number of the first bit set included in the second sequence, and the first bit set includes the Y zeros.

12. The method according to claim 10, characterized in that, The method further includes: Insert the Y zeros immediately following the Z-Lth position of the sequence to be verified.

13. The method according to claim 12, characterized in that, The first value B is equal to the floor result of the ratio of the difference between Z and L to X; or, The first value B is equal to the ratio of the difference between Z and L to X.

14. The method according to any one of claims 10-13, characterized in that, The second polynomial is determined according to the second sequence, including: The second polynomial is determined based on the sequence to be verified, Z, L, X, Y, and a first value B; wherein the first value B is the number of bits in the first bit set included in the second sequence, and the first bit set includes Y zeros.

15. The method according to claim 14, characterized in that, The degree of the i-th monomial in the second polynomial is obtained from B, Y, Z, and L; where i = [0, 1, ..., ZL-1 + B*Y], and the degree of the 0th monomial is the degree of the second polynomial.

16. The method according to claim 15, characterized in that, The coefficient of the i-th monomial is obtained from the i-th bit of the second sequence.

17. The method according to any one of claims 11-16, characterized in that, The second polynomial includes Z + B*Y monomials.

18. The method according to any one of claims 11-17, characterized in that, The second polynomial is: Wherein, b0, b1, ..., b Z-1 The information bits included in the sequence to be verified.

19. The method according to any one of claims 1-18, characterized in that, X is a positive integer; or X is obtained from L.

20. The method according to any one of claims 1-19, characterized in that, X is an integer power of 2.

21. The method according to any one of claims 1-20, characterized in that, The X is 2 L-1 .

22. The method according to any one of claims 1-21, characterized in that, The Y is a positive integer; or The Y is obtained from the L; or Y is a prime number.

23. The method according to any one of claims 1-22, characterized in that, Y is the largest prime number less than or equal to the second value; the second value is determined based on X.

24. A communication device, characterized in that, The communication device includes a module or unit for performing the method as described in any one of claims 1-9, 19-23, or the communication device includes a module or unit for performing the method as described in any one of claims 10-23.

25. A communication device, characterized in that, The communication device includes a processor configured to support the communication device in performing the method as described in any one of claims 1-9, 19-23, or in performing the method as described in any one of claims 10-23.

26. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that, when executed on a computer, cause the computer to perform the method as described in any one of claims 1-9, 19-23, or cause the computer to perform the method as described in any one of claims 10-23.

27. A computer program product, characterized in that, The computer program product includes computer instructions that, when executed on a computer, cause the computer to perform the method as described in any one of claims 1-9, 19-23, or cause the computer to perform the method as described in any one of claims 10-23.

28. A chip, characterized in that, The method includes a processor coupled to a memory for storing programs or instructions that, when executed by the processor, cause the method as described in any one of claims 1-9, 19-23 to be performed, and cause a computer to perform the method as described in any one of claims 10-23.

29. A communication system, characterized in that, It includes a communication device for performing the method as described in any one of claims 1-9, 19-23, and a communication device for performing the method as described in any one of claims 10-23.

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