Pixel circuit, display device, and control method of pixel circuit

The pixel circuit stabilizes current and slope signals using a current mirror configuration to address precision issues in micro LED display devices, ensuring consistent light emission despite fluctuations, thereby enhancing display quality.

WO2026127489A1PCT designated stage Publication Date: 2026-06-18SAMSUNG ELECTRONICS CO LTD

Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
SAMSUNG ELECTRONICS CO LTD
Filing Date
2025-12-02
Publication Date
2026-06-18

AI Technical Summary

Technical Problem

Existing pixel circuits using micro LEDs for display devices face challenges in precise light emission due to fluctuations in constant current and slope signal precision, particularly from voltage drops and IR drops, leading to inconsistent brightness.

Method used

A pixel circuit design incorporating a current source, switch, comparator, and slope signal generation circuit, utilizing a current mirror configuration to stabilize current and slope signals, ensuring precise light emission by compensating for fluctuations.

🎯Benefits of technology

The design achieves high-precision light emission by stabilizing current and slope signals, maintaining consistent brightness despite fluctuations, reducing circuit size, and minimizing noise susceptibility.

✦ Generated by Eureka AI based on patent content.

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Abstract

Provided are a pixel circuit enabling a light-emitting element to emit light with high precision, a display device, and a control method of the pixel circuit. The pixel circuit, according to the present disclosure, comprises: a current source circuit generating a first current; a slope signal generation circuit generating a slope signal having a linearly varying potential, by using a second current proportional to the first current; and a pulse width modulation (PWM) driving circuit supplying the first current to a light-emitting element during a period according to a result of comparing the slope signal and an image signal.
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Description

Pixel circuit, display device, and control method of pixel circuit

[0001] The present disclosure relates to a pixel circuit, a display device, and a method for controlling the pixel circuit.

[0002] Recently, the development of a display device in which a self-emissive light-emitting element, such as a micro LED (hereinafter referred to as micro LED), is mounted in a two-dimensional matrix shape is underway. Here, when a micro LED is used as a light-emitting element, the gradation expression of the light-emitting element can be performed by pulse width modulation (PWM) in order to suppress color shift of light emission.

[0003] Driving of a light-emitting element is achieved by supplying a constant current to the light-emitting element for a period corresponding to the pulse width of a PWM signal generated by comparing an image signal with a slope signal (e.g., a ramp signal), which is a voltage signal in the shape of a sawtooth or triangular wave. Therefore, in order to make the light-emitting element emit light with high precision, precise control of the slope signal and / or the constant current is required. For example, Patent Document 1 (Japanese Patent Publication No. 2002-139217) discloses a slope signal generation circuit capable of generating a high-precision slope signal and a pixel circuit using the same.

[0004] However, the configuration disclosed in Patent Document 1 only improves the precision of the slope signal and does not take into account fluctuations in the constant current supplied to the light-emitting element (e.g., voltage drop such as fluctuations in the characteristics of the current source or IR drop), so in a configuration in which the light-emitting element emits light by supplying a constant current, the light-emitting element could not emit light with high precision.

[0005] According to various embodiments of the present disclosure, a pixel circuit, a display device, and a method for controlling the pixel circuit may be provided, which can emit light with high precision by including a current source set to output a constant current (Iled), a switch for controlling the conduction and interruption of a driving current, a comparator set to generate a PWM signal, and a slope generation circuit set to generate a slope (in other words, a ramp) signal input to one end of the comparator, and by arranging the current source set to output a constant current and the current source set to generate a slope signal as a current mirror circuit.

[0006] A pixel circuit according to the present disclosure includes a current source circuit that generates a first current, a slope signal generating circuit that generates a slope signal in which the potential changes linearly using a second current proportional to the first current, a period based on the result of comparing the slope signal and an image signal, and a Pulse Width Modulation (PWM) driving circuit that supplies the first current to a light-emitting element.

[0007] A pixel circuit according to the present disclosure comprises a current source circuit that generates a first current, a slope signal generating circuit that generates a slope signal in which the potential changes linearly using a second current proportional to the first current, a period based on the result of comparing the slope signal and the image signal, and a plurality of PWM (Pulse Width Modulation) driving circuits that supply the first current to each of a plurality of light-emitting elements.

[0008] A control method for a pixel circuit according to the present disclosure generates a first current by a current source circuit, generates a slope signal in which the potential changes linearly by using a second current proportional to the first current by a slope signal generation circuit, and supplies the first current to a light-emitting element for a period of time based on the result of comparing the slope signal and the image signal by a Pulse Width Modulation (PWM) driving circuit.

[0009] FIG. 1 is a circuit diagram showing an example of the configuration of a pixel circuit according to Embodiment 1 of the present disclosure.

[0010] Figure 2 is a timing chart showing the operation of the pixel circuit illustrated in Figure 1.

[0011] FIG. 3 is a circuit diagram showing a first modified example of a pixel circuit according to Embodiment 1 of the present disclosure.

[0012] Figure 4 is a diagram showing an example of the application of the pixel circuit illustrated in Figure 3.

[0013] FIG. 5 is a circuit diagram showing a second modified example of a pixel circuit according to Embodiment 1 of the present disclosure.

[0014] Figure 6 is a timing chart showing the operation of the pixel circuit illustrated in Figure 5.

[0015] FIG. 7 is a circuit diagram showing a third variation example of a pixel circuit according to Embodiment 1 of the present disclosure.

[0016] Figure 8 is a timing chart showing the operation of the pixel circuit illustrated in Figure 7.

[0017] FIG. 9 is a circuit diagram showing a fourth modified example of a pixel circuit according to Embodiment 1 of the present disclosure.

[0018] FIG. 10 is a circuit diagram showing a fifth variation example of a pixel circuit according to Embodiment 1 of the present disclosure.

[0019] FIG. 1 is a circuit diagram showing an example of the configuration of a pixel circuit (1) according to an embodiment of the present disclosure. FIG. 1 also shows a light-emitting element (D1) driven by the pixel circuit (1). The light-emitting element (D1) according to one embodiment of the present disclosure may include a self-emissive light-emitting element such as a micro LED. In the present disclosure, the case where the light-emitting element (D1) is a micro LED is described as an example.

[0020] A pixel circuit (1) according to one embodiment of the present disclosure may also be referred to as a micro IC (μIC) and may include a circuit that drives a light-emitting element (D1) to emit light. For example, the pixel circuit (1) may include a slope signal generation circuit (10), a current source circuit (20), and / or a PWM driving circuit (30).

[0021] A slope signal generating circuit (10) according to one embodiment of the present disclosure may be configured to generate a slope signal (Vslp) in which the potential changes linearly from an initial potential (Vslp_init) toward a set potential (in other words, a reference potential (Vss)) at a specified period. In this example, the slope signal generating circuit (10) may be configured to generate a sawtooth-shaped slope signal (Vslp) that gradually rises and falls at a predetermined period. Hereinafter, the term potential of the slope signal (Vslp) may be referred to as potential (Vslp).

[0022] A current source circuit (20) according to one embodiment of the present disclosure may be configured to output a constant current (Iled).

[0023] A PWM driving circuit (30) according to one embodiment of the present disclosure controls the supply of a constant current (Iled) to a light-emitting element (D1) by a PWM signal (S1) of pulse width according to the result of comparing a slope signal (Vslp) and an image signal (Vpwm). A PWM driving circuit (30) according to one embodiment of the present disclosure may be configured to supply a constant current (Iled) to the light-emitting element (D1) for a period corresponding to at least a portion of the pulse width of the PWM signal (S1).

[0024] For example, a slope signal generation circuit (10) according to one embodiment of the present disclosure may include a switch element (SW12), a switch element (SW13), a capacitance element (C11) representing a capacitance value (Cslp), and / or a transistor (MN12) which is an N-channel MOS transistor. A current source circuit (20) according to one embodiment of the present disclosure may include a transistor (MN11) which is an N-channel MOS transistor. A PWM driving circuit (30) according to one embodiment of the present disclosure may include a switch element (SW11) and a comparator (CMP1).

[0025] A light-emitting element (D1) according to one embodiment of the present disclosure may be positioned between a terminal (hereinafter referred to as terminal (Vand)) to which a potential (Vand) is supplied and a terminal (hereinafter referred to as terminal (Vss)) to which a reference potential (Vss) is supplied. For example, the light-emitting element (D1) may be positioned such that its anode is connected to the terminal (Vand) side and its cathode is connected to the terminal (Vss) side. However, the positioning method of the light-emitting element (D1) is not limited by this.

[0026] A switch element (SW11) according to one embodiment of the present disclosure may be arranged in series with a light-emitting element (D1). For example, the switch element (SW11) may be arranged between the cathode and the terminal (Vss) of the light-emitting element (D1). The switch element (SW11) may be set to an ON state when the PWM signal (S1) output from the comparator (CMP1) is active (e.g., high (H) level), and may also be set to an OFF state when it is inactive (e.g., low (L) level).

[0027] A transistor (MN11) according to one embodiment of the present disclosure may be arranged in series with a light-emitting element (D1) and a switch element (SW11). For example, the transistor (MN11) may be arranged between the switch element (SW11) and the terminal (Vss). The transistor (MN11) may be configured to allow a constant current (Iled) to flow between the source and the drain as the potential of a control signal (Vpam) supplied from the outside (hereinafter referred to as potential (Vpam)) is supplied to the gate. For example, the constant current (Iled) may be changed by controlling the potential of the control signal (Vpam) supplied from the outside.

[0028] A transistor (MN12) according to one embodiment of the present disclosure may be positioned between a node (N1) representing the potential of a slope signal (Vslp) and a terminal (Vss). In the transistor (MN12), a potential (Vpam) may be supplied to the gate to set a current (Islp) to flow between the source and the drain. For example, transistors (MN11, MN12) may be positioned using a current mirror method. For example, the current (Islp) flowing between the source and the drain of transistor (MN12) may be proportional to the current (Iled) flowing between the source and the drain of transistor (MN11). The terms "current mirror" and / or "current mirror circuit" as used in the present disclosure may refer to an integrated circuit (IC) design technique that uses multiple (e.g., two) transistors to create a copy of the current flowing in one direction on the other.

[0029] Additionally, the transistors (MN11, MN12) according to one embodiment of the present disclosure may be configured such that the gate length of the transistors (MN11, MN12) is extended, or they may be placed close to each other, and / or they may be placed together with a dummy transistor so that the characteristic deviation of the transistors (MN11, MN12) becomes substantially the same.

[0030] A switch element (SW12) according to one embodiment of the present disclosure may be disposed between a node (N1) and a terminal (Vss) and may be connected in series to a transistor (MN12). For example, the switch element (SW12) may be disposed between the node (N1) and the drain of the transistor (MN12). A switch element (SW13) may be disposed between a terminal (hereinafter referred to as terminal (Vslp_init)) to which the initial potential (Vslp_init) of a slope signal (Vslp) is supplied and the node (N1).

[0031] A switch element (SW12) according to one embodiment of the present disclosure may be set to an ON state when the control signal (em) is active (e.g., H level) and may be set to an OFF state when it is inactive (e.g., L level). A switch element (SW13) may be set to an ON state when the control signal (emb), which is the inverted signal of the control signal (em), is active (e.g., H level) and may be set to an OFF state when it is inactive (e.g., L level). That is, the switch elements (SW12, SW13) may be set to switch ON / OFF complementarily. The switch elements (SW12, SW13) may include a selection circuit set to switch whether to connect the node (N1) to an initial potential ((Vslp_init)) or to connect the node (N1) to a reference potential (Vss) through the transistor (MN12).

[0032] A capacitance element (C11) according to one embodiment of the present disclosure may be placed in parallel with a switch element (SW13) between a terminal (Vslp_init) and a node (N1). The potential of the node (N1) may be used as the potential of the slope signal (Vslp).

[0033] In a slope signal generation circuit (10) according to one embodiment of the present disclosure, when the control signal (em) is set to inactive (L level) in a resting mode, the switch element (SW12) can be turned off and the switch element (SW13) can be turned on. For example, the potential (Vs1p) of the node (N1) (e.g., the potential of the slope signal (Vslp)) can represent an initial potential (Vslp_init). When the operation mode according to one embodiment of the present disclosure is switched from a resting mode to a light-emitting mode, the control signal (em) is set to active (H level), so that the switch element (SW12) is turned on and the switch element (SW13) can be turned off. For example, the potential (Vslp) of the node (N1) can decrease linearly from the initial potential (Vslp_init) toward a reference potential (set potential) (Vss).

[0034] A comparator (CMP1) according to one embodiment of the present disclosure may be configured to compare a slope signal (Vslp) and a video signal (Vpwm) and output the comparison result as a PWM signal (S1). According to one embodiment of the present disclosure, the on / off state of a switch element (SW11) may be switched by the PWM signal (S1). For example, if the value of the slope signal (Vslp) (e.g., a ramp signal) according to one embodiment of the present disclosure has a value greater than or equal to the video signal (Vpwm) (e.g., the interval from t11 to t12 in FIG. 2), the comparator (CMP1) may set the PWM signal (S1) to active (H level). Accordingly, the switch element (SW11) may be set to the ON state. Accordingly, when the value of the slope signal (Vslp) is less than the value of the image signal (Vpwm) (e.g., the interval from t12 to t14 in FIG. 2), the comparator (CMP1) can set the PWM signal (S1) to inactive (L level). Accordingly, the switch element (SW11) can be set to an off state.

[0035] FIG. 2 is a timing chart showing the operation of a pixel circuit (1). A pixel circuit (1) according to one embodiment of the present disclosure may be configured to repeatedly emit light from a light-emitting element (D1) by repeating a combination of operation in a resting mode and operation in a light-emitting mode.

[0036] Referring to FIG. 2, in the idle mode, the switch element (SW12) can be turned off and the switch element (SW13) can be turned on by setting the control signal (em) to the L level (time t10). Accordingly, the potential of the slope signal (Vslp) can represent the initial potential (Vslp_init) (time t10~t11). Also, in the idle mode, the potential (Vand) can be set to the same value as the reference potential (Vss). Thus, regardless of the on / off state of the switch element (SW11), the supply of current (Iled) from the current source circuit (20) to the light-emitting element (D1) can be cut off.

[0037] According to one embodiment of the present disclosure, the operation mode is switched from a resting mode to a light-emitting mode, and the control signal (em) is set to an H level, so that the switch element (SW12) is turned on and the switch element (SW13) is turned off (time t11). Accordingly, the potential of the slope signal (Vslp) can be linearly decreased from the initial potential (Vslp_init) toward the reference potential (Vss) (times t11 to t14). In addition, in the light-emitting mode, the potential (Vand) can be set to a value substantially the same as the power supply potential (Vdd). Thus, when the switch element (SW11) is turned on, the supply of current (Iled) from the current source circuit (20) to the light-emitting element (D1) can be performed.

[0038] In a light emission mode according to one embodiment of the present disclosure, a comparator (CMP1) may be configured to compare a slope signal (Vslp) in which the potential decreases linearly with an image signal (Vpwm) and output the comparison result as a PWM signal (S1). An image signal (Vpwm) according to one embodiment of the present disclosure may be input to a pixel circuit (1) (e.g., comparator (CMP1)).

[0039] In the example of FIG. 2, after the potential of the slope signal (Vslp) begins to decrease linearly, and since the slope signal (Vslp) is greater than the image signal (Vpwm), the comparator (CMP1) can be configured to output an H-level PWM signal (S1) (e.g., time t11 to t12). While the comparator (CMP1) is outputting the H-level PWM signal (S1), the switch element (SW11) is turned on, so current (Iled) can be supplied to the light-emitting element (D1) from the current source circuit (20). By this, the light-emitting element (D1) can be configured to emit light (time t11 to t12). Afterwards, when the potential of the slope signal (Vslp) decreases further and becomes less than the image signal (Vpwm), the comparator (CMP1) can output an L-level PWM signal (S1) (time t12 to t14). While the comparator (CMP1) outputs an L-level PWM signal (S1), the switch element (SW11) is turned off, so current (Iled) is not supplied to the light-emitting element (D1) from the current source circuit (20). As a result, the light-emitting element (D1) can be set to turn off (e.g., time t12~t14).

[0040] According to one embodiment of the present disclosure, at time points t14 to t18, substantially the same process as at time points t10 to t14 can be performed. For example, for one input of an image signal (Vpwm), the linear change from the initial potential of the slope signal (Vslp) is repeated two or more times, so that the light emission of the light-emitting element (D1) for one input of an image signal (Vpwm) can be time-divided two or more times.

[0041] According to one embodiment of the present disclosure, in each light emission mode, since the comparator (CMP1) outputs a PWM signal (S1) with a pulse width corresponding to the image signal (Vpwm), the light-emitting element (D1) can emit light for a period corresponding to the image signal (Vpwm). For example, the light-emitting element (D1) may be set to emit light with a brightness corresponding to the image signal (Vpwm).

[0042] According to one embodiment of the present disclosure, in the pixel circuit (1), due to the influence of characteristic deviation or IR drop, the current (Iled) may fluctuate to a value different from a preset value, or the slope signal (Vslp) may change linearly to a slope different from a preset slope. According to one embodiment of the present disclosure, even in such cases, the pixel circuit (1) generates a slope signal (Vslp) using a current (Islp) proportional to the current (Iled), and by linking the slopes of the current (Iled) and the slope signal (Vslp), the error component caused by characteristic deviation or IR drop of a specific element (e.g., current source) can be offset, so the light-emitting element (D1) can emit light with high precision (e.g., at a constant level). For example, according to one embodiment of the present disclosure, even if a change in characteristics occurs for a specific element (e.g., a current source) and the slope of the slope signal changes, the product of the value of the driving current (Iled) applied to the light-emitting module and the time interval during which the H level is maintained in the PWM signal (e.g., the time interval of the PWM signal corresponding to the light-emitting interval of the light-emitting module) depends on the image signal input value (e.g., a voltage value). Therefore, even if a change in characteristics occurs in the current source, the light-emitting module can be controlled according to a substantially constant level of brightness.

[0043] According to one embodiment of the present disclosure, the pixel circuit (1) can set the slope of the slope signal (Vslp) to be smaller as the current (Iled) becomes lower than a predetermined value, and the slope of the slope signal (Vslp) to be larger as the current (Iled) becomes higher than a predetermined value. Similarly, the pixel circuit (1) can set the value of the current (Iled) to be lower as the slope of the slope signal (Vslp) becomes lower than a predetermined slope, and the value of the current (Iled) to be higher as the slope of the slope signal (Vslp) becomes larger than a predetermined value. Accordingly, in each light emission mode, fluctuations in the time integral value of the current (Iled) supplied to the light-emitting element (D1) (e.g., charge supplied to the light-emitting element (D1)) can be suppressed. For example, in each light emission mode, the time integral value of the current (Iled) supplied to the light-emitting element (D1) can be maintained at a specified value even if the current (Iled) or the slope of the slope signal (Vslp) fluctuates. As a result, the light-emitting element (D1) can emit light at a substantially constant brightness according to the image signal (Vpwm).

[0044] In the example of FIG. 2, even when the current (Iled) fluctuates to a value (dotted line) lower than the desired value (solid line), the slope signal (Vslp) changes to a slope (dotted line) smaller than the desired slope (solid line), so the lighting period of the light-emitting element (D1) changes to a period t11~t13, which is longer than the period t11~t12. Therefore, the time integral value of the current (Iled) supplied to the light-emitting element (D1) is maintained at the desired value according to the image signal (Vpwm). As a result, the light-emitting element (D1) can emit light with a constant brightness according to the image signal (Vpwm).

[0045] According to one embodiment of the present disclosure, the current (Iled) flowing through the transistor (MN11) can be expressed by the following Equation 1. In Equation 1, βled represents a coefficient regarding the mobility (e.g., carrier mobility) of the transistor (MN11), Vpam represents the potential supplied to the gate of the transistor (MN11), Vss represents the reference potential (=0V), and Vth represents the threshold voltage of the transistor (MN11). The term "mobility" as used in the present disclosure may refer to a measure indicating how quickly charge carriers (e.g., electrons or holes) can move within the transistor under an electric field.

[0046]

[0047] In addition, the current (Islp) flowing through the transistor (MN12) is expressed as shown in Equation 2 below. In Equation 2, βslp represents a coefficient regarding the mobility of the transistor (MN12), Vpam represents the potential supplied to the gate of the transistor (MN12), and Vth represents the threshold voltage of the transistor (MN12).

[0048]

[0049] According to one embodiment of the present disclosure, since the transistors (MN11, MN12) form a current mirror, the threshold voltage (Vth) of each transistor (MN11, MN12) can be substantially the same. For this reason, from Equations 1 and 2, the current (Is1p) is expressed as shown in Equation 3 below.

[0050]

[0051] In Equation 3, the lighting period (period of time t11 to t12) Δt of the light-emitting element (D1) is expressed as shown in Equation 4 below. In Equation 4, Cslp represents the capacitance value of the capacitance element (C11), and ΔV represents the difference between the potential (Vslp_init) and the potential (Vpwm).

[0052]

[0053] Therefore, the time integral value of the current (Iled), Iled × Δt, is expressed as shown in Equation 5 below.

[0054]

[0055] In Equation 5, βled / βslp can be practically constant because the transistors (MN11, MN12) are arranged using a current mirror method. Therefore, Iled × Δt, which is the time integral value of the current (Iled), depends only on the value ΔV (= Vslp_init-Vpwm) corresponding to the image signal, and can be unaffected by variations in the current (Iled) or slope variations of the slope signal (Vslp) caused by deviations in the characteristics of the current source, IR drop, etc. Additionally, variations in the displacements βled and βslp of each transistor (MN11, MN12) can be eliminated.

[0056] In this way, the pixel circuit (1) according to the present disclosure may be configured to control the supply of a constant current (Iled) from a current source circuit (20) to a light-emitting element (D1) using a slope signal (Vslp) in which the slope of the linear change of potential is related to the constant current (Iled). For example, the pixel circuit (1) according to the present disclosure may generate a slope signal (Vslp) using a current (Islp) that is proportional to the current (Iled). Accordingly, since the pixel circuit (1) according to the present disclosure can offset error components caused by characteristic deviations of a specific element (e.g., current source) or IR drop, the light-emitting element (D1) can emit light with high precision (e.g., so that the light-emitting module has substantially constant brightness).

[0057] In addition, unlike related technologies that correct only fluctuations in the threshold voltage of a transistor serving as a constant current source, the pixel circuit (1) according to the present disclosure arranges the transistors (MN11, MN12) in a current mirror manner, thereby canceling out not only fluctuations in the threshold voltage of the transistors (MN11, MN12) but also fluctuations in mobility, so the light-emitting element (D1) can emit light with higher precision. Furthermore, unlike related technologies that require dynamic operation to correct the threshold voltage, the pixel circuit (1) according to the present disclosure operates statically, so it is less susceptible to noise.

[0058] In addition, since the pixel circuit (1) according to the present disclosure does not use a plurality of operational amplifiers, the circuit size can be reduced.

[0059] In addition, in the pixel circuit (1) according to the present disclosure, the PWM driving circuit (30) drives one light-emitting element (D1) to emit light, but is not limited thereto, and the PWM driving circuit (30) can selectively drive two or more light-emitting elements (D1) to emit light. The pixel circuits (1a to 1e) described below can also likewise selectively drive two or more light-emitting elements (D1) to emit light.

[0060] FIG. 3 is a circuit diagram showing a first variation example of a pixel circuit (1) as a pixel circuit (1a). In a pixel circuit (1a) according to one embodiment of the present disclosure, each slope signal generation circuit (10) and current source circuit (20) of a plurality of pixel circuits (1) can be commonalized (e.g., commonalization of elements, commonalization of voltage, etc.). In the example of FIG. 3, each slope signal generation circuit (10) and current source circuit (20) of 12 pixel circuits (1) can be commonalized in the pixel circuit (1a). For example, each slope signal generation circuit and current source circuit (20) of any number of pixel circuits (1) can be commonalized in the pixel circuit (1a). For example, a pixel circuit (1a) according to one embodiment of the present disclosure may include a slope signal generation circuit (10), a current source circuit (20), and 12 PWM driving circuits (30_1 to 30_12). At least one PWM driving circuit (30_1 to 30_12) may include a circuit configuration substantially identical to that of the PWM driving circuit (30). Each PWM driving circuit (30_1 to 30_12) may be configured to drive a light-emitting element (D1 to D12) to emit light. Since the operation of each component of the pixel circuit (1a) may be substantially the same as that of the pixel circuit (1), details are omitted.

[0061] FIG. 4 is a drawing showing an example of the application of a pixel circuit (1a). In the example of FIG. 4, the pixel circuit (1a) is applied to a display device (100).

[0062] As illustrated in FIG. 4, a plurality of self-emissive light-emitting elements are arranged in a two-dimensional matrix shape in a panel portion of a display device (100) according to one embodiment of the present disclosure. In addition, in the example of FIG. 4, an embodiment is shown in which each light-emitting element includes a micro LED. In addition, in the example of FIG. 4, one pixel circuit (1a) is arranged for 12 light-emitting elements (D1 to D12). That is, one pixel circuit (1a) can be configured to perform PWM driving of the 12 light-emitting elements (D1 to D12).

[0063] For example, as previously explained, the pixel circuit (1a) can compensate for fluctuations in current (Iled) or slope fluctuations in slope signals (Vslp) caused by characteristic deviations or IR drops, so the light-emitting elements (D1~D12) can emit light with high precision.

[0064] In the present disclosure, the case where a pixel circuit (1a) is applied to a display device (100) is described as an example, but a pixel circuit (1) and / or pixel circuits (1b to 1e) described below may be applied to a display device (100). In this case, a plurality of pixel circuits may include a circuit in which a slope signal generation circuit and a current source circuit are common.

[0065] FIG. 5 is a circuit diagram showing a second variation of the pixel circuit (1) as a pixel circuit (1b). The pixel circuit (1b) includes a PWM driving circuit (30b) instead of a PWM driving circuit (30) compared to the pixel circuit (1). The PWM driving circuit (30b) includes a switch element (SW21) instead of a switch element (SW11).

[0066] In a pixel circuit (1) according to one embodiment of the present disclosure, a switch element (SW11) may be placed on the current path of each of the light-emitting element (D1) and the transistor (MN11). In contrast, in a pixel circuit (1b), a switch element (selection circuit) (SW21) is installed on a path separate from the current path of the light-emitting element (D1) and the transistor (MN11).

[0067] For example, a switch element (SW21) according to one embodiment of the present disclosure selects either a potential (Vpam) or a potential (Vss) based on a PWM signal (S1) and outputs it to each gate of transistors (MN11, MN12). In other words, the switch element (SW21) may be configured to select and output, according to the PWM signal (S1), either a control signal (potential Vss) that stops the generation of current (Iled) for transistor (MN11) or a control signal (e.g., potential (Vpam)) that generates current (Iled). Additionally, the switch element (SW21) may be configured to select and output, according to the PWM signal (S1), at least one of a control signal (potential Vss) that stops the generation of current (Islp) for transistor (MN12) and a control signal (e.g., potential (Vpam)) that generates current (Islp). Since the other configuration of the pixel circuit (1b) is the same as that of the pixel circuit (1), the description thereof may be omitted.

[0068] According to one embodiment of the present disclosure, when the PWM signal (S1) is at an L level, the switch element (SW21) may be configured to select a potential (Vss) corresponding to the L level and output it to each gate of the transistors (MN11, MN12). Accordingly, current flows through the transistors (MN11, MN12). In contrast, when the PWM signal (S1) is at an H level, the switch element (SW21) may be configured to select a potential (Vpam) and output it to each gate of the transistors (MN11, MN12). Thus, current (Iled, Islp) flows through the transistors (MN11, MN12), respectively.

[0069] Figure 6 is a timing chart showing the operation of the pixel circuit (1b).

[0070] According to one embodiment of the present disclosure, in a resting mode, the switch element (SW12) can be turned off and the switch element (SW13) turned on by setting the control signal (em) to the L level (time t20). Accordingly, the potential of the slope signal (Vslp) represents the initial potential (Vslp_init) (time t20~t21). Also, in a resting mode, the potential (Vand) is set to the same value as the reference potential (Vss). Accordingly, regardless of the state of the switch element (SW21), the supply of current (Iled) from the current source circuit (20) to the light-emitting element (D1) is cut off.

[0071] According to one embodiment of the present disclosure, the operation mode is switched from a resting mode to a light-emitting mode, and the control signal (em) is set to an H level, so that the switch element (SW12) is turned on and the switch element (SW13) can be turned off (time t21). Thereby, the potential of the slope signal (Vslp) begins to decrease linearly from the initial potential (Vslp_init) toward the reference potential (Vss) (time t21). In addition, in the light-emitting mode, the potential (Vand) is set to the same value as the power supply potential (Vdd). Accordingly, when the switch element (SW11) conducts the transistor (MN11), current (Iled) is supplied from the current source circuit (20) to the light-emitting element (D1).

[0072] In a light emission mode according to one embodiment of the present disclosure, a comparator (CMP1) compares a slope signal (Vslp) in which the potential decreases linearly with an image signal (Vpwm) and outputs the comparison result as a PWM signal (S1). The image signal (Vpwm) according to one embodiment of the present disclosure may be input to a pixel circuit (e.g., a comparator).

[0073] In the example of FIG. 6, after the potential of the slope signal (Vslp) begins to decrease linearly, and since the slope signal (Vslp) is greater than the image signal (Vpwm), the comparator (CMP1) can output an H-level PWM signal (S1) (time t21–t22). While the comparator (CMP1) outputs the H-level PWM signal (S1), the switch element (SW11) selects and outputs a potential (Vpam), so current (Iled) is supplied from the current source circuit (20) to the light-emitting element (D1). Therefore, the light-emitting element (D1) turns on (time t21–t22). Afterwards, when the potential of the slope signal (Vslp) decreases and becomes less than the image signal (Vpwm), the comparator (CMP1) can output an L-level PWM signal (S1) (time t22–t24). While the comparator (CMP1) outputs an L-level PWM signal (S1), the switch element (SW11) selects and outputs a potential (Vss), so current (Iled) is not supplied from the current source circuit (20) to the light-emitting element (D1). Therefore, the light-emitting element (D1) is turned off (time t22–t24). In addition, at this time, not only is the transistor (MN11) of the current source circuit (20) turned off, but the transistor (MN12) is also turned off. As a result, the potential of the slope signal (Vslp) is maintained at the potential (Vpwm) (time t22–t24).

[0074] After that, at times t24 to t28, the same processing as at times t20 to t24 is performed.

[0075] In each light emission mode, since the comparator (CMP1) outputs a PWM signal (S1) with a pulse width corresponding to the image signal (Vpwm), the light-emitting element (D1) emits light for a period corresponding to the image signal (Vpwm). That is, the light-emitting element (D1) emits light with a brightness corresponding to the image signal (Vpwm).

[0076] In the example of FIG. 6, even when the current (Iled) changes to a value (dotted line) lower than the desired value (solid line), the slope signal (Vslp) changes to a slope (dotted line) smaller than the desired slope (solid line) in conjunction with this, so the lighting period of the light-emitting element (D1) changes to a period t21~t23, which is longer than the period t21~t22. Accordingly, the time integral value of the current (Iled) supplied to the light-emitting element (D1) is maintained at a specified value according to the image signal (Vpwm). As a result, the light-emitting element (D1) emits light with a desired brightness according to the image signal (Vpwm). For example, according to one embodiment of the present disclosure, even if a change in characteristics occurs for a specific element (e.g., a current source) and the slope of the slope signal changes, the product of the value of the driving current (Iled) applied to the light-emitting module and the time interval during which the H level is maintained in the PWM signal (e.g., the time interval of the PWM signal corresponding to the light-emitting interval of the light-emitting module) depends on the image signal input value (e.g., a voltage value). Therefore, even if a change in characteristics occurs in the current source, the light-emitting module can be controlled according to a substantially constant level of brightness.

[0077] The pixel circuit (1b) according to the present disclosure can produce substantially the same effect as the pixel circuit (1). In addition, the pixel circuit (1b) according to the present disclosure can expand the operating range because the voltage drop can be reduced compared to the case where the switch element (SW21) is installed on the current path of the light-emitting element (D1) by installing the switch element (SW21) on a path separate from the current path of the light-emitting element (D1). Furthermore, the pixel circuit (1b) according to the present disclosure can reduce power consumption because, when turning off the light-emitting element (D1) in each light-emitting mode, it not only blocks the current (Iled) flowing to the light-emitting element (D1) but also blocks the current (Islp) flowing to the slope signal generation circuit (10).

[0078] FIG. 7 is a circuit diagram showing a third variation of the pixel circuit (1) as a pixel circuit (1c). The pixel circuit (1c) includes a slope signal generating circuit (10c) instead of a slope signal generating circuit (10) compared to the pixel circuit (1).

[0079] A slope signal generating circuit (10) according to one embodiment of the present disclosure generates a slope signal (Vslp) in which the potential decreases linearly. In contrast, a slope signal generating circuit (10c) generates a slope signal (Vslp) in which the potential increases linearly. Additionally, in conjunction with this, a comparator (CMP1) inverts the result of comparison between the slope signal (Vslp) and the image signal (Vpwm). The image signal (Vpwm) according to one embodiment of the present disclosure may be input to a pixel circuit (e.g., a comparator).

[0080] Specifically, the slope signal generation circuit (10c) includes a transistor (MN12), a P-channel MOS transistor (MP31, MP32), a switching element (SW32, SW33), and a capacitance element (C31). The switching elements (SW32, SW33) correspond to the switching elements (SW12, SW13) of the pixel circuit (1). The capacitance element (C31) corresponds to the capacitance element (C11) of the pixel circuit (1).

[0081] A transistor (MN12) according to one embodiment of the present disclosure is installed between a terminal (hereinafter referred to as terminal (Vdd)) to which a power supply potential (Vdd) is supplied and a terminal (Vss). In the transistor (MN12), a potential (Vpam) is supplied to the gate, thereby causing a current (Iint) to flow between the source and the drain. Here, the transistors (MN11, MN12) are connected in a current mirror connection. Accordingly, the current (Iint) flowing between the source and the drain of the transistor (MN12) is proportional to the current (Iled) flowing between the source and the drain of the transistor (MN11).

[0082] A transistor (MP31) according to one embodiment of the present disclosure may be placed in series with a transistor (MN12). For example, the transistor (MP31) may be placed between a terminal (Vdd) and the drain of the transistor (MN12). The gate and drain of the transistor (MP31) may be short-circuited. A current (Iint) may be set to flow between the source and drain of the transistor (MP31).

[0083] A transistor (MP32) according to one embodiment of the present disclosure may be positioned between a terminal (Vdd) and a node (N2) representing the potential of a slope signal (Vslp). In the transistor (MP32), the drain potential (gate potential) of the transistor (MP31) is supplied to the gate, thereby allowing a current (Islp) to flow between the source and the drain. For example, the transistors (MP31, MP32) may be positioned in a current mirror configuration. Accordingly, the current (Islp) flowing between the source and the drain of the transistor (MP32) may be proportional to the current (Iint) flowing between the source and the drain of the transistor (MP31). For example, the current (Islp) flowing between the source and the drain of the transistor (MP32) may be proportional to the current (Iled) flowing between the source and the drain of the transistor (MN11).

[0084] A switch element (SW32) according to one embodiment of the present disclosure may be placed in series with a transistor (MP32) between a node (N2) and a terminal (Vdd). For example, the switch (SW32) may be placed between the node (N2) and the drain of the transistor (MP32). A switch element (SW33) may be placed between the node (N2) and a terminal (Vslp_init).

[0085] A switch element (SW32) according to one embodiment of the present disclosure may be configured to turn on when a control signal (em) is active (e.g., H level) and turn off when it is inactive (e.g., L level). A switch element (SW33) may be configured to turn on when a control signal (emb), which is the inverted signal of the control signal (em), is active (e.g., H level) and turn off when it is inactive (e.g., L level). For example, the switch elements (SW32, SW33) may be configured to switch on / off complementarily. The switch elements (SW32, SW33) may include a selection circuit that switches whether to connect the node (N2) to the initial potential (Vslp_init) or to connect the node (N2) to the power potential (Vdd) through the transistor (MP32).

[0086] In addition, the transistors (MP31, MP32) can be configured to have longer gate lengths, be placed close to each other, or be placed together with dummy transistors, thereby making the characteristic deviation substantially the same.

[0087] A capacitance element (C31) according to one embodiment of the present disclosure may be placed in parallel with a switch element (SW33) between a terminal (Vslp_init) and a node (N2). The potential of the node (N2) may be used as the potential of the slope signal (Vslp).

[0088] In a slope signal generation circuit (10c) according to one embodiment of the present disclosure, in a resting mode, the control signal (em) is set to inactive (L level), the switch element (SW32) is turned off, and the switch element (SW33) is turned on. Thus, the potential (Vs1p) of the node (N2) (e.g., the potential of the slope signal (Vslp)) represents the initial potential (Vslp_init). Subsequently, the operation mode is switched from the resting mode to the light-emitting mode, and the control signal (em) is set to active (H level), thereby turning on the switch element (SW32) and turning off the switch element (SW33). Accordingly, the potential (Vslp) of the node (N2) can increase linearly from the initial potential (Vslp_init) toward the power potential (set potential) (Vdd).

[0089] The comparator (CMP1) can be configured to compare the slope signal (Vslp) and the image signal (Vpwm) and output the comparison result as a PWM signal (S1). The on / off state of the switch element (SW11) can be switched by the PWM signal (S1).

[0090] For example, when the slope signal (Vslp) is less than the image signal (Vpwm), the comparator (CMP1) makes the PWM signal (S1) active (H level). As a result, the switch element (SW11) is turned on. Conversely, when the slope signal (Vslp) is greater than or equal to the image signal (Vpwm), the comparator (CMP1) makes the PWM signal (S1) inactive (L level). Consequently, the switch element (SW11) is turned off.

[0091] Figure 8 is a timing chart showing the operation of the pixel circuit (1c).

[0092] According to one embodiment of the present disclosure, in a resting mode, the control signal (em) is set to the L level, thereby turning off the switch element (SW32) and turning on the switch element (SW33) (time t30). Thus, the potential of the slope signal (Vslp) represents the initial potential (Vslp_init) (time t30 to t31). Additionally, in a resting mode, the potential (Vand) is set to the same value as the reference potential (Vss). Therefore, regardless of the on / off state of the switch element (SW11), the supply of current (Iled) from the current source circuit (20) to the light-emitting element (D1) is cut off.

[0093] According to one embodiment of the present disclosure, the operation mode is switched from a resting mode to a light-emitting mode, and the control signal (em) is set to an H level, thereby turning on the switch element (SW32) and turning off the switch element (SW33) (time t31). As a result, the potential of the slope signal (Vslp) increases linearly from the initial potential (Vslp_init) toward the power supply potential (Vdd) (times t31–t34). In addition, in the light-emitting mode, the potential (Vand) is set to the same value as the power supply potential (Vdd). Accordingly, when the switch element (SW11) is turned on, current (Iled) is supplied from the current source circuit (20) to the light-emitting element (D1).

[0094] In a light emission mode according to one embodiment of the present disclosure, a comparator (CMP1) compares a slope signal (Vslp) in which the potential increases linearly with an image signal (Vpwm) and outputs the comparison result as a PWM signal (S1).

[0095] In the example of FIG. 8, for a short time after the potential of the slope signal (Vslp) begins to increase linearly, the comparator (CMP1) outputs an H-level PWM signal (S1) because the slope signal (Vslp) is below the image signal (Vpwm) (times t31–t32). While the comparator (CMP1) outputs the H-level PWM signal (S1), the switch element (SW11) is turned on, so current (Iled) is supplied to the light-emitting element (D1) from the current source circuit (20). As a result, the light-emitting element (D1) lights up (times t31–t32). Afterwards, when the potential of the slope signal (Vslp) increases further and becomes greater than the image signal (Vpwm), the comparator (CMP1) outputs an L-level PWM signal (S1) (times t32–t34). While the comparator (CMP1) outputs an L-level PWM signal (S1), the switch element (SW11) is turned off, so current (Iled) is not supplied to the light-emitting element (D1) from the current source circuit (20). As a result, the light-emitting element (D1) is turned off (time t32~t34).

[0096] After that, at times t34 to t38, the same processing as at times t30 to t34 is performed.

[0097] In each light emission mode, since the comparator (CMP1) outputs a PWM signal (S1) with a pulse width corresponding to the image signal (Vpwm), the light-emitting element (D1) emits light for a period corresponding to the image signal (Vpwm). That is, the light-emitting element (D1) emits light with a brightness corresponding to the image signal (Vpwm).

[0098] In the example of FIG. 8, even when the current (Iled) changes to a value (dotted line) lower than the desired value (solid line), the slope signal (Vslp) changes to a slope (dotted line) smaller than the desired slope (solid line) in conjunction with this, so the lighting period of the light-emitting element (D1) changes to a period t31~t33, which is longer than the period t31~t32. Accordingly, the time integral value of the current (Iled) supplied to the light-emitting element (D1) is maintained at the desired value according to the image signal (Vpwm). As a result, it emits light at a specified brightness according to the image signal (Vpwm).

[0099] The pixel circuit (1c) according to the present disclosure can produce substantially the same effect as the pixel circuit (1) even when the polarity of the slope signal (Vslp) is reversed compared to the pixel circuit (1).

[0100] In a pixel circuit (1c) according to one embodiment of the present disclosure, the current (Iled) is directly controlled by the potential (Vpam), and the current (Islp) is indirectly controlled by the potential (Vpam). Fluctuations in the reference potential (Vss) at the potential (Vpam) affect the precision of the current (Iled, Islp), whereas fluctuations in the potential (Vdd) may not affect the precision of the current (Iled, Islp).

[0101] Additionally, the return to a normal state when noise is introduced into the gate signal line of the transistor (MP32) that generates current (Islp) can be controlled by the transistor (MN12, MP31), and the return to a normal state when noise is introduced into the gate signal line of the transistor (MN11) that generates current (Iled) can be controlled by a device that supplies potential (Vpam).

[0102] FIG. 9 is a circuit diagram showing a fourth variation of the pixel circuit (1) as a pixel circuit (1d). The pixel circuit (1d) includes a slope signal generating circuit (10d) instead of a slope signal generating circuit (10) compared to the pixel circuit (1).

[0103] In the slope signal generation circuit (10d) according to one embodiment of the present disclosure, the input location of the potential (Vpam) is different from that of the slope signal generation circuit (10c). Specifically, instead of the potential (Vpam) being supplied to the gate of the transistor (MN12), the drain potential of the transistor (MN12) is supplied. Instead of the potential (Vpam) being supplied to the gate of the transistor (MN11), the drain potential (gate potential) of the transistor (MN12) is supplied. Additionally, instead of the drain potential of the transistor (MP31) being supplied to each gate of the transistors (MP31, MP32), the potential (Vpam) is supplied. Since other configurations of the slope signal generation circuit (10) are identical to those of the slope signal generation circuit (10c), a description thereof may be omitted.

[0104] The pixel circuit (1d) according to the present disclosure can produce substantially the same effect as the pixel circuit (1c).

[0105] Additionally, in a pixel circuit (1d) according to one embodiment of the present disclosure, the current (Islp) is directly controlled by the potential (Vpam), and the current (Iled) is indirectly controlled by the potential (Vpam). Fluctuations in the reference potential (Vdd) at the potential (Vpam) affect the precision of the current (Iled, Islp), whereas fluctuations in the potential (Vss) do not affect the precision of the current (Iled, Islp).

[0106] In addition, the return to a normal state when noise is mixed into the gate signal line of a transistor (MP32) that generates a current (Islp) according to one embodiment of the present disclosure can be controlled by a device that supplies a potential (Vpam), and the return to a normal state when noise is mixed into the gate signal line of a transistor (MN11) that generates a current (Iled) can be controlled by transistors (MN12, MP31).

[0107] FIG. 10 is a circuit diagram showing a fifth variation of the pixel circuit (1) as a pixel circuit (1e). The pixel circuit (1e) includes a slope signal generating circuit (10e) instead of a slope signal generating circuit (10) compared to the pixel circuit (1). The pixel circuit (1e) indirectly controls the current (Iled, Islp) based on the potential (Vpam).

[0108] A slope signal generation circuit (10e) according to one embodiment of the present disclosure may further include a transistor (MP41) which is a P-channel MOS transistor and a transistor (MN41) which is an N-channel MOS transistor, compared with a slope signal generation circuit (10).

[0109] A transistor (MP41, MN41) according to one embodiment of the present disclosure is installed in series between a terminal (Vslp_init) and a terminal (Vss). Specifically, in transistor (MP41), the source is connected to the terminal (Vslp_init), the drain is connected to the node (N3), and a potential (Vpam) can be supplied to the gate. In transistor (MN41), the source is connected to the terminal (Vss), the drain is connected to the node (N3), and the potential of the node (N3) can be supplied to the gate. Instead of supplying a potential (Vpam) to each gate of transistors (MN11, MN12), the potential of the node (N3) can be supplied. For example, currents (Iled, Islp) can all be indirectly controlled by the potential (Vpam). Since the other configuration of the slope signal generation circuit (10e) is the same as that of the slope signal generation circuit (10d), the description thereof may be omitted.

[0110] The pixel circuit (1e) according to the present disclosure can produce substantially the same effect as the pixel circuit (1). Furthermore, in the pixel circuit (1e) according to the present disclosure, since the gate potential (Vpam) of the transistor (MP41) serving as the current source is not based on the potential (Vdd, Vss), it is difficult to be affected by IR drop. Therefore, the pixel circuit (1e) according to the present disclosure can set the current (Iled, Islp) with higher precision.

[0111] As described above, the pixel circuit according to the present disclosure controls the supply of a constant current (Iled) from a current source circuit to a light-emitting element using a slope signal (Vslp) in which the slope of the linear change of potential is linked to the constant current (Iled). Specifically, the pixel circuit according to the present disclosure links the slope (slew rate) of the current (Iled) and the slope signal (Vslp) by generating a slope signal (Vslp) using a current (Islp) that is proportional to the current (Iled). Accordingly, the pixel circuit (1) according to the present disclosure can offset error components caused by characteristic deviations or IR drops, and thus can make the light-emitting element emit light with high precision.

[0112] In addition, different electrically conductive transistors may be used for each transistor used in the pixel circuit according to the present disclosure, to the extent that the purpose of the present disclosure is not altered.

[0113] Pixel circuits and / or display devices according to the various embodiments disclosed in this disclosure may be included in various types of electronic devices. For example, electronic devices may include portable communication devices (e.g., smartphones), computer devices, portable multimedia devices, portable medical devices, cameras, wearable devices, or consumer electronics. Electronic devices according to the embodiments of this disclosure are not limited to the aforementioned devices.

[0114] The various embodiments of the present disclosure and the terms used therein are not intended to limit the technical features described in the present disclosure to specific embodiments, and should be understood to include various modifications, equivalents, or substitutions of said embodiments. In connection with the description of the drawings, similar reference numerals may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of said items unless the relevant context clearly indicates otherwise. In the present disclosure, each of phrases such as “A or B”, “at least one of A and B”, “at least one of A or B”, “A, B or C”, “at least one of A, B and C”, and “at least one of A, B, or C” may include any one of the items listed together in the corresponding phrase, or all possible combinations thereof. Terms such as “first,” “second,” or “first” or “second” may be used simply to distinguish a component from another component and do not limit the components in any other aspect (e.g., importance or order). Where any (e.g., first) component is referred to as “coupled” or “connected” to another (e.g., second) component, with or without the terms “functionally” or “communicationally,” it means that said component may be connected to said other component directly (e.g., wired), wirelessly, or through a third component.

[0115] The term “module” as used in various embodiments of the present disclosure may include a unit implemented in hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit, for example. A module may be a component formed integrally, or a minimum unit of said component or a part thereof that performs one or more functions. For example, according to one embodiment, a module may be implemented in the form of an application-specific integrated circuit (ASIC).

[0116] Various embodiments of the present disclosure may be implemented as software (e.g., a program) comprising one or more instructions stored in a storage medium (e.g., internal memory or external memory) readable by a machine (e.g., an electronic device). For example, a processor (e.g., a processor) of the machine (e.g., an electronic device) may call at least one of the one or more instructions stored from the storage medium and execute it. This enables the machine to operate to perform at least one function according to the at least one called instruction. The one or more instructions may include code generated by a compiler or code that can be executed by an interpreter. The storage medium readable by the machine may be provided in the form of a non-transitory storage medium. Here, "non-transitory" simply means that the storage medium is a tangible device and does not contain a signal (e.g., electromagnetic waves), and this term does not distinguish between cases where data is stored semi-permanently and cases where it is stored temporarily in the storage medium.

[0117] According to one embodiment, the method according to the various embodiments disclosed herein may be provided by being included in a computer program product. The computer program product may be traded between a seller and a buyer as a product. The computer program product may be distributed in the form of a device-readable storage medium (e.g., compact disc read-only memory (CD-ROM)), or distributed online (e.g., download or upload) through an application store (e.g., Play Store™) or directly between two user devices (e.g., smartphones). In the case of online distribution, at least a portion of the computer program product may be temporarily stored or temporarily created in a device-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or a relay server.

[0118] According to various embodiments, each component (e.g., module or program) of the components described above may include a singular or multiple entities, and some of the multiple entities may be separated and placed in other components. According to various embodiments, one or more of the components or operations of the aforementioned components may be omitted, or one or more other components or operations may be added. Generally or additionally, multiple components (e.g., module or program) may be integrated into a single component. In this case, the integrated component may perform one or more functions of each of the multiple components in the same or similar manner as those performed by the corresponding component among the multiple components prior to integration. According to various embodiments, operations performed by the module, program, or other components may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

Claims

1. In a pixel circuit, A current source circuit configured to generate a first current, A slope signal generating circuit configured to generate a slope signal using a second current proportional to the first current, and A pixel circuit characterized by including a Pulse Width Modulation (PWM) driving circuit that supplies a first current to a light-emitting element during a period determined by comparing the slope signal and the image signal input to the pixel circuit.

2. In paragraph 1, the current source circuit is, It includes a first electrically conductive first transistor disposed between a light-emitting element and a reference potential terminal to which a reference potential is supplied, through which the first current flows according to the potential of a control signal, and The slope signal generation circuit above is, A first electrically conductive second transistor disposed between a node representing the potential of the slope signal and the reference potential terminal, and disposed in a current mirror manner to the first transistor so that the second current proportional to the first current flows through it, A capacitance element disposed between the above node and an initial potential terminal to which the initial potential of the slope signal is supplied, and A pixel circuit characterized by including a selection circuit configured to select whether to connect the initial potential terminal and the node, or to connect the node and the reference potential through the second transistor.

3. In paragraph 1, the current source circuit is, It includes a first electrically conductive first transistor installed between a light-emitting element and a reference potential terminal to which a reference potential is supplied, through which the first current flows, and The slope signal generation circuit above is, A first electrically conductive second transistor disposed between a node representing the potential of the slope signal and the reference potential terminal, through which the second current flows, A capacitance element disposed between the above node and an initial potential terminal to which the initial potential of the slope signal is supplied, A selection circuit configured to select whether to connect the initial potential terminal and the node, or to connect the node and the reference potential through the second transistor, A second electrically conductive third transistor disposed between the initial potential terminal and the reference potential terminal, through which current flows according to the potential of a control signal, and It includes a first electrically conductive fourth transistor through which current flowing through the third transistor flows, and A pixel circuit characterized in that the first transistor and the second transistor are arranged in the fourth transistor through a current mirror method.

4. In paragraph 1, the current source circuit is, It includes a first electrically conductive first transistor installed between a light-emitting element and a reference potential terminal to which a reference potential is supplied, through which the first current flows according to the potential of a control signal, and The slope signal generation circuit above is, A first electrically conductive second transistor installed between a power potential terminal to which a power potential is supplied and the reference potential terminal, and connected to the first transistor via a current mirror method so that an intermediate current proportional to the first current flows, A second electrically conductive third transistor through which the intermediate current flowing in the second transistor flows, A second electrically conductive fourth transistor installed between the power potential terminal and the node indicating the potential of the slope signal, and connected to the third transistor via a current mirror method, through which the second current proportional to the intermediate current flows, A capacitance element installed between the above node and an initial potential terminal to which the initial potential of the slope signal is supplied, and A pixel circuit characterized by including a selection circuit configured to select whether to connect the initial potential terminal and the node, or to connect the power potential and the node through the fourth transistor.

5. In paragraph 1, the current source circuit is, It includes a first electrically conductive first transistor installed between a light-emitting element and a reference potential terminal to which a reference potential is supplied, through which the first current flows, and The slope signal generation circuit above is, A second electrically conductive second transistor disposed between a power potential terminal to which a power potential is supplied and a node indicating the potential of the slope signal, through which the second current flows according to the potential of the control signal, A capacitance element installed between the above node and the initial potential terminal to which the initial potential of the slope signal is supplied, A selection circuit configured to select whether to connect the initial potential terminal and the node, or to connect the power potential and the node through the second transistor, A second electrically conductive third transistor installed between the power potential terminal and the reference potential terminal and connected to the second transistor via a current mirror method, thereby allowing an intermediate current proportional to the second current to flow, and It includes a first electrically conductive fourth transistor through which the intermediate current flowing in the third transistor flows, and A pixel circuit characterized in that the first transistor is connected to the fourth transistor via a current mirror method.

6. In paragraph 1, the PWM driving circuit is, A comparator that compares the slope signal and the image signal and outputs a PWM signal of pulse width according to the comparison result, and A pixel circuit characterized by including a first switch element disposed between the light-emitting element and the current source circuit and turned on during a period according to the pulse width of the PWM signal.

7. In paragraph 1, the PWM driving circuit is, A comparator that compares the slope signal and the image signal and outputs a PWM signal of pulse width according to the comparison result, and A pixel circuit characterized by including a first switch element that selects and outputs either a control signal for stopping the generation of the first current and a control signal for generating the first current according to the PWM signal for the current source circuit.

8. In Paragraph 1, The above current source circuit is a pixel circuit that generates the first current of a value according to a control signal supplied from the outside.

9. In Paragraph 1, The slope signal generation circuit is a pixel circuit that repeats a linear change from the initial potential of the slope signal two or more times for one input of the image signal.

10. In the pixel circuit, A current source circuit configured to generate a first current; A slope signal generating circuit configured to generate a slope signal in which the potential changes using a second current proportional to the first current, and A pixel circuit characterized by including a plurality of PWM (Pulse Width Modulation) driving circuits configured to supply a first current to each of a plurality of light-emitting elements during a period determined by comparing the slope signal and the image signal input to the pixel circuit.

11. In a method for controlling a pixel circuit, The operation of generating a first current by a current source circuit, and An operation to generate a slope signal in which the potential changes linearly by using a second current proportional to the first current by a slope signal generation circuit, and A method for controlling a pixel circuit, characterized by including the operation of supplying the first current to the light-emitting element during a period corresponding to the result of comparing the slope signal and the image signal by a PWM (Pulse Width Modulation) driving circuit.

12. In Clause 11, the above current source circuit is, It includes a first electrically conductive first transistor disposed between a light-emitting element and a reference potential terminal to which a reference potential is supplied, through which the first current flows according to the potential of a control signal, and The slope signal generation circuit above is, A first electrically conductive second transistor disposed between a node representing the potential of the slope signal and the reference potential terminal, and disposed in a current mirror manner to the first transistor so that the second current proportional to the first current flows through it, A capacitance element disposed between the above node and an initial potential terminal to which the initial potential of the slope signal is supplied, and A method for controlling a pixel circuit, characterized by including a selection circuit configured to select whether to connect the initial potential terminal and the node, or to connect the node and the reference potential through the second transistor.

13. In Clause 11, the above current source circuit is, It includes a first electrically conductive first transistor installed between a light-emitting element and a reference potential terminal to which a reference potential is supplied, through which the first current flows, and The slope signal generation circuit above is, A first electrically conductive second transistor disposed between a node representing the potential of the slope signal and the reference potential terminal, through which the second current flows, A capacitance element disposed between the above node and an initial potential terminal to which the initial potential of the slope signal is supplied, A selection circuit configured to select whether to connect the initial potential terminal and the node, or to connect the node and the reference potential through the second transistor, A second electrically conductive third transistor disposed between the initial potential terminal and the reference potential terminal, through which current flows according to the potential of a control signal, and It includes a first electrically conductive fourth transistor through which current flowing through the third transistor flows, and A method for controlling a pixel circuit, characterized in that the first transistor and the second transistor are arranged in the fourth transistor through a current mirror method.

14. In Clause 11, the above current source circuit is, It includes a first electrically conductive first transistor installed between a light-emitting element and a reference potential terminal to which a reference potential is supplied, through which the first current flows according to the potential of a control signal, and The slope signal generation circuit above is, A first electrically conductive second transistor installed between a power potential terminal to which a power potential is supplied and the reference potential terminal, and connected to the first transistor via a current mirror method so that an intermediate current proportional to the first current flows, A second electrically conductive third transistor through which the intermediate current flowing in the second transistor flows, A second electrically conductive fourth transistor installed between the power potential terminal and the node indicating the potential of the slope signal, and connected to the third transistor via a current mirror method, through which the second current proportional to the intermediate current flows, A capacitance element installed between the above node and an initial potential terminal to which the initial potential of the slope signal is supplied, and A method for controlling a pixel circuit, characterized by including a selection circuit configured to select whether to connect the initial potential terminal and the node, or to connect the power potential and the node through the fourth transistor.

15. In Clause 11, the above current source circuit is, It includes a first electrically conductive first transistor installed between a light-emitting element and a reference potential terminal to which a reference potential is supplied, through which the first current flows, and The slope signal generation circuit above is, A second electrically conductive second transistor disposed between a power potential terminal to which a power potential is supplied and a node indicating the potential of the slope signal, through which the second current flows according to the potential of the control signal, A capacitance element installed between the above node and the initial potential terminal to which the initial potential of the slope signal is supplied, A selection circuit configured to select whether to connect the initial potential terminal and the node, or to connect the power potential and the node through the second transistor, A second electrically conductive third transistor installed between the power potential terminal and the reference potential terminal and connected to the second transistor via a current mirror method, thereby allowing an intermediate current proportional to the second current to flow, and It includes a first electrically conductive fourth transistor through which the intermediate current flowing in the third transistor flows, and A method for controlling a pixel circuit, characterized in that the first transistor is connected to the fourth transistor via a current mirror method.