Data Representation Error Detection/Correction TRIZ Cases
- MMT Packet Header FEC for Broadcast Packet Loss Recovery
Repair packets encoded with RS or LDPC help recover lost MMT broadcast packets and preserve audio, video, subtitles, and files.
- Contrast Coding for Bit-Subset BER Control in FEC
By tuning BER across bit subsets, contrast coding aligns unequal bit reliability with FEC strength to raise noise tolerance or data capacity.
- Storage Volume Compression Ranking for Space and Cost Savings
Predicted space and per-terabyte cost savings are used to rank storage volumes and schedule compression where it delivers the most benefit.
- Storage Volume Compression Scheduling by Predicted Savings Value
Predicted space savings and per-terabyte cost guide storage volume ordering, so compression targets high-value volumes first.
- Pipelined Sequence Detection for ISI Channel Symbol Accuracy
Pipelined branch and path metric calculation improves symbol detection in ISI channels while reducing additions and latency.
- AL-FEC Packet Framing for Lost Packet Recovery in MMT Transmission
Application-layer FEC adds source and parity packet IDs so receivers can recover lost MMT packets and preserve audio-video quality.
- Circular Viterbi Decoder Using Soft Correlation and Path Metrics
Soft correlation and intermediate path metrics enable circular Viterbi decoding with lower hardware and memory load while maintaining throughput.
- Variable FEC Selection Using Eye Monitoring in Optical Links
Eye-monitor feedback switches among FEC codes as optical line quality changes, balancing error correction, power use, and latency.
- Broadcast Signal PLP Multiplexing for Robust OFDM Reception
PLP segmentation, LDPC coding, MIMO, and OFDM improve broadcast efficiency, robustness, and mobile reception in one RF channel.
- MMT Packet Transmission Using AL-FEC Parity for Data Recovery
AL-FEC parity flows protect MMT packet transmission from network loss, helping receivers recover missing data without retransmission.
- Stacked Memory ECC Vault Layout for Multi-Bit Error Protection
A 3D stacked memory layout uses vault-based parity and through-wafer links to correct multi-bit errors and chip failures without extra chip area.
- Maximum-Likelihood Timing Adjustment in Magnetic Signal Playback
Likelihood feedback from previous-frame decoding sharpens magnetic playback extraction timing while limiting adjustment delay.
- Shared-Circuit Viterbi Decoder for NRZ and PAM-4 Modes
Shared branch and path metric circuitry lets one Viterbi decoder handle NRZ and PAM-4 while reducing receiver size, power, and complexity.
- Video Transmission Redundancy Control for Sync Deviation Recovery
Receiver timing feedback adjusts video packet redundancy to recover from sync deviation while limiting unnecessary bandwidth use.
- SerDes Wrapper Hash Checks for Radiation-Induced Lane Faults
Hash codes and an optional parity lane quickly detect radiation-hit SerDes lanes, reconstruct invalid data, and cut reset-related loss.
- WSS Channel Interleaving for Uniform BER in Optical Super-Channels
Multi-channel FEC interleaving spreads WSS filter-induced errors across optical channels to reduce BER imbalance and preserve signal quality.