Shared-Circuit Viterbi Decoder for NRZ and PAM-4 Modes
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Solution Overview
Problem
High-speed communication systems face challenges in efficiently handling both two-level Non Return to Zero (NRZ) and multi-level Pulse Amplitude Modulation (PAM) signaling due to the complex circuitry required, leading to increased size and power consumption in receiving devices.
Innovation Solution
A viterbi decoder that operates in multiple decoding modes, reusing circuitry by generating viterbi branch and path metrics for both NRZ and PAM-4 signaling, allowing for shared hardware components and minimizing device size while supporting multiple signaling types.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate circuitry is used for PAM-4 and NRZ decoding, then decoding capability for both signaling types is achieved, but device size and power consumption increase
Solution Approach 1:
The Viterbi decoder is designed with a universal architecture that can operate in multiple decoding modes (PAM-4 and NRZ) using the same hardware components. The branch metric circuit and path metric circuit are configured to handle both signaling types by adjusting operational parameters rather than requiring separate dedicated circuitry for each mode.
Solution Approach 2:
The decoder incorporates dynamic reconfiguration capabilities where the same hardware circuitry can change its operational characteristics based on the signaling type. Control logic dynamically adjusts the branch metric calculations and path metric updates to match the specific requirements of PAM-4 or NRZ decoding, allowing one set of components to adapt to multiple functions.
2Adaptability or versatility
If separate circuitry is used for PAM-4 and NRZ decoding, then decoding capability for both signaling types is achieved, but power consumption increases
Solution Approach 1:
The Viterbi decoder employs universal hardware components that can be dynamically allocated to different decoding tasks. By using the same branch metric circuit and path metric circuit for both PAM-4 and NRZ modes, the design eliminates the need for multiple parallel processing paths, thereby reducing overall power consumption while maintaining full decoding capability for both signaling types.
Solution Approach 2:
The decoder uses dynamic mode switching that activates only the necessary computational paths based on the input signaling type. When operating in NRZ mode, the circuitry is configured to process two-level signals with appropriate metric calculations, and when switching to PAM-4 mode, the same circuitry reconfigures for four-level signal processing, avoiding the continuous power consumption that would result from maintaining all processing paths simultaneously active.
3Adaptability or versatility
If complex circuitry is used to handle both PAM and NRZ signaling, then multi-mode decoding is achieved, but device complexity increases
Solution Approach 1:
The patent implements a universal Viterbi decoder architecture where the branch metric circuit, path metric circuit, and associated control logic are designed to handle both PAM-4 and NRZ signaling through parameter configuration rather than structural duplication. This approach reduces device complexity by eliminating redundant components while preserving full multi-mode decoding functionality.
Solution Approach 2:
The design merges the PAM-4 decoding path and NRZ decoding path into a single integrated Viterbi decoder structure. By combining the branch metric calculation units, path metric accumulation units, and traceback logic into shared resources that are dynamically controlled, the patent achieves multi-mode operation with reduced circuit complexity compared to having separate independent decoders for each signaling type.
Data Source
AI summary
A multi-mode viterbi decoder supporting different decoding modes. The viterbi decoder comprises circuitry to output one or more data symbol values. The circuitry sets the one or more data symbol values to a first quantity of unit intervals in a first decoding mode (e.g. PAM-4). The circuitry sets the one or more data symbol values to a second quantity of unit intervals in a second decoding mode (e.g. NRZ). The second quantity of unit intervals is greater than the first quantity of unit intervals. A branch metric circuit is adapted to, in the first decoding mode, generate a set of viterbi branch metrics based on the data symbol values for the first quantity of unit intervals. The branch metric circuit is adapted to, in the second decoding mode, generate the set of viterbi branch metrics based on the data symbol values for the second quantity of unit intervals.