Energy Efficient ICT TRIZ Cases
- Memory Controller Power Management via Dynamic Region Segmentation
A memory controller segments storage into independently powered regions to optimize data access speeds.
- Shared Encryption Processor for Inter-Track Interference Cancellation
A shared encryption decode processor cancels inter-track interference by bypassing redundant processing, reducing circuit complexity.
- Dual Processor Handover for VoLTE to VoWiFi Power Reduction
Segmenting control messages allows the modem to handle status checks locally, reducing application processor wake-ups and minimizing power consumption.
- Low-Power Display Wrapping Device Edges for Power Management
Wrapping a low-power display around device edges utilizes unused surface area while maintaining battery efficiency during sleep mode.
- Dynamic Clock Regulation via Duty Cycle Thresholds
A frequency control subsystem adjusts clock rates based on cumulative duty cycles to balance performance and power consumption.
- Wireless IC Tag Coil Antenna Winding Direction Optimization
Identical coil winding directions prevent current offset and improve energy transfer efficiency, extending communication distance for RFID tags.
- Distributed LACP State Machine Segmentation for Switch Stability
Segmenting LACP state machines across line cards and master controllers reduces message delivery delays in distributed network switches.
- Hitless Protection Link Aggregation Marker Synchronization
Source nodes generate internal marker packets to aggregate traffic flows across non-overlapping working and protecting paths in packet switched networks.
- Variable Refresh Rate Power Management for Display Systems
A power management system adjusts display refresh frequency based on the current power mode to conserve energy.