2D Heterojunction Photodiode Layout for CMOS Pixel Miniaturization
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Solution Overview
Problem
Conventional CMOS image sensors face issues with reduced light sensitivity and increased crosstalk noise due to light being blocked or scattered by interconnection layers, and miniaturization of pixel units is restricted by photodiodes formed in the substrate.
Innovation Solution
A photosensitive device with photodiodes formed using two-dimensional semiconductor materials on the surface of the interconnection layer, allowing direct contact and reducing the width of the space charge region for improved response speed and sensitivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If photodiodes are formed in the substrate, then the device structure is simple and manufacturing is easier, but the miniaturization of pixel units is restricted and light sensitivity is reduced
Solution Approach 1:
The photodiode structure transitions from planar (2D) to three-dimensional stacked configuration. Multiple photodiodes are vertically stacked on top of each other, utilizing the third dimension (height) to increase photosensitive area without expanding the lateral footprint. This enables pixel unit miniaturization while maintaining sufficient photosensitive area for light detection.
2Ease of manufacture
If lights are incident on the front side of the chip, then the manufacturing process is simpler, but light sensitivity is reduced due to blocking and scattering by interconnection layers
Solution Approach 1:
The light incident direction is inverted from the conventional front-side illumination to back-side illumination. Light enters through the back surface of the substrate, passing through the photosensitive layers before reaching the interconnection layers. This inversion eliminates the blocking and scattering effects of interconnection layers on incident light, significantly improving light sensitivity while maintaining manufacturing simplicity.
3Device complexity
If photodiodes are formed in the substrate, then the device structure is conventional, but the filling factor is reduced and crosstalk noise increases
Solution Approach 1:
The stacked three-dimensional photodiode structure increases the filling factor by utilizing vertical space. Multiple photodiodes are arranged in layers, with each photodiode having a larger effective area. The vertical stacking reduces lateral light spreading and minimizes optical crosstalk between adjacent pixel units, thereby reducing noise while maintaining a relatively simple device structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances light sensitivity and reduces noise by allowing incident light to be received directly by photodiodes without being absorbed or scattered by the interconnection layer or substrate, enabling larger filling factors and faster response times.
Implementation Method 1
a CMOS image sensor may be classified into a FSI (front side illumination) image sensor and a BSI (back side illumination) image sensor. In a conventional FSI CMOS image sensor, the lights are incident on the front side of the chip (the front side of the substrate) and will have to pass through the interconnection layer on the substrate to be received by the photodiode (PD) portions formed in the substrate for being converted into electrical signals.
Data Source
AI summary
A photosensitive device includes an integrated circuit structure and a plurality of photodiodes disposed on the integrated circuit structure. The photodiodes respectively includes a first material layer and a second material layer overlapping on the first material layer and extending beyond the first material layer to directly contact a surface of the integrated circuit structure. The first material layer and the second material layer are made of two-dimensional semiconductor materials.