2D Material Interconnect Structure for Lower Contact and Sheet Resistance
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Solution Overview
Problem
The semiconductor industry faces challenges in reducing semiconductor device dimensions and improving sheet resistance as conventional methods reach their limits in defining smaller structures photo-lithographically.
Innovation Solution
The use of a novel interconnect structure that incorporates a first conductive layer made of 2D material layers, a second conductive layer with lower electrical resistivity, and a third conductive layer with larger dimensions, combined with a dielectric layer to form conductive features with reduced contact and sheet resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional photo-lithographic methods are used to define structures, then manufacturing processes remain simple, but manufacturing precision deteriorates as dimensions are reduced
Solution Approach 1:
The conductive interconnect structure is divided into three distinct conductive layers (first, second, and third conductive layers) with different materials and properties. Each layer serves a specific function: the first layer provides a foundation, the second layer reduces electrical resistivity, and the third layer provides structural integrity. This segmentation allows optimization of each layer's properties independently, achieving superior electrical performance that cannot be obtained with conventional single-material interconnect structures.
Solution Approach 2:
The patent employs a composite interconnect structure combining multiple conductive materials in specific layers. The first conductive layer may use conventional materials like copper or aluminum, the second conductive layer uses materials with lower electrical resistivity such as cobalt or tungsten, and the third conductive layer provides additional functionality. This composite approach leverages the advantages of each material to achieve reduced contact and sheet resistance while maintaining manufacturability.
2Quantity of substance
If semiconductor device dimensions are reduced, then device density increases, but sheet resistance increases
Solution Approach 1:
The patent applies different material properties to different regions and layers of the interconnect structure. The second conductive layer specifically targets regions where electrical resistivity needs to be minimized, while the first and third layers provide structural support and connectivity. This local optimization of material properties ensures that electrical performance is enhanced precisely where needed, compensating for the increased resistance that occurs when interconnect dimensions are reduced to achieve higher device density.
3Ease of manufacture
If conventional conductive structures are used, then manufacturing process is simple, but contact resistance is high
Solution Approach 1:
The patent systematically changes multiple parameters of the conductive structure including material composition, layer thickness, and structural configuration. By optimizing each parameter independently and in combination, the structure achieves reduced contact and sheet resistance. The multi-layer design allows each layer to be optimized for its specific function, creating a cumulative effect that significantly improves electrical performance while remaining compatible with existing manufacturing processes.
Data Source
AI summary
An interconnect structure and methods of forming the same are described. In some embodiments, the structure includes a first dielectric layer disposed over one or more devices, a first conductive feature disposed in the first dielectric layer, a second conductive feature disposed in the first dielectric layer, an etch stop layer disposed on the first dielectric layer, a second dielectric layer disposed on the etch stop layer, and a third conductive feature disposed in the second dielectric layer and the etch stop layer. The third conductive feature includes a first conductive layer, which includes a two-dimensional material. The structure further includes a fourth conductive feature disposed in the second dielectric layer and the etch stop layer. The third conductive feature and the fourth conductive feature include different number of layers.


