2D OPC Model Using Scalable Test Patterns for IC Contour Accuracy

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Solution Overview

Problem

Current photolithographic processes struggle to maintain resolution and integrity for shrinking integrated circuit features due to limitations in one-dimensional optical proximity correction (OPC) models, which fail to adequately address complex IC layout features.

Innovation Solution

A two-dimensional (2D) OPC model using scalable algorithms and 2D test structures to generate reticle pattern elements that closely match desired IC layout contours, enabling the fabrication of complex IC features by producing reticle patterns that correspond more accurately to target contours.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If one-dimensional OPC models are used, then the photolithographic process is simple and easy to implement, but the manufacturing precision of complex IC features deteriorates

Engineering Contradiction:

Improveease of OPC implementationVSAvoidcontour correspondence of IC features

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent transitions from one-dimensional OPC models to two-dimensional OPC models. The 2D model uses test patterns with varying widths, spacings, and orientations to capture optical interference effects in multiple dimensions, enabling accurate prediction of printed contours for complex IC features that 1D models cannot adequately address.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Manufacturing precision

If 2D test structures are used to generate OPC models, then the manufacturing precision of reticle patterns improves, but the device complexity of the OPC model increases

Engineering Contradiction:

Improvereticle pattern correspondence to target contoursVSAvoidcomplexity of OPC model

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent segments the complex 2D OPC model development into manageable components: (1) generating test patterns with systematic variations of feature parameters, (2) fabricating and measuring test structures to obtain empirical contour data, (3) fitting the measured data to a parametric model, and (4) validating the model against additional test patterns. This segmented approach makes the complex 2D modeling process systematic and controllable.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent systematically varies key parameters in test patterns including feature width, spacing, orientation, and density to comprehensively characterize optical interference effects. The parametric nature of the test patterns allows the OPC model to learn and predict behavior across a wide range of IC layout features without requiring separate models for each feature type.

Inventive Principle:

Principle #35Parameter changes

3Manufacturing precision

If wavelength reduction is used to improve resolution, then the photolithographic pattern resolution improves, but the ability to keep up with IC feature shrink rate deteriorates

Engineering Contradiction:

Improvephotolithographic pattern resolutionVSAvoidrate of resolution improvement relative to feature shrink

Core Design Contradiction:

Manufacturing precisionVSProductivity

Solution Approach 1:

The patent changes the modeling approach parameter from one-dimensional to two-dimensional, enabling the OPC system to accurately correct optical interference effects for smaller features at current wavelengths. This modeling advancement effectively extends the useful resolution capability of existing photolithographic equipment, allowing continued fabrication of shrinking IC features without requiring proportional wavelength reductions.

Inventive Principle:

Principle #35Parameter changes

4Ease of operation

If conventional OPC schemes are used, then the reticle generation process is straightforward, but the adaptability to complex IC layout features deteriorates

Engineering Contradiction:

Improvesimplicity of reticle generationVSAvoidability to handle complex IC features

Core Design Contradiction:

Ease of operationVSAdaptability or versatility

Solution Approach 1:

The patent creates a universal 2D OPC model that can handle diverse IC layout features including lines, contacts, vias, and complex multi-patterning structures through a single parametric framework. The model's ability to accurately predict printed contours across varying feature geometries, orientations, and densities provides multi-functional capability that adapts to different IC technology nodes and design styles without requiring feature-specific models.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS8015513B2OPC models generated from 2D high frequency test patterns

Publication Date: 2011.09.06 TEXAS INSTRUMENTS INC

AI summary

A method of generating a scalable OPC model for composing reticle pattern files from IC layouts using 2D test patterns is disclosed. The 2D test patterns include basic features which replicate features found in advanced ICs. Variations of feature dimensions and structure pitches provide measurement data which enables the scalability of the OPC model. A method of checking reticle pattern files for features which cannot be modeled by the scalable OPC model is also disclosed.