2T AND Flash Memory Array With Independent Bit Line Voltage Control

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Solution Overview

Problem

Traditional Two-Transistor (2T) flash memory arrays require precise voltage application for memory segment selection, which compromises the integrity of gate oxides and increases the complexity and size of driver circuits, reducing reliability and efficiency.

Innovation Solution

A 2T AND flash memory array design with two rows of sector selection transistors and independent bit line voltage control for each memory column, reducing series resistance and allowing flexible voltage application, thereby improving memory segment selection reliability and reducing driver circuit complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high voltage is applied to selection devices to ensure connection between local and global voltage lines, then memory segment selection reliability is improved, but gate oxide integrity is compromised and driver circuit complexity increases

Engineering Contradiction:
Improvememory segment selection reliabilityVSAvoiddriver circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory array is divided into multiple independently controllable memory segments, each with its own sector selection transistors. This segmentation allows individual segments to be selected and operated independently, enabling precise voltage control for each segment without affecting the entire array, thus reducing driver circuit complexity while maintaining selection reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Sector selection transistors are introduced as intermediary devices between the global voltage lines and local memory cells. These transistors act as controlled switches that can be precisely turned on/off based on segment selection signals, enabling reliable segment selection through controlled conduction rather than direct high voltage application, thereby protecting gate oxide integrity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If high voltage is applied to selection devices to ensure connection between local and global voltage lines, then memory segment selection reliability is improved, but gate oxide integrity is compromised

Engineering Contradiction:
Improvememory segment selection reliabilityVSAvoidgate oxide integrity
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent employs controlled voltage parameter changes through sector selection transistors, which can be precisely turned on or off based on segment selection signals. This allows the voltage at memory cell sources to be dynamically adjusted to appropriate levels without applying excessive voltage to selection devices, thereby ensuring reliable segment selection while protecting gate oxide integrity from voltage-induced damage.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If precise voltage application is used for memory segment selection, then selection accuracy is improved, but driver circuit size increases

Engineering Contradiction:
Improvesegment selection precisionVSAvoiddriver circuit size
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The memory array is divided into multiple independently controllable memory segments, each with its own sector selection transistors. This segmentation allows individual segments to be selected and operated independently, enabling precise voltage control for each segment without affecting the entire array, thus reducing driver circuit complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The sector selection transistors serve multiple functions: they act as switches for segment selection, control voltage distribution to local source lines, and enable independent operation of different memory segments. This multi-functionality reduces the need for separate dedicated circuits for each function, thereby reducing overall driver circuit size while maintaining precise segment selection capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP2779173B12T AND flash memory array
Publication Date: 2018.08.15 NXP BV
  • EP2779173B1 patent drawingFigure 1
  • EP2779173B1 patent drawingFigure 2
  • EP2779173B1 patent drawingFigure 3

AI summary

A flash memory array includes memory sectors of two transistors (2T) AND memory cells (S(1,1,1), A(1,1,1) transistors). Within each of the memory sectors (104-1, 104-2), a row of sector selection transistors (SSTL1, SSTL2) is configured such that writing data onto a memory column within the memory sector is controlled by applying a voltage to a bit line (BL1, BL2, BL3), independent from the row of sector selection transistors.