3D High-Density Capacitor Layout for Low-Temperature BEOL Integration
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Solution Overview
Problem
The semiconductor industry faces challenges in integrating high-density capacitors without damaging pre-fabricated devices due to the need for low-temperature processing, as existing materials and processes may not be compatible with existing semiconductor devices.
Innovation Solution
A high-density capacitor is formed in a back-end-of-line (BEOL) process using a three-dimensional structure with interleaved vertical and horizontal portions, separated by a dielectric layer, allowing integration with thin film transistors (TFTs) that can be processed at low temperatures without damaging FEOL and MEOL devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional capacitor integration methods are used, then manufacturing process is simple, but integration density is low
Solution Approach 1:
The patent transitions from planar capacitor structures to three-dimensional vertical plate structures. The capacitor includes multiple vertical plates extending in the vertical direction with dielectric layers between them, creating a stacked configuration that utilizes the vertical dimension to increase capacitance density without expanding the lateral footprint. This dimensional change allows higher integration density while maintaining manufacturability through adapted fabrication processes.
Solution Approach 2:
The capacitor structure implements nesting by placing horizontal plates between the vertical plates, creating an interleaved three-dimensional arrangement. The horizontal plates are positioned within the spaces formed by adjacent vertical plates, effectively nesting components within each other's structural spaces. This nested configuration maximizes the use of available volume to achieve higher integration density.
2Productivity
If high-density capacitor structures are integrated, then integration density increases, but risk of damaging pre-fabricated devices increases
Solution Approach 1:
The patent changes the processing temperature parameter to enable high-density capacitor integration without damaging pre-fabricated devices. Specifically, the capacitor structures are formed using low-temperature processing techniques, including deposition and patterning steps conducted at temperatures compatible with previously fabricated thin film transistors and other sensitive components. This parameter change allows advanced capacitor structures to be integrated into existing semiconductor devices without causing thermal damage.
3Quantity of substance
If three-dimensional capacitor structures are formed, then capacitance density increases, but manufacturing process complexity increases
Solution Approach 1:
The fabrication process is segmented into distinct sequential steps: first forming vertical plates with associated dielectric layers, then forming horizontal plates in the spaces between vertical plates. Each segment can be processed independently using standard deposition and patterning techniques, making the complex three-dimensional structure manufacturable through manageable process steps rather than requiring entirely new manufacturing capabilities.
Data Source
AI summary
A disclosed high-density capacitor includes a top electrode having an electrically conducting material forming a three-dimensional structure. The three-dimensional structure includes a plurality of vertical portions extending in a vertical direction and horizontal portions, that are interleaved within the vertical portions and extend in a first horizontal direction. The high-density capacitor further includes a dielectric layer formed over the top electrode, and a bottom electrode including an electrically conducting material, such that the bottom electrode is separated from the top electrode by the dielectric layer. Further, the bottom electrode envelopes some of the plurality of vertical portions of the top electrode. The disclosed high-density capacitor further includes a plurality of support structures that are aligned with the first horizontal direction such that the horizontal portions of the top electrode are formed under respective support structures. The high-density capacitor has a capacitance that is proportional to the volume of the capacitor.