A protruding high-modulus resin film prevents spray-formed electrode gaps, lowering resistance and improving temperature-cycle durability.
A through-hole and slit electrode layout keeps OLED array-substrate capacitance close to design values despite patterning misalignment.
Rutile-phase and higher-bandgap dielectric layers keep ultra-thin memory capacitors high-k while suppressing leakage and reliability loss.
Controlled ZnO in a BaTiO3 dielectric suppresses grain growth, stabilizing thin-layer MLCC capacitance under temperature and DC field stress.
An Fe-oxide interfacial layer in MLCC internal electrodes blocks plating hydrogen and external moisture to preserve insulation resistance.
A core-shell perovskite dielectric grain structure helps multilayer capacitors resist DC-bias degradation while preserving dielectric performance.
A tailored ABO3 ceramic powder helps thin MLCC inner electrodes keep high coverage during sintering, supporting higher capacitance.
Reorienting MLCC ceramic layers perpendicular to the PCB shifts piezoelectric deformation sideways, preventing board collision and capacitive howling.
Al, Cr, Fe, or Si precipitates in thin internal electrodes help prevent firing fractures, maintain continuity, and reduce noble metal use.
Ni on metal filler surfaces lowers contact resistance between resin and plating, cutting ESR while improving crack resistance under impact and thermal cycling.
Adding XTiO3 to inner electrodes aligns sintering with dielectric layers, preserving thin-electrode coverage and raising capacitance.
Regional control of intragranular void density in MLCC outer and side layers improves moisture resistance without sacrificing thin dielectric layers.
A dielectric porosity gradient places fewer voids near capacitor ends to ease electrostrictive stress and curb internal cracking at high voltage.
A multilayer electrode layout separates capacitor regions to independently tune spacing, electric field strength, and capacitance variability.
By embedding a wound capacitor in the substrate, this case removes via holes, shortens PCB connections, and improves signal transmission.
A low-porosity ceramic interlayer in MLCCs reduces sintering stress mismatch, prevents electrode disconnection, and preserves capacitance density.
A glass-free Cu-Ag external electrode with alloy and diffusion portions blocks hydrogen penetration and preserves MLCC adhesion reliability.
Conductive carbon and plated metal layers create uniform MLCC external electrodes, limiting plating penetration, loss, and moisture risk.
Low-melting metal placed in central dielectric or electrode regions improves binder removal and gas release in high-layer MLCCs, reducing cracks and delamination.
Heat-treated first nickel plating releases occluded hydrogen in multilayer ceramic components, protecting insulation resistance and solderability.
Lower Sn concentration in outer dielectric layers suppresses metal diffusion and sintering while preserving insulation resistance and capacitance.
Cu oxides formed between Cu particles and glass improve electrode wettability and density while limiting glass elution under acidic plating conditions.
A graded outer-layer porosity profile relieves board-induced stress in multilayer ceramic capacitors while supporting smaller size and higher capacitance.
A doped AlZrO leakage reduction film uses large-radius dopants to block leakage current while preserving capacitance in scaled capacitors.
Ni deposited on metal fillers in the conductive resin electrode lowers contact resistance while preserving MLCC mechanical strength.
Selective Sn control in cover-adjacent and central internal electrodes cuts leakage and preserves capacitance in multilayer ceramic capacitors.
Full-sheet anodisation forms uniform porous alumina without hard masks, preserving pore integrity and usable area for compact GHz capacitors.
A covered accommodation case creates a gap that captures excess mold resin, preventing outer-surface adhesion while protecting the ceramic element.
ABO3 ceramic powder in copper electrode paste preserves thin MLCC inner electrode coverage, helping raise capacitance after firing.
Pores reaching the ceramic interface let the plated metal anchor into a low-void base layer, improving adhesion and resisting peeling during soldering.
Like-charged capacitor plates create electrostatic support for enclosed volumes, enabling lightweight structures that withstand higher pressure.
A boundary layer at the floating electrode-dielectric interface forms Schottky barriers to suppress leakage and raise MLCC withstand voltage.
Corner plates on main surface protective layers improve pressure uniformity, strengthen edge bonding, and reduce moisture ingress.
Smaller dielectric grains on side protective portions extend the moisture path and reduce short circuits in multilayer capacitors.
Low-melting-point metals in Ni internal electrodes raise capacitance while limiting voids, moisture ingress, and high-temperature reliability loss.
Freeze drying followed by tumble drying prevents flake stacking, preserves surface area, and improves powder flow for capacitor anodes.
Through-hole electrode and dielectric stacking boosts capacitance in a tiny package while shortening signal paths and simplifying fabrication.
Surface-void flat metal fillers guide cracks into the conductive resin layer, reducing dielectric stress and improving capacitor strength.
A 3D interleaved capacitor structure enables low-temperature BEOL integration with TFTs while protecting pre-fabricated devices.
By turning MLCC ceramic layers perpendicular to the PCB, deformation stays parallel to the board and avoids collision, noise, and board strain.
A high-metal corner electrode layer blocks plating solution and moisture ingress while preserving capacitance per unit volume.
Copper-rich bumps and a curing-agent-free paste improve MLCC bump adhesion while preserving secure mounting and electrical conductivity.
ABO3 ceramic powder in conductive paste aligns metal and dielectric sintering, preserving thin MLCC inner electrode coverage and capacitance.
A Sn-transition metal side margin blocks moisture-driven insulation resistance loss in compact multilayer electronic components.
Sn diffusion from internal electrodes raises dielectric resistance in thin MLCC layers, improving breakdown strength and time-to-failure.
Nickel segregation in terminal-facing cover layers absorbs mounting stress, suppressing cracks and preventing terminal short-circuiting.
Step portions and an inward base-layer end improve external electrode adhesion in multilayer ceramic components, reducing peeling and moisture ingress.
A conformal dielectric liner smooths laser-etched through-glass via sidewalls, improving conductor adhesion and electrical performance.
Mg-rich cover layers form Ni-Mg oxides at electrode ends, limiting voids and cracks while preserving high-temperature load life and moisture resistance.
Varying external electrode lengths in a stepped A>B>C>D layout disperse stress and help stop cracks from reaching the capacitor interior.