Multilayer Ceramic Capacitor Sn Gradient for Insulation Stability
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Solution Overview
Problem
The degradation of insulation characteristics and reduced lifetime of multilayer ceramic capacitors due to metal diffusion and sintering issues in dielectric layers, which affect electrostatic capacity.
Innovation Solution
A multilayer ceramic capacitor design where dielectric layers with varying Sn concentrations are stacked, with lower Sn concentration at the outermost ends to suppress metal diffusion and sintering, thereby improving insulation and electrostatic capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If Sn is added to dielectric layers to improve insulation characteristics, then insulation resistance increases, but metal diffusion and sintering are promoted causing structural disarrangement
Solution Approach 1:
The patent applies local quality by creating a non-uniform Sn concentration distribution across different dielectric layers. Specifically, dielectric layers closer to the outermost end have smaller Sn concentrations, while those closer to the center have larger Sn concentrations. This localized variation in composition allows each region to have optimized properties: outer layers suppress sintering and maintain structural integrity, while inner layers provide enhanced insulation resistance.
Solution Approach 2:
The patent implements parameter changes by systematically varying the Sn concentration parameter across the dielectric layer stack. The Sn concentration is adjusted based on the position of dielectric layers in the stacking direction, creating a gradient distribution that optimizes both insulation resistance and structural stability throughout the multilayer structure.
2Reliability
If Sn concentration is increased in dielectric layers to suppress metal diffusion, then insulation characteristics improve, but sintering is promoted reducing electrostatic capacity
Solution Approach 1:
The patent applies local quality by creating a non-uniform Sn concentration distribution across different dielectric layers. Specifically, dielectric layers closer to the outermost end have smaller Sn concentrations, while those closer to the center have larger Sn concentrations. This localized variation in composition allows each region to have optimized properties: outer layers suppress sintering and maintain structural integrity, while inner layers provide enhanced insulation resistance.
Solution Approach 2:
The patent implements parameter changes by systematically varying the Sn concentration parameter across the dielectric layer stack. The Sn concentration is adjusted based on the position of dielectric layers in the stacking direction, creating a gradient distribution that optimizes both insulation resistance and structural stability throughout the multilayer structure.
3Ease of manufacture
If uniform Sn distribution is used in all dielectric layers, then manufacturing is simplified, but metal diffusion and sintering cause structural disarrangement
Solution Approach 1:
The patent applies local quality by creating a non-uniform Sn concentration distribution across different dielectric layers. Specifically, dielectric layers closer to the outermost end have smaller Sn concentrations, while those closer to the center have larger Sn concentrations. This localized variation in composition allows each region to have optimized properties: outer layers suppress sintering and maintain structural integrity, while inner layers provide enhanced insulation resistance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves both high insulation resistance and electrostatic capacity by suppressing metal diffusion and sintering, enhancing the capacitor's lifetime and reducing structural disarrangement.
Implementation Method 1
Sn suppresses the sintering of the dielectric layer and suppresses promotion of spheroidizing of the internal electrode layer
Implementation Method 2
Sn suppresses the sintering of the dielectric layer
Data Source
AI summary
A ceramic electronic device includes a multilayer chip comprising alternating internal electrode layers and dielectric layers stacked in a stacking direction. First and second external electrodes are provided on opposing end surfaces of the chip. The internal electrode layers include first and second internal electrodes, connected respectively to the first and second external electrodes. The multilayer chip includes a first outer layer section, a second outer layer section, and a center section in the stacking direction. The Sn concentration in the dielectric layers of the first outer layer section is lower than that in the center section.