Dielectric Via Liner for Rough Through-Glass Via Sidewalls
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Solution Overview
Problem
Laser-assisted etching processes in glass cores result in via openings with significant surface roughness, exceeding 100 nm RMS and Ra, which adversely affect the electrical performance of conductive structures.
Innovation Solution
Applying a dielectric film liner over the sidewalls of via openings using conformal deposition methods like ALD, CVD, or PVD to fill the topography and reduce surface roughness to 50 nm or less.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If laser assisted etching process is used to create via openings in glass core, then via openings can be formed through the glass substrate, but the sidewalls of the via openings exhibit high surface roughness (RMS 100 nm or greater)
Solution Approach 1:
A dielectric film is deposited as an intermediary layer over the rough sidewalls of the via openings. This dielectric film acts as a mediator that fills in the rough topography and provides a smooth surface for subsequent conductor material deposition, thereby resolving the contradiction between ease of via formation and manufacturing precision of sidewall surface
Solution Approach 2:
The dielectric film is deposited in advance before the conductor material is placed in the via openings. This preliminary action of smoothing the sidewalls with the dielectric film ensures that when conductor material is subsequently deposited, it forms on a smooth surface, achieving low surface roughness without compromising the ease of via opening formation
2Manufacturing precision
If conformal deposition of dielectric film is applied to smooth sidewalls, then surface roughness is reduced to 50 nm or less, but additional process steps are required
Solution Approach 1:
The dielectric film serves multiple functions: it smooths the rough sidewall surface, provides adhesion between the glass substrate and conductor material, and acts as a barrier layer. By combining multiple functions into a single layer, the solution reduces surface roughness without proportionally increasing device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The dielectric film liner significantly reduces surface roughness, improving the electrical properties of conductive structures within glass cores by smoothing the sidewalls and enhancing adhesion and thermal expansion compatibility.
Implementation Method 1
Applying a dielectric film liner over the sidewalls of via openings using conformal deposition methods like ALD, CVD, or PVD
Implementation Method 2
Applying a dielectric film liner over the sidewalls of via openings using conformal deposition methods like ALD, CVD, or PVD
Data Source
AI summary
Embodiments disclosed herein include electronic packages. In an embodiment, an electronic package comprises a substrate with a first surface and a second surface, where the substrate comprises glass. In an embodiment, the electronic package further comprises a via opening through the substrate, where sidewalls of the via opening have a root mean squared (RMS) surface roughness that is approximately 100 nm or greater. In an embodiment, the electronic package further comprises a liner over the sidewalls of the via opening, where an RMS surface roughness of the liner is approximately 50 nm or smaller. An electronic package may further comprise a via through the via opening.