Multilayer Ceramic Capacitor Porosity Gradient Against Electrostriction Cracks
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Solution Overview
Problem
Conventional multilayer ceramic capacitors experience cracks due to electrostriction when high voltage is applied, leading to degradation in high-temperature load reliability and moisture resistance.
Innovation Solution
The multilayer ceramic capacitor design includes dielectric layers with varying void distributions, where end portions have fewer voids than central portions, reducing electrostrictive stress concentration and enhancing sintering, thereby minimizing crack formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If high voltage is applied to the multilayer ceramic capacitor, then the capacitor can operate at higher power levels, but electrostriction causes cracks to form at stress concentration points
Solution Approach 1:
The patent applies local quality by creating regions with different void concentrations in the dielectric layers. Specifically, voids are concentrated in the central region of the multilayer body while the peripheral regions have fewer voids. This non-uniform void distribution creates local differences in mechanical properties, allowing the central region to absorb electrostrictive stress while maintaining overall capacitor reliability at high voltage operation.
Solution Approach 2:
The patent utilizes porous materials by intentionally introducing voids into the dielectric layers. These voids act as stress-absorbing features that prevent crack propagation. The controlled porosity, particularly in the central region, provides a mechanism to dissipate electrostrictive stress generated during high voltage operation, thereby preventing catastrophic failure.
2Reliability
If voltage screening is performed at low voltage to prevent electrostriction, then crack formation is reduced, but the screening becomes less effective at detecting potential failures
Solution Approach 1:
The patent applies preliminary action by pre-introducing voids into the dielectric layers during manufacturing, before the capacitor undergoes voltage screening. This preliminary structural modification ensures that the capacitor can withstand higher screening voltages without forming cracks, thereby enabling more effective detection of potential failures during the screening process.
3Strength
If the dielectric layers are densely packed without voids, then the mechanical strength is higher, but electrostrictive stress concentrates more readily leading to crack formation
Solution Approach 1:
The patent applies local quality by creating regions with different void concentrations in the dielectric layers. Specifically, voids are concentrated in the central region of the multilayer body while the peripheral regions have fewer voids. This non-uniform void distribution creates local differences in mechanical properties, allowing the central region to absorb electrostrictive stress while maintaining overall capacitor reliability at high voltage operation.
Solution Approach 2:
The patent utilizes porous materials by intentionally introducing voids into the dielectric layers. These voids act as stress-absorbing features that prevent crack propagation. The controlled porosity, particularly in the central region, provides a mechanism to dissipate electrostrictive stress generated during high voltage operation, thereby preventing catastrophic failure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces cracks in the capacitor body, improving reliability and resistance to electrostrictive stress under high voltage conditions.
Implementation Method 1
electrostriction occurs when a voltage is applied. The stress caused by the electrostriction concentrates at the ends in the length direction and the width direction of an effective portion of the multilayer ceramic capacitor
Data Source
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AI summary
Provided is a multilayer ceramic capacitor making it possible to curb the occurrence of cracking produced in a laminate interior due to electrostriction when a high voltage has been applied. This multilayer ceramic capacitor comprises a laminate including: a plurality of layered dielectric layers; and a plurality of layered internal electrode layers. The laminate also includes: an inner layer section which includes a first principal surface and second principal surface relative to the height direction which is the direction of layering of the plurality of dielectric layers, a first side surface and second side surface relative to the width direction orthogonal to the height direction, and a first end surface and second end surface relative to the length direction orthogonal to the height direction and to the width direction, and in which the dielectric layers and the internal electrode layers are alternately layered; and an outer layer section arranged so as to sandwich the inner layer section from the first principal surface side and second principal surface side. The capacitor also comprises: a first external electrode arranged on the first end surface; and a second external electrode arranged on the second end surface. The inner layer section is constituted of an internal dielectric layer included in the plurality of dielectric layers arranged in the inner layer section. The internal dielectric layer contains voids, and comprises a length direction middle-side dielectric layer arranged in a region in the middle of the length direction in the inner layer section, and a length direction end-side dielectric layer arranged in a region in the end of the length direction in the inner layer section. The quantity of voids contained in the length direction end-side dielectric layer is smaller than the quantity of voids in the length direction middle-side dielectric layer.