Array Substrate Capacitor Layout for Misalignment-Tolerant OLED Panels
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Solution Overview
Problem
Misalignment during patterning processes in the formation of capacitors on OLED display panels leads to deviations in capacitance values, affecting display performance and increasing costs due to potential redesigns of pixel driving circuits.
Innovation Solution
The array substrate design includes a first electrode, a first insulating layer, and a second electrode with a through-hole and slit configuration, ensuring consistent capacitance values despite misalignment, and allowing flexible capacitance adjustment without altering the electrode shapes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional capacitor formation processes are used, then manufacturing simplicity is maintained, but misalignment during patterning leads to deviations in capacitance values
Solution Approach 1:
The second electrode is divided into multiple segments (first electrode segment, second electrode segment, third electrode segment) separated by through holes. This segmentation allows the capacitor structure to tolerate misalignment during patterning while maintaining consistent capacitance values, as each segment can be independently formed without requiring perfect alignment with the first electrode.
Solution Approach 2:
Through holes are introduced as intermediary structures between the first electrode and the second electrode segments. These through holes serve as mediators that connect the electrodes while allowing for misalignment compensation, enabling the capacitor to maintain its capacitance value despite variations in patterning alignment.
2Manufacturing precision
If capacitor area is increased to achieve desired capacitance, then capacitance value is improved, but pixel driving circuit area increases
Solution Approach 1:
The capacitor structure is designed with the second electrode segments nested around or adjacent to the first electrode in a compact arrangement. The through holes allow the second electrode segments to be positioned in spaces that would otherwise be unused, enabling the capacitor to achieve the desired capacitance value within a smaller overall area by efficiently utilizing available space.
Solution Approach 2:
The capacitor structure utilizes vertical dimensionality by forming the second electrode segments at different positions relative to the first electrode, connected through through holes. This three-dimensional arrangement allows the capacitor to achieve higher capacitance values without proportionally increasing the planar area occupied by the pixel driving circuit.
3Productivity
If misalignment tolerance is increased, then manufacturing yield is improved, but capacitance value consistency deteriorates
Solution Approach 1:
By segmenting the second electrode into multiple parts connected through through holes, the structure becomes tolerant to misalignment during patterning. Each segment can be independently formed with relaxed alignment requirements, yet the overall capacitor maintains consistent capacitance values because the segmented structure collectively maintains the intended overlapping area with the first electrode.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design maintains consistent capacitance values and improves yield by minimizing changes in overlapping areas between electrodes, reducing the need for redesigns and enhancing display device performance.
Implementation Method 1
a first insulating layer, and a second electrode... the first insulating layer... extending from the first through-hole to an edge of the second electrode
Data Source
Figure 1~2
Figure 4~5A
Figure 5B~5C
AI summary
An array substrate and a display device. The array substrate (100) includes a base substrate (110), a first electrode (120), a first insulating layer (130) and a second electrode (140). The first electrode (120) is on the base substrate (110); the first insulating layer (130) is on a side of the first electrode (120) away from the base substrate (110); the second electrode (140) is on a side of the first insulating layer (130) away from the first electrode (120). The second electrode (140) is provided with a first through-hole (141) and a slit (142) communicated with the first through-hole (141) and extending from the first through-hole (141) to an edge of the second electrode (140), and an orthographic projection of the first electrode (120) on the base substrate (110) completely falls within an orthographic projection of the second electrode (140), the first through-hole (141) and the slit (142) on the base substrate (110). At this time, the first electrode (120), the second electrode (140), and the first insulating layer (130) can constitute a capacitor (Cst). The array substrate can ensure that the actual capacitance value of the capacitor is consistent with the design value when the alignment deviation occurs, thereby improving the yield of the display device using the array substrate.