3D Capacitor Module Layout for Differential Line Impedance Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current electronic devices using differential signaling face challenges with parasitic coupling, increased surface area, and limited adjacency of capacitors due to the use of multi-layer ceramic capacitors (MLCC), which restricts the number of capacitors that can be connected adjacently and affects the differential characteristic impedance.
Innovation Solution
The use of 3D capacitors supported by a base, allowing for closer placement and reduced surface area occupancy, while maintaining good capacitance values and controlling the differential characteristic impedance through a plane of symmetry and insulating regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If MLCC capacitors are used to provide DC isolation in differential pairs, then DC blocking function is achieved, but parasitic coupling appears between adjacent capacitors and surface area increases
Solution Approach 1:
The patent transitions from planar 2D capacitor layout to 3D vertical capacitor structures. The capacitors are positioned at different heights above the board, with first capacitors at a first height and second capacitors at a second height, creating vertical separation that reduces parasitic coupling while maintaining compact horizontal footprint.
Solution Approach 2:
The patent divides the capacitor arrangement into distinct groups: first capacitors positioned at a first height and second capacitors positioned at a second height. This segmentation in the vertical dimension allows independent optimization of each capacitor group's position and reduces interference between adjacent capacitors.
2Reliability
If MLCC capacitors are used with standard soldering pads, then DC isolation is provided, but the number of capacitors that can be connected adjacently is limited
Solution Approach 1:
By utilizing the vertical dimension for capacitor placement, the patent enables multiple capacitors to be positioned adjacently in the horizontal plane without requiring excessive spacing. The vertical separation allows higher capacitor density on the board while maintaining electrical isolation.
3Ease of manufacture
If capacitors are arranged to maintain constant gap width between differential lines, then manufacturing constraints are satisfied, but surface area occupancy increases
Solution Approach 1:
The patent resolves the conflict between manufacturing constraints and space efficiency by moving the gap control requirement to the vertical dimension. Capacitors at different heights can have varying horizontal positions while maintaining proper spacing through vertical separation, reducing overall surface area occupancy.
4Object-affected harmful factors
If capacitors are positioned to reduce parasitic coupling, then signal integrity improves, but device complexity increases
Solution Approach 1:
The patent segments capacitors into distinct height levels with insulating regions separating them vertically. This structured segmentation provides a systematic approach to reducing parasitic coupling while maintaining manufacturability through standardized layering and spacing patterns.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces parasitic coupling, minimizes surface area usage, and allows for better control of the differential characteristic impedance, enabling more efficient use of space and improved signal propagation in electronic devices.
Implementation Method 1
a first insulating region positioned between the first capacitors and the second capacitors
Implementation Method 2
each 3D capacitor comprising two capacitor terminals respectively connected to the two line terminals of one line of the pair of transmission lines
Data Source
AI summary
An electronic device and a method for manufacturing an electronic device. The electronic device includes: a board equipped with a pair of differential transmission lines, each line of the pair having an opening extending between two line terminals; and a capacitor module that includes: a base; and two 3D capacitors supported by the base, each 3D capacitor comprising two capacitor terminals respectively connected to the two line terminals of one line of the pair of transmission lines.