3D Capacitor Module Layout for Differential Line DC Isolation
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Solution Overview
Problem
Current electronic devices using multi-layer ceramic capacitors (MLCC) face limitations in reducing parasitic coupling, surface area occupancy, and maintaining DC isolation due to manufacturing constraints and soldering pad requirements, leading to increased device size and impedance issues.
Innovation Solution
Employing 3D capacitors supported by a common base, integrated with differential transmission lines using a single manufacturing step, and connected via conductive bumps to minimize parasitic coupling and reduce surface area, while maintaining controlled differential characteristic impedance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If MLCC capacitors are used with soldering pads, then DC isolation is provided, but the soldering pads increase surface area occupancy and limit the number of capacitors that can be connected adjacently
Solution Approach 1:
The patent transitions from 2D surface-mounted MLCC capacitors to 3D capacitors with vertical extension. The capacitors are positioned at different heights above the board, utilizing the third dimension (height) to reduce lateral spacing requirements. This allows capacitors to be placed closer together horizontally while maintaining proper isolation, directly addressing the surface area occupancy problem.
2Volume of stationary object
If MLCC capacitors are made smaller, then device size is reduced, but parasitic coupling between adjacent capacitors increases due to their thickness
Solution Approach 1:
By positioning capacitors at different vertical heights, the patent separates their electromagnetic fields in the third dimension. This vertical stratification reduces parasitic coupling between adjacent capacitors even when they are placed close together horizontally, allowing smaller capacitor footprints without increasing interference.
Solution Approach 2:
The patent introduces intermediate structures including dielectric layers and conductive shielding elements positioned between adjacent capacitors. These intermediary elements act as electromagnetic barriers that reduce parasitic coupling while allowing the capacitors to maintain compact dimensions.
3Manufacturing precision
If capacitors are arranged with constant gap width between differential lines, then characteristic impedance is controlled, but the manufacturing process constraints prevent achieving constant gap width
Solution Approach 1:
The patent divides the gap region into multiple segments: lateral spacing between capacitors, vertical spacing from the board, and intermediate dielectric layers. By segmenting the isolation structure, the design can accommodate manufacturing variations in each individual segment while maintaining overall impedance control through the cumulative effect of all segments.
4Reliability
If capacitors are spread in direction orthogonal to current flow, then DC blocking is provided, but large surface area is used
Solution Approach 1:
The patent reorients the capacitor blocking function from a lateral arrangement to a vertical arrangement. The capacitors extend vertically above the signal traces, providing DC blocking through their vertical orientation rather than through lateral spacing. This dimensional change dramatically reduces the surface area required for equivalent DC blocking performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces device size, minimizes parasitic coupling, and maintains optimal DC isolation and impedance control, facilitating closer capacitor placement and reducing assembly steps.
Implementation Method 1
a capacitor module comprising: a base, two 3D capacitors supported by the base, each 3D capacitor comprising two capacitor terminals respectively connected to the two line terminals of one line of the pair of transmission lines
Data Source
Figure 1A~1B
Figure 2A~2B
Figure 3~4
AI summary
An electronic device and a method for manufacturing an electronic device, the electronic device comprising a board (200) equipped with a pair (201) of differential transmission lines (202A, 202A', 202B, 202B'), each line of the pair having an opening extending between two line terminals, the device further comprising a capacitor module (CM) comprising: a base (203), two 3D capacitors (204A, 204B) supported by the base, each 3D capacitor comprising two capacitor terminals respectively connected to the two line terminals of one line of the pair of transmission lines.