3D Semiconductor Chip Testing via Shared Data Channels
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Solution Overview
Problem
The existing methods for testing semiconductor apparatuses are inefficient, particularly in 3D semiconductor apparatuses where multiple chips are stacked, leading to increased test time due to the complexity of data transmission and processing.
Innovation Solution
A semiconductor apparatus is designed with first and second chips sharing data channels, utilizing a data output control unit, data selection unit, and drivers to generate enable signals and output normal or test data through specific data channels, allowing simultaneous testing of multiple chips by switching between normal and test modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If multiple chips are stacked vertically to achieve high integration, then the package area is reduced, but the test time increases due to complex data communication requirements
Solution Approach 1:
The data communication path is segmented into multiple independent channels (first data channel, second data channel, etc.), allowing parallel data transmission between stacked chips. This segmentation enables simultaneous testing of multiple chips through different data channels, reducing overall test time while maintaining the compact vertical stacking architecture
Solution Approach 2:
The system dynamically switches between normal operation mode and test operation mode through control signals. During test operation, the data communication paths are reconfigured to enable parallel testing across multiple chips, while maintaining the same physical stacking structure for compact packaging
2Productivity
If separate data channels are allocated to each chip for testing, then test efficiency is improved, but the device complexity increases due to additional control circuits
Solution Approach 1:
The data channels serve dual purposes: they function as normal data communication paths during operational mode and as test data transmission channels during test mode. The same physical infrastructure (data channels, drivers, receivers) is reused for both normal operation and testing, eliminating the need for separate dedicated test channels and reducing overall device complexity
Solution Approach 2:
The stacked chips perform self-testing by utilizing their own data communication infrastructure. Each chip can output test data through its data channels and drivers, and the receiving chips can detect this test data through their receivers, enabling autonomous testing without requiring external complex test equipment or additional control circuits
Data Source
AI summary
A semiconductor apparatus includes first and second chips sharing first and second data channels. The first and second chips output normal data of the respective chips through the first and second data channels in a normal operation, and the first chip outputs test data of the first chip through the first data channel, and the second chip outputs test data of the second chip through the second data channel in a test operation.