3D Circuit Stacking via Permanent Silicon Carrier Substrate

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Solution Overview

Problem

Current methods for stacking 3D circuit dies face limitations in integrating high-density functional modules and through-silicon-vias interconnects without losing active circuit area, and they rely on temporary carriers with surface bonding challenges.

Innovation Solution

A silicon substrate with formed through-silicon-vias functions as a permanent carrier, attached to dies via dielectric-dielectric bonding, allowing for face-to-face bonding and electrical connection, with the substrate thinned to reveal vias for high-density electronic component integration and heat dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If through-silicon-vias are formed in circuit dies to increase interconnect density, then the number of interconnects increases, but active circuit area is lost

Engineering Contradiction:
Improvenumber of through-silicon-vias interconnectsVSAvoidactive circuit area
Core Design Contradiction:
Quantity of substanceVSArea of moving object

Solution Approach 1:

The patent segments the through-silicon-via formation process by creating them in a separate carrier substrate rather than directly in the circuit die. This allows the die to maintain its active circuit area while the carrier substrate provides the high-density via interconnect structure, effectively separating the interconnect function from the active circuit area.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a carrier substrate as an intermediary between the circuit die and the final interconnect structure. This carrier substrate serves as a mediator that holds the high-density through-silicon-vias and can be bonded to the die, allowing the die to avoid direct via formation that would consume its active area while still achieving high interconnect density.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If temporary carriers are used for stacking circuit dies, then alignment and bonding are facilitated, but surface bonding challenges and process complexity increase

Engineering Contradiction:
Improvealignment and bonding facilitationVSAvoidtemporary carrier removal process
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent extracts the carrier substrate function from being a temporary alignment aid and makes it a permanent structural component. By forming the through-silicon-vias in the carrier substrate before bonding, the carrier remains as part of the final structure, eliminating the need for removal processes while maintaining alignment and bonding benefits.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs preliminary action by forming the through-silicon-vias in the carrier substrate before bonding it to the circuit die. This preliminary via formation in the carrier (rather than in the die) simplifies the overall process by enabling via creation at an optimal stage, facilitating alignment, and avoiding subsequent removal steps.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If high density functional modules are integrated on circuit dies, then functionality increases, but active circuit area is reduced

Engineering Contradiction:
Improvefunctional module integration densityVSAvoidactive circuit area
Core Design Contradiction:
Adaptability or versatilityVSArea of moving object

Solution Approach 1:

The patent moves the high-density via structure to a separate dimensional space (the carrier substrate) rather than confining it to the die plane. This dimensional separation allows functional modules to be integrated on the die without competing for space with via structures, as the vias reside in the carrier substrate's separate structural dimension.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the integration of high-density electronic components with reduced active circuit area loss and eliminates the need for temporary carriers, facilitating efficient electrical connections and heat management in 3D circuit stacks.

Implementation Method 1

The silicon substrate is attached onto a first die through dielectric-to-dielectric bonding

Methodology Applied
Scientific EffectDielectric-to-dielectric bonding: Chemical Bonding

Implementation Method 2

The silicon substrate can be thinned to reveal the through-silicon-vias

Methodology Applied
Scientific EffectSubstrate thinning: Ablation

Implementation Method 3

the silicon substrate may include a metal element that dissipate heat generated from operation of the micro LEDs

Methodology Applied
Scientific EffectHeat dissipation: Conduction (thermal)

Data Source

PatentUS10700041B2Stacking of three-dimensional circuits including through-silicon-vias
Publication Date: 2020.06.30 META PLATFORMS TECHNOLOGIES LLC
  • US10700041B2 patent drawing
  • US10700041B2 patent drawing
  • US10700041B2 patent drawing

AI summary

An assembly of circuit dies is stacked through oxide-oxide bonding. The assembly includes a silicon substrate, in which a plurality of through-silicon-vias are formed. The silicon substrate is attached onto a die through dielectric-dielectric bonding with at least part of the through-silicon-vias electrically connected to the die. The silicon substrate and die are attached onto another die through oxide-oxide bonding. Then the through-silicon-vias are revealed. The silicon substrate functions as a carrier substrate before the revealing. The silicon substrate and two dies can be attached to a printed circuit board, which is electrically connected to the two dies. One or more electrical components can be attached onto the silicon substrate and electrically connected to the die through the through-silicon-vias. The silicon substrate may include a metal element for diffusing heat generated from operation of the one or more electrical components.