3D Semiconductor Contact Structure for Higher Logic Cell Density
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Solution Overview
Problem
As semiconductor devices scale down, the operating characteristics of MOS field effect transistors deteriorate, necessitating improved integration and electrical performance in three-dimensional semiconductor devices.
Innovation Solution
A three-dimensional semiconductor device design featuring sequentially stacked source/drain patterns, contact structures, and contact lines, with active contacts having horizontal and vertical extension parts, allowing for vertical stacking of transistors and reduced cell height.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If MOS field effect transistors are scaled down to reduce device size, then integration density is improved, but operating characteristics deteriorate
Solution Approach 1:
The patent transitions from planar two-dimensional transistor layouts to three-dimensional vertically stacked transistor structures. Multiple transistor channels are stacked vertically to increase integration density while maintaining adequate channel dimensions for acceptable operating characteristics. The contact structure extends through multiple tiers to reach source/drain regions of stacked transistors, enabling compact vertical integration without excessive scaling of individual transistor dimensions.
Solution Approach 2:
The contact structure is designed with nested components where a contact hole penetrates through insulating layers to reach source/drain regions, and a contact line is positioned within the contact hole. This nested arrangement allows efficient use of vertical space and enables multiple contacts to be stacked closely together, improving integration density while maintaining reliable electrical connections.
2Area of stationary object
If device size is reduced to improve integration, then area is decreased, but manufacturing precision requirements increase
Solution Approach 1:
By stacking transistors and contacts vertically in the third dimension, the patent reduces the horizontal footprint of the logic cell. The contact structure extends vertically through multiple tiers to reach source/drain regions of stacked transistors, allowing compact vertical integration that decreases overall device area while distributing manufacturing tolerances across multiple fabrication steps.
Solution Approach 2:
The contact structure is divided into distinct components: a contact hole penetrating through insulating layers, a contact line positioned within the hole, and multiple tiers of source/drain patterns. This segmentation allows each component to be optimized and fabricated separately with appropriate precision requirements, making the overall miniaturization more manufacturable.
3Area of stationary object
If vertical stacking is implemented to improve integration, then area is reduced, but device complexity increases
Solution Approach 1:
The patent employs vertical stacking of multiple transistor channels and contact tiers to reduce the horizontal logic cell area. The contact structure spans multiple tiers vertically, with contact holes penetrating through insulating layers to reach source/drain regions of stacked transistors. This vertical integration consolidates multiple components into a compact three-dimensional structure.
Solution Approach 2:
The contact structure serves multiple functions: it provides electrical connection to source/drain regions of vertically stacked transistors, acts as an interconnect between different tiers, and enables compact vertical integration. The contact hole and contact line configuration is reused across multiple tiers, reducing overall device complexity despite the vertical stacking.
Data Source
AI summary
A three dimensional semiconductor device includes first, second, third and fourth source/drain patterns sequentially stacked on a substrate, a contact structure on the first to fourth source/drain patterns and a contact line on the contact structure. The contact structure includes a first active contact on the first source/drain pattern, a second active contact on the second source/drain pattern, a third active contact on the third source/drain pattern, and a fourth active contact on the fourth source/drain pattern. A first vertical extension part of the first active contact is adjacent to one side of the contact structure, and a second vertical extension part of the second active contact is adjacent to the other side of the contact structure. A third vertical extension part of the third active contact is disposed between the first and second vertical extension parts and is closer to the first vertical extension part.