3D Flash Memory Device With Segmented Metal Gate
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Solution Overview
Problem
Conventional Vertical Stacked Array Transistors (VSATs) have low storage density, are limited by their manufacturing process which prohibits metal gates, and have channel currents flowing in a reversed 'U' shape, restricting expandability and increasing threshold voltage.
Innovation Solution
A 3-D flash memory device manufacturing method involving a semiconductor structure with a fin structure and alternating gate and insulation layers, where a groove is formed to separate the channel, second insulation, and gate layers, allowing for a metallic second gate layer to be inserted, increasing storage density and expandability, and replacing the polysilicon gate with a tungsten metal gate to lower threshold voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional VSAT manufacturing process is used, then the device can be manufactured with existing processes, but storage density remains low and metal gate is prohibited
Solution Approach 1:
The gate structure is segmented into a first gate layer (polysilicon) and a second gate layer (metal), with the second gate layer positioned in cavities formed within the first gate layer. This segmentation allows the device to overcome the limitation of conventional processes by introducing metal gate functionality while maintaining compatibility with existing manufacturing workflows. The segmented approach enables selective application of different materials and processes to different parts of the gate structure, thereby increasing storage density without requiring complete process overhaul.
Solution Approach 2:
The second gate layer (metal gate) is nested within cavities formed in the first gate layer (polysilicon gate). This nested structure allows the metal gate to be integrated into the existing polysilicon gate architecture, enabling the device to achieve lower threshold voltage and higher storage density while maintaining compatibility with conventional manufacturing processes. The nesting approach effectively combines the benefits of both material types within a unified structure.
2Ease of manufacture
If polysilicon gate is used, then manufacturing is simpler, but threshold voltage is high and power consumption increases
Solution Approach 1:
The gate structure uses a composite of polysilicon and metal materials, where the first gate layer is made of polysilicon and the second gate layer is made of metal. This composite structure combines the manufacturing simplicity of polysilicon with the low resistance and low power consumption characteristics of metal. The metal gate layer effectively reduces the threshold voltage and power consumption while the polysilicon layer maintains ease of manufacture, creating a synergistic effect that addresses both concerns simultaneously.
3Adaptability or versatility
If channel current flows in reversed U shape, then device structure is conventional, but expandability is limited
Solution Approach 1:
The invention inverts the conventional channel current flow path by introducing a groove that separates the channel layer into distinct regions. Instead of the current flowing in a reversed U shape, the groove forces the current to flow in a more linear, controlled path through the channel layer. This inversion of the current path simplifies the overall device structure and significantly improves expandability, as the linear current path allows for easier scaling and integration with other device components.
Data Source
AI summary
A 3-D flash memory device and its manufacturing method, relating to semiconductor technology. The manufacturing method comprises: providing a semiconductor structure comprising a substrate, a first insulation layer on the substrate, a fin structure comprising a first gate layer and a second insulation layer stacked alternately over each other on the first insulation layer, a third insulation layer on two sides of the fin structure, with the first gate layer being surrounded by the first, the second and the third insulation layers, and at least one channel layer covering the fin structure and the third insulation layer; and forming a groove by etching the channel layer, the second insulation layer and the first gate layer along an extension direction of the fin structure. This inventive concept improves the storage density of a 3-D flash memory device.