Solid-State Devices TRIZ Cases

Strategic electrode positioning eliminates overlap with gate and data lines, reducing signal distortion and improving display quality.

Selective etching creates voids under silicon layers in a dynamic threshold transistor, reducing parasitic capacitance and leakage current.

A III-V based ferroelectric layer replaces hafnium in memory devices to provide a square-like polarization-electric field loop.

A solid resin film covers the OLED device while an inorganic silicon nitride frame bonds to adhesive on the package lid.

Controller loads a lookup table containing read reference voltage sets to adjust discrimination thresholds during memory operations.

A phosphorescent light-emitting element uses Förster energy transfer between stacked dopants to enhance emission efficiency.

A laser beam ablates semiconductor epitaxial stacks to form isolation trenches that segment light-emitting diode units.

Increasing via pattern spacing reduces gray tone mask effects for gentler wall slopes.

Via-holes in the protective layer enable electrical connectivity while blocking oxygen and moisture from degrading the OLED device.

A semiconductor photomultiplier retains an insulating layer over the active region to support an anti-reflective coating.

Alternating trench etching and isolation filling prevent mask toppling, enabling reliable feature formation below photolithographic limits.

Multiple light emitting elements with distinct peak wavelengths improve color rendering while reflective members prevent absorption to boost luminance.

Piezoelectric optical MEMS devices integrate embedded moisture barrier layers between glass and semiconductor substrates to seal the lens assembly.

A light source assembly uses a concave lens layer covering convex lenses to converge multi-color light.

Segmenting the detector into a mono-crystalline active-pixel array and scintillator resolves low read-out speed and noise in medical X-ray imaging.

Thermosetting epoxy encapsulation resin blends molecular weight fractions with flake fillers to form a robust moisture barrier layer.

Through regions penetrate stacked gate electrodes to enable shared word lines and vertical channel access in 3D memory arrays.

Segmented light-shielding layers beneath the active layer reduce photo leakage current and threshold voltage shifts in displays.

A laser protection layer on the electroluminescent device layer prevents metal warpages during hole formation.

A nonvolatile memory device uses a control circuit to generate gate-induced drain leakage current for precise block erasure.

This structure prevents thermal reactions between the ohmic contact and low refractive index layers while eliminating light absorption at metal contact points.

Applying auxiliary voltage during annealing aligns ferroelectric dipoles, resolving random orientation issues and ensuring consistent programming voltages.

Segmented micro-wire electrodes extend continuously across pixel gaps to maintain electrical pathways.

Data lines extend over semiconductor layers to shield channels, reducing light leak current and parasitic capacitance without complex lamination.

A patterned circuit carrier with an insulating substrate and bottom conducting layer bonds the LED die directly to enhance light extraction.

A copolymer structure enhances open circuit voltage and optical absorption in organic photovoltaics.

A semiconductor device uses optical selection circuits to control multiple switch states with a single input signal.

A mandrel layer pattern reduces the aspect ratio of metal wiring structures to facilitate complete inter-wiring space filling.

Inorganic nanoparticles in the UV-cured encapsulant enhance seal strength and absorb moisture to extend OLED service life.

Direct upper-surface wire bonding eliminates via holes, reducing side-wall width to expand the inner chamber volume for larger integrated circuits.

A back-thinned image sensor uses a pure boron layer to create a p-type doped region on the semiconductor membrane surface.

Segmenting the electrode structure into asymmetric concentric rings reduces series voltage requirements while maintaining high brightness.

Stand-off legs self-align a hybrid microlens array over VCSEL elements, resolving low optical throughput caused by small active regions.

A semiconductor memory device adjusts refresh operations based on error information obtained through ECC decoding.

A multi-band focal plane array integrates visible and infrared detection using a single microbolometer membrane structure.

Vertical trench structures with insulating plugs redistribute electric fields to increase blocking voltage and reduce peripheral area.

High resistivity tin oxide crystals enable compact X-ray detection without toxic materials.

Segmented pixel electrodes eliminate black disclination lines by isolating conflicting electric fields within light shielding regions.

A ring shaped gate electrode surrounds an oblique active layer portion to strengthen electrostatic control over the channel region.

Integrates Fabry-Perot optical cavities with thermocouples to detect ambient light and infrared signals within a single device structure.

Array substrate design multiplexes touch electrodes with common electrodes, reducing interference from additional signal lines that causes display unevenness.

A display apparatus uses a divided planarization layer to support an organic-inorganic encapsulation structure.

Aligning μLED electrodes on the same horizontal plane eliminates tilt during bonding, resolving height difference issues that limit N-type electrode size.

An image pickup apparatus captures multiple images in different polarization directions while maintaining a constant optical F-number.

Segmented channel holes through stacked layers enhance reliability and operating uniformity in 3D semiconductor devices facing size reduction limits.

Insulating bank structures and top electrode layers reduce contact resistance while maintaining uniform light emission for high-resolution displays.

A ball array mask guides solder balls onto printed wiring board pads using a suction cylinder to gather and position components accurately.

Routing signal lines through imaging pixels reduces metal interconnect length, preserving area for MiM capacitors and increasing well capacity.