Array Substrate Via Formation Gray Tone Mask Effect
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Solution Overview
Problem
The manufacturing process of TFT-LCD array substrates faces issues with the passivation layer being damaged during the formation of vias in the gate insulating layer, leading to exposure and oxidation of the underlying second metal layer due to the Gray Tone Mask effect, caused by the close proximity of via patterns on the photomask.
Innovation Solution
Increasing the distance between adjacent via patterns on the photomask to more than 10 μm reduces the Gray Tone Mask effect, allowing for a gentler slope of the via walls and enabling the passivation layer to cover the second metal layer without breaking, thus preventing oxidation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the distance between adjacent via patterns on the photomask is kept small, then the productivity and area utilization are improved, but the Gray Tone Mask effect causes steep via wall slopes that damage the passivation layer and expose the metal layer to oxidation
Solution Approach 1:
The patent changes the spatial parameter (distance between via patterns) from a small value to greater than 10 μm. This parameter change eliminates the Gray Tone Mask effect during photolithography, resulting in gentler via wall slopes that allow the passivation layer to be properly deposited without breaking, thus maintaining both productivity and reliability
2Reliability
If the distance between adjacent via patterns on the photomask is increased to reduce Gray Tone Mask effect, then the passivation layer integrity is improved, but the photomask area and manufacturing complexity increase
Solution Approach 1:
By establishing a clear quantitative threshold (distance > 10 μm), the patent simplifies the photomask design criteria. This parameter specification makes the design rule easy to understand and implement, reducing the actual manufacturing complexity despite the increased spacing requirement
3Speed
If the via wall slope is made steep due to Gray Tone Mask effect, then the via formation speed is improved, but the passivation layer breaks during deposition causing metal layer oxidation
Solution Approach 1:
The patent applies preliminary anti-action by pre-adjusting the via pattern spacing to prevent the Gray Tone Mask effect from occurring in the first place. This preventive measure ensures that via walls are formed with gentle slopes from the beginning, allowing the passivation layer to be deposited intact and preventing metal layer oxidation before it can occur
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method ensures the second metal layer is completely covered by the passivation layer, preventing oxidation and improving the overall performance of the TFT array substrate by reducing the Gray Tone Mask effect and allowing for gentle via wall formation.
Implementation Method 1
providing a first photomask and using the first photomask to expose and develop the first photoresist layer to form a plurality of first photoresist vias
Implementation Method 2
using the first photoresist layer as a shielding layer for etching the gate insulating layer to form a plurality of first conductive vias
Implementation Method 3
forming a passivation layer covering the second metal layer on the gate insulating layer
Data Source
AI summary
Provided is a manufacturing method of an array substrate. When a first photomask is used to pattern a gate insulating layer to form a plurality of first conductive vias within the OLB area, by increasing a distance between two adjacent first via patterns to more than 10μm, the effect of gray tone mask effect is reduced as a first conductive via is formed in the gate insulating layer Thus, a slope of the first photoresist via wall is relatively gentle, so that a slope of a via wall of the first conductive via is also relatively gentle, and as a passivation layer is formed thereafter, the passivation layer can be easily formed on the wall of the first conductive via without breaking. Then, a second metal layer in the first conductive via can be completely covered by the passivation layer to avoid oxidation.