Semiconductor Edge Termination Using Vertical Trenches

The patent transitions from planar (2D) edge-termination structures to vertical (3D) mesa structures. The mesa structures extend vertically from the semiconductor surface, creating a three-dimensional field distribution that achieves high blocking capability without requiring large lateral peripheral areas. This dimensional change allows the electric field to be managed in the vertical direction rather than spreading horizontally.

The patent applies different structural characteristics to different regions: the central active area maintains planar geometry for current conduction, while the peripheral termination region uses vertical mesa structures with specific geometries optimized for field distribution. This local differentiation allows each region to perform its specific function optimally without compromising the other.

The patent combines the mesa structure formation with the existing semiconductor fabrication process flow. The mesa structures are formed using standard photolithography, etching, and deposition techniques that are already part of the manufacturing process, integrating the edge-termination function into the main device fabrication rather than requiring separate post-processing steps.

The patent optimizes the mesa structure geometry parameters (height, width, slope angles) to achieve effective field termination while minimizing the need for additional processing steps. By carefully controlling these geometric parameters during fabrication, the structures provide the desired electrical performance without requiring extensive mechanical grinding or other complex post-processing operations.