Ferroelectric Memory Cell Dipole Orientation via Auxiliary Voltage

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Solution Overview

Problem

The manufacturing process of ferroelectric memory cells suffers from low reproducibility of properties due to random orientation of dipoles during crystallization, leading to variations in programming voltages and memory states, which can result in higher stress and overlap of memory states during programming operations.

Innovation Solution

A method for fabricating memory cells involves forming a ferroelectric structure, annealing it, and applying an auxiliary voltage during crystallization to orient dipoles in a predefined direction, thereby controlling the electric properties and structural alignment of the ferroelectric material, ensuring consistent properties across memory cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional annealing process is used without auxiliary voltage, then manufacturing process is simple, but dipole orientation is random leading to low reproducibility of memory cell properties

Engineering Contradiction:
Improvereproducibility of memory cell propertiesVSAvoidcomplexity of fabrication process
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

An auxiliary voltage is applied to the ferroelectric structure before and/or during the annealing process to pre-orient the dipoles in a desired direction. This preliminary action ensures that when crystallization occurs, the dipoles are already aligned, leading to reproducible memory cell properties such as consistent programming voltages and reduced statistical variations across different memory cells.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If random dipole orientation occurs during crystallization, then manufacturing process is simple, but programming voltages vary and memory states overlap

Engineering Contradiction:
Improveconsistency of programming voltagesVSAvoidsimplicity of fabrication process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent changes the electrical parameter (applying an auxiliary voltage) during the annealing process to control dipole orientation. By adjusting the voltage parameter before and/or during annealing, the dipoles are oriented in a controlled manner, ensuring consistent programming voltages and preventing overlap of memory states, thereby improving reliability without significantly complicating the manufacturing process.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If no auxiliary voltage is applied, then fabrication process is straightforward, but statistical variations in memory cell properties are high

Engineering Contradiction:
Improveuniformity of memory cell propertiesVSAvoidadditional voltage supply circuitry
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The auxiliary voltage is applied in advance of and/or during the annealing process to establish a uniform dipole orientation across all memory cells. This preliminary action ensures that statistical variations in properties such as programming voltage are minimized, leading to more uniform memory cell characteristics across the entire memory device.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reproducibility of memory cell properties, reducing statistical variations and ensuring consistent programming voltages and memory states, thereby improving the reliability and efficiency of memory cell operations.

Implementation Method 1

applying an auxiliary voltage during crystallization to orient dipoles in a predefined direction

Methodology Applied
Scientific EffectElectrostatic alignment: Electric Field

Implementation Method 2

annealing it, and applying an auxiliary voltage during crystallization

Methodology Applied
Scientific EffectCrystallization: Crystallisation

Data Source

PatentUS11437402B2Memory cell circuit, memory cell arrangement, and methods thereof
Publication Date: 2022.09.06 FERROELECTRIC MEMORY GMBH
  • US11437402B2 patent drawing
  • US11437402B2 patent drawing
  • US11437402B2 patent drawing

AI summary

A memory cell circuit is provided that may include: a memory cell, the memory cell including a ferroelectric structure; a first control terminal and a second control terminal connected to the memory cell, the first control terminal and the second control terminal being configured to allow an operation of the memory cell; and a first auxiliary terminal and a second auxiliary terminal connected to the memory cell, the first auxiliary terminal and the second auxiliary terminal being configured to provide an auxiliary voltage to the ferroelectric structure.