3D Flash Memory Word-Line Layout for Faster Dense Integration
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Solution Overview
Problem
Conventional 3D flash memory technologies suffer from delayed operation speed, low integration, and complex layout due to out-of-plane connection paths and increased wire complexity, particularly in the connection of word lines to row decoders and the layout of peripheral circuits.
Innovation Solution
The proposed 3D flash memory structure connects word lines to a row decoder through contacts, connection wires, and plug vias within the same plane, and arranges row and column decoders symmetrically to optimize layout, while incorporating a buried common source line to simplify the manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If outer wire connections are used to connect word lines to row decoder, then connection can be established, but operation speed is delayed and layout becomes complicated
Solution Approach 1:
The patent transitions from out-of-plane wire connections to in-plane contact connections. By placing the row decoder in the same plane as the word lines and using contact plugs to establish connections within the plane, the invention eliminates the need for external wire routing in the vertical dimension, thereby reducing connection path length and improving operation speed while simplifying the overall layout structure.
2Ease of manufacture
If common source line is formed with step difference to separate word lines, then word line separation is achieved, but manufacturing complexity increases
Solution Approach 1:
The patent extracts the word line separation function from the common source line structure. By introducing dedicated word line separation slits that extend through the substrate, the invention separates word lines belonging to different memory blocks without requiring the common source line to have complex step differences, thereby simplifying the manufacturing process while maintaining effective word line separation.
3Quantity of substance
If conventional source line structure with step difference is used, then word line separation function is provided, but cell integration is reduced
Solution Approach 1:
The patent segments the word line separation function into dedicated separation slits distributed throughout the structure. Instead of using a single complex stepped source line structure, the invention introduces multiple simple separation slits at strategic locations, which effectively separate word lines from different memory blocks while maintaining a flat, integrated common source line structure that improves cell integration density.
Data Source
AI summary
The present invention relates to a three-dimension flash memory to which an efficient word line connection structure is applied, and a method for manufacturing same, wherein a plurality of word lines are connected to a low decoder respectively through contacts of the plurality of word lines, a plurality of connection wires, and plug vias of the plurality of word lines. The row decoder and a column decoder are arranged to divide a plurality of peripheral circuit blocks such that the plurality of peripheral circuit blocks are symmetrical to each other in the plane of the three-dimensional flash memory. The three-dimension flash memory is configured in a buried type in which a common source line is buried in a substrate, in order to improve integration density.