Monolithic 3D GaN-Si IC Structure for Power Delivery and RF
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Solution Overview
Problem
Current semiconductor technologies, such as Si and III-V, face limitations in power delivery and RF communication due to fundamental constraints, necessitating the development of more efficient and compact solutions for next-generation compute systems, particularly in 5G and beyond applications.
Innovation Solution
The integration of gallium nitride (GaN) three-dimensional integrated circuit technology, which enables monolithic 3D integration of GaN NMOS and Si CMOS, allowing for compact, efficient power delivery and RF solutions with enhanced performance and reduced form factor, leveraging features like drain field plates, multi-gate structures, and advanced fabrication techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If Si and III-V technologies are used for power delivery and RF communication, then basic functionality is achieved, but energy efficiency and performance are limited due to fundamental constraints
Solution Approach 1:
The patent combines GaN HEMT technology with Si CMOS technology in a hybrid integrated circuit architecture. The GaN layer provides high-power and RF functions while the Si substrate provides digital control and logic functions, achieving superior energy efficiency and performance compared to using either technology alone.
Solution Approach 2:
The patent uses a composite structure consisting of a GaN layer grown on a Si substrate. This composite material approach leverages the wide bandgap properties of GaN for high efficiency power and RF operations while utilizing the mature Si CMOS ecosystem for control functions, resolving the fundamental limitations of single-material technologies.
2Productivity
If conventional 2D integrated circuit architecture is used, then manufacturing simplicity is maintained, but device density and functionality are limited
Solution Approach 1:
The patent transitions from conventional 2D planar integration to 3D vertical integration by stacking GaN HEMT devices and Si CMOS circuits in different layers. This dimensional change enables significantly higher device density and functionality while maintaining manufacturing feasibility through established 3D IC techniques.
3Use of energy by moving object
If GaN technology is adopted for high-power and RF applications, then energy efficiency improves, but manufacturing cost and fabrication complexity increase
Solution Approach 1:
The patent segments the integrated circuit into distinct functional regions: GaN HEMT devices for high-power and RF amplification, and Si CMOS circuits for digital control and signal processing. This segmentation allows each technology to be optimized for its specific function while simplifying the overall fabrication process by using established manufacturing techniques for each material system.
Data Source
AI summary
Gallium nitride (GaN) three-dimensional integrated circuit technology is described. In an example, an integrated circuit structure includes a layer including gallium and nitrogen, a plurality of gate structures over the layer including gallium and nitrogen, a source region on a first side of the plurality of gate structures, a drain region on a second side of the plurality of gate structures, the second side opposite the first side, and a drain field plate above the drain region wherein the drain field plate is coupled to the source region. In another example, a semiconductor package includes a package substrate. A first integrated circuit (IC) die is coupled to the package substrate. The first IC die includes a GaN device layer and a Si-based CMOS layer.