3D Stacked IC Column Bypass for Failure-Tolerant Routing
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Solution Overview
Problem
Existing electronic components, particularly semiconductor devices, face failures due to various causes such as excess temperature, voltage, radiation, mechanical stress, and parasitic structures, which can lead to reduced component lifespan and performance issues.
Innovation Solution
The implementation of 3D stacked integrated circuits (3D SICs) with failure management capabilities, including configurable routes, allows for the bypassing of failed functional blocks or parts, thereby preventing the entire system from failing abruptly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If 3D stacked integrated circuits are used to shorten electrical paths and increase density, then speed and footprint are improved, but reliability deteriorates due to increased susceptibility to failures from temperature, voltage, radiation, and mechanical stress
Solution Approach 1:
The 3D stacked integrated circuit is divided into multiple independent functional blocks or dies stacked vertically. Each die can be independently tested, replaced, or rerouted around failures, allowing the system to maintain functionality even when individual components fail. This segmentation enables failure isolation and continues operation with degraded but functional performance.
2Productivity
If electronic components operate under extreme conditions (excess temperature, voltage, radiation, mechanical stress), then performance is improved, but lifespan deteriorates due to accelerated failure
Solution Approach 1:
Failure management circuitry and rerouting paths are built into the 3D stacked IC structure before deployment. These preliminary protective measures detect failures early and automatically activate alternative pathways before complete system failure occurs, extending operational lifespan while maintaining performance under extreme conditions.
Solution Approach 2:
Redundant interconnect pathways and spare functional blocks are incorporated into the 3D stack architecture in advance. When failures occur due to temperature, voltage, radiation, or mechanical stress, these pre-positioned backup paths provide cushioning that prevents catastrophic failure and extends component lifespan.
3Reliability
If failure management with configurable routes is implemented, then reliability is improved by bypassing failed blocks, but device complexity increases
Solution Approach 1:
The failure management functionality, including detection circuitry and rerouting logic, is merged directly into the 3D stacked IC structure itself rather than being implemented as separate external components. This integration reduces overall system complexity while maintaining improved reliability through automatic failure detection and rerouting capabilities.
Data Source
AI summary
A three-dimensional stacked integrated circuit (3D SIC) having a non-volatile memory die, a volatile memory die, and a logic die. The non-volatile memory die, the volatile memory die, and the logic die are stacked. The 3D SIC is partitioned into a plurality of columns that are perpendicular to each of the stacked dies. Each column of the plurality of columns is configurable to be bypassed via configurable routes. When the configurable routes are used, functionality of a failing part of the column is re-routed to a corresponding effective part of a neighboring column.