3D IC Face-to-Back Bonding TSV Power Delivery
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Solution Overview
Problem
The challenge in integrated circuit packaging is the increased space requirements due to wiring connections in chip or die stacking, particularly for sophisticated mobile devices, where through-silicon vias occupy significant active silicon area and require custom design matching power delivery needs, impacting the layout and efficiency of memory and CPU dies.
Innovation Solution
A connected integrated circuit structure is achieved through face-to-back bonding configuration, where through-silicon vias connect power and signal connections from a CPU die to memory dies, allowing for a redistribution layer to align contact points, enabling efficient power delivery and reducing the need for uniform via spacing across the die surface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through-silicon vias are used to connect dies in face-to-face bonding configuration, then electrical connection between dies is achieved, but significant active silicon area is occupied and custom design matching is required
Solution Approach 1:
The patent inverts the conventional face-to-face bonding approach by using face-to-back bonding configuration. Instead of having through-silicon vias pass through the active area of the second die, the vias pass through the first die to connect to bond pads on the back side of the second die. This inversion eliminates the need to occupy active silicon area in the second die while maintaining reliable electrical connection.
Solution Approach 2:
The patent transitions from a two-dimensional planar connection approach to a three-dimensional vertical connection approach. By using through-silicon vias that extend vertically through the first die and connecting to bond pads on the back side of the second die, the patent utilizes the third dimension (depth/vertical direction) to establish electrical connections without consuming lateral active silicon area.
2Power
If through-silicon vias are uniformly spaced across the die surface to meet power delivery requirements, then power delivery is sufficient, but the design and layout of the die is heavily impacted
Solution Approach 1:
The patent applies local quality by concentrating through-silicon vias and power delivery resources at specific locations where they are most needed - at the bond pads on the back side of the second die. This allows non-uniform via spacing that optimizes power delivery to high-power-consuming regions while reducing via density in low-power regions, thereby simplifying die design and layout compared to uniform spacing requirements.
3Area of moving object
If face-to-back bonding configuration is used to reduce active area occupation, then space efficiency is improved, but wiring complexity increases
Solution Approach 1:
The patent applies preliminary action by pre-configuring the first die with through-silicon vias extending through it before bonding to the second die. The bond pads on the back side of the second die are pre-positioned to align with these vias. This preliminary preparation simplifies the overall wiring configuration by eliminating the need for complex post-bonding routing and reducing the complexity of aligning vias through both dies during assembly.
Data Source
AI summary
An apparatus including a first die including a plurality of conductive through substrate vias (TSVs); and a plurality of second dice each including a plurality of contact points coupled to the TSVs of the first die, the plurality of second dice arranged to collectively include a surface area approximating a surface area of the first die. A method including arranging a plurality of second dice on a first die such that collectively the plurality of second dice include a surface area approximating the surface area of the first die; and electrically coupling a plurality of second device to a plurality of the first die. A system including an electronic appliance including a printed circuit board and a module, the module including a first die including a plurality of TSVs; and the plurality of second dice arranged to collectively include a surface area approximating the surface area of the first die.