3D IC Stacking with Re-Distribution Layers for Flexible Pad Bonding

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Solution Overview

Problem

Existing 3D integration technologies face challenges in die bonding pad position, size, and quantity limitations, which hinder efficient stacking and interconnection of semiconductor structures.

Innovation Solution

A three-dimensional integrated circuit structure is formed by stacking semiconductor structures with direct bonding through re-distribution layers, utilizing hybrid bonding technology and redefining bonding pad positions, and incorporating conductive posts and connecting elements like solder bumps for electrical connectivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional die bonding methods are used, then bonding pad positioning is constrained by fixed patterns, but this limits flexibility in stacking and interconnection configurations

Engineering Contradiction:

Improvebonding pad position flexibilityVSAvoidbonding configuration complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent transitions from planar bonding pad arrangements to three-dimensional stacking configurations, enabling bonding pads to be positioned at different vertical levels (Z-axis) in addition to horizontal positions. This dimensional expansion allows flexible interconnection patterns between multiple semiconductor structures without being constrained to fixed two-dimensional pad layouts.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The bonding pad structure is segmented into multiple independent pads distributed across different semiconductor structures and vertical levels. Each bonding pad can be independently positioned and connected, allowing flexible configuration of interconnections without requiring fixed global pad patterns across the entire device.

Inventive Principle:

Principle #1Segmentation

2Reliability

If more bonding pads are used to enhance interconnection, then electrical connectivity improves, but manufacturing precision requirements increase

Engineering Contradiction:

Improveelectrical connectivityVSAvoidbonding pad alignment precision

Core Design Contradiction:

ReliabilityVSManufacturing precision

Solution Approach 1:

The patent introduces re-distribution layers as intermediary structures between bonding pads on different semiconductor structures. These re-distribution layers provide additional routing paths and buffering, allowing bonding pads to be connected even when precise direct alignment is difficult to achieve, thereby reducing the stringency of manufacturing precision requirements.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

By utilizing vertical stacking (three-dimensional configuration), the patent adds the Z-axis dimension for interconnection. This allows electrical connectivity to be achieved through vertical pathways rather than requiring high-precision lateral alignment, effectively reducing the manufacturing precision burden while maintaining or enhancing electrical connectivity.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

3Adaptability or versatility

If heterogeneous integration is implemented to increase functionality, then device performance improves, but manufacturing process complexity increases

Engineering Contradiction:

Improvefunctional integration capabilityVSAvoidmanufacturing process simplicity

Core Design Contradiction:

Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent segments the integrated circuit into multiple separate semiconductor structures that can be manufactured using different processes and then stacked. This segmentation allows each structure to be optimized independently for its specific function, enabling heterogeneous integration while managing manufacturing complexity through modular fabrication and assembly.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent employs preliminary actions by pre-forming re-distribution layers, bonding pads, and interconnection structures on each semiconductor structure before stacking. This preliminary preparation allows heterogeneous structures to be manufactured and characterized independently, simplifying the overall manufacturing process by separating complex fabrication steps from the final assembly stage.

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables efficient stacking and interconnection of semiconductor structures, overcoming positioning limitations and enhancing performance, density, and functionality while reducing form factor and potential costs.

Implementation Method 1

utilizing hybrid bonding technology and redefining bonding pad positions

Methodology Applied

Scientific EffectHybrid bonding: Diffusion Welding

Data Source

PatentUS20260090477A1Method for forming three-dimensional integrated circuit structure

Publication Date: 2026.03.26 UNITED MICROELECTRONICS CORP

AI summary

The present invention provides a 3D integrated circuit structure formed by stacking semiconductor structures. The semiconductor structures form a multi-die heterogeneous 3D packaging by direct bonding the bonding pads of re-distribution layers. The same or different dies are used to produce the semiconductor structures through the back-end packaging process, and then hybrid bonding technology is used to stack and interconnect the semiconductor structures. The position of the bonding pad can be redefined by re-distribution layer, thereby overcoming the limitations of chip bonding pad position, chip size and quantity.