3D IC Stacked Wafer Through Via Conductive Plug Formation
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Solution Overview
Problem
Current 3D IC manufacturing techniques face challenges in efficiently bonding and connecting stacked semiconductor wafers for optimal electrical performance and miniaturization, particularly in creating functional 3D structures like stacked BSI CMOS image sensors, where direct bonding and conductive plug formation are critical for reducing electrical paths and enhancing functionality.
Innovation Solution
The method involves direct bonding of semiconductor wafers with conductive plugs and caps, using a process that includes thinning, anti-reflective coating, patterning, and electroplating to form through vias and conductive connections, ensuring electrical isolation and efficient light transmission, while maintaining structural integrity and preventing short circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If direct bonding of semiconductor wafers is performed with conductive plugs and caps, then electrical connection reliability is improved, but manufacturing complexity increases
Solution Approach 1:
The patent applies preliminary action by forming conductive plugs and caps before the bonding process. The conductive plugs are formed in through-vias through the first substrate, and conductive caps are formed on the second substrate, both prior to bonding. This preliminary preparation ensures reliable electrical connections are established before the substrates are joined, resolving the contradiction between connection reliability and manufacturing complexity by organizing the complex steps in a logical sequence.
Solution Approach 2:
The patent segments the bonding process into distinct stages: forming through-vias, forming conductive plugs, forming conductive caps, and finally bonding the substrates. This segmentation allows each step to be optimized independently, with conductive materials being deposited and patterned separately before assembly, thereby managing manufacturing complexity while ensuring reliable electrical connections.
2Illumination intensity
If substrate thickness is reduced to enable light transmission, then optical performance is improved, but structural integrity deteriorates
Solution Approach 1:
The patent uses composite material structures to maintain structural integrity while enabling light transmission. The first substrate is thinned to allow light passage, but structural support is provided by the bonding interface with the second substrate and the conductive plug structures that extend through the thinned substrate. This composite approach resolves the contradiction between optical performance and structural strength.
Solution Approach 2:
The patent applies local quality by selectively thinning specific regions of the first substrate where light transmission is required, while maintaining greater thickness in regions requiring structural support. The conductive plugs and caps are also strategically positioned to provide both electrical connection and localized structural reinforcement, resolving the contradiction between light transmission and structural integrity through spatially differentiated properties.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables faster operation and increased functionality in compact 3D ICs by effectively connecting stacked wafers, reducing substrate thickness, and ensuring reliable electrical paths, thus enhancing the performance of 3D integrated circuits like stacked BSI CMOS image sensors.
Implementation Method 1
electroplating to form through vias and conductive connections
Data Source
AI summary
A semiconductor device includes a first substrate, a second substrate, a plurality of through vias (TVs), and a plurality of conductive caps. The first substrate has at least one electrical component disposed thereon. The second substrate is stacked on the first substrate. The TVs extend through the second substrate to be electrically connected to the at least one electrical component of the first substrate. The conductive caps respectively cover the TVs, and the conductive caps are electrically isolated from each other.


