3D Interposer Package With Sidewall Pads for Compact Wafer Stacking
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Solution Overview
Problem
Existing semiconductor device packages face challenges in accommodating sophisticated features while minimizing impact on reliability, performance, and cost.
Innovation Solution
A 3D semiconductor device is formed by singulating a sandwich-like structure of semiconductor wafers with an interposer, where semiconductor dies are interconnected via hybrid bonding, and sidewall connection pads are exposed for interconnection with a printed circuit board, enabling a compact design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If sophisticated semiconductor device features are included to meet specific application requirements, then device functionality and adaptability are improved, but reliability and performance may deteriorate due to increased complexity
Solution Approach 1:
The semiconductor device is divided into multiple separate dies (first semiconductor die, second semiconductor die) that are mounted on opposite sides of the interposer. This segmentation allows each die to be optimized for specific functions while maintaining overall system reliability through modular architecture.
Solution Approach 2:
An interposer is introduced as an intermediary substrate between the semiconductor dies and the final package structure. The interposer provides a stable mounting platform, enables precise alignment, and facilitates controlled interconnections, thereby improving reliability despite increased device sophistication.
2Ease of manufacture
If traditional semiconductor packaging configurations are used, then manufacturing processes are simple and costs are low, but device performance and reliability are compromised for sophisticated features
Solution Approach 1:
The patent transitions from traditional planar packaging to a three-dimensional stacked configuration where semiconductor dies are mounted on opposite sides of the interposer. This dimensional change enables sophisticated functionality while maintaining manufacturing feasibility through established wafer-level processing techniques.
Solution Approach 2:
The interposer is prepared in advance with predetermined connection pads and mounting structures before the semiconductor dies are attached. This preliminary preparation simplifies the overall manufacturing process by enabling parallel processing of different components and reducing assembly complexity.
3Ease of manufacture
If semiconductor dies are interconnected using conventional bonding methods, then manufacturing is easier, but device density and compactness are reduced
Solution Approach 1:
Multiple semiconductor dies are combined in a stacked configuration on opposite sides of the interposer, with their respective connection pads interconnected through the interposer structure. This merging approach achieves high device density and compactness while using conventional bonding methodologies adapted for the three-dimensional arrangement.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances reliability and performance while reducing costs by allowing for a compact 3D semiconductor device configuration.
Implementation Method 1
Semiconductor die of the first and second semiconductor wafers are interconnected with the interposer panel by way of hybrid bonding
Data Source
AI summary
A method of forming a semiconductor device is provided. The method include forming an interposer having a first set of conductive connection pads exposed at a first major side of an interposer substrate and a second set of conductive connection pads exposed at a second major side of the interposer substrate. A first semiconductor wafer is mounted on the first major side of the interposer substrate and a second semiconductor wafer is mounted on the second major side of the interposer substrate. A sandwich-like structure is formed by the first semiconductor wafer, interposer, and second semiconductor wafer. The sandwich-like structure is singulated to form a plurality of individual semiconductor device units. A plurality of sidewall connection pads are exposed along an outer perimeter of the interposer.