3D Semiconductor LED Core-Shell Structure for High-Luminance Displays
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Solution Overview
Problem
Conventional semiconductor light emitting diodes (LEDs) face limitations in achieving high luminance and compact size with improved luminous efficiency, particularly in display devices where a backlight is not required.
Innovation Solution
A three-dimensionally structured semiconductor light emitting diode is designed with a first conductivity-type semiconductor rod, an active layer, and a second conductivity-type semiconductor layer, integrated with a transparent electrode layer and passivation layer, forming a core-shell structure to enhance light emission and electrical connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Illumination intensity
If a conventional semiconductor LED structure is used, then the device can be manufactured with standard processes, but the luminance and luminous efficiency are limited
Solution Approach 1:
The patent transitions from a conventional planar LED structure to a three-dimensional structure where the active layer is formed on the side surface of a semiconductor rod rather than on a flat substrate. This dimensional change increases the light emission area and improves luminance while maintaining manufacturability through vertical growth processes.
Solution Approach 2:
The semiconductor rod is divided into multiple portions (first portion, second portion) with the active layer selectively formed on specific segments. This segmentation allows optimization of different regions for different functions, improving overall luminous efficiency while managing structural complexity.
2Illumination intensity
If the active layer is formed on the side surface of the semiconductor rod, then the light emission area is increased, but the manufacturing precision requirements are increased
Solution Approach 1:
The semiconductor rod is first formed with a defined side surface before the active layer is deposited. This preliminary preparation of the substrate geometry simplifies the subsequent active layer formation process by providing a pre-defined template, reducing the actual manufacturing precision requirements during layer deposition.
Solution Approach 2:
The active layer is selectively formed only on specific portions of the semiconductor rod side surface rather than uniformly across the entire surface. This local quality approach concentrates the light emission in optimized regions while reducing the total area requiring high-precision manufacturing.
3Volume of moving object
If a compact LED structure is designed, then the display device size is reduced, but the electrical connectivity and light emission performance may be compromised
Solution Approach 1:
The patent utilizes vertical stacking in the third dimension to achieve compact horizontal footprint while maintaining adequate electrical connectivity paths. The semiconductor rod structure provides vertical current flow paths that are shorter than lateral paths would be, improving connectivity reliability in a compact form factor.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables high-resolution display devices with improved luminance and efficiency by optimizing the light emitting structure and electrical connections, allowing for compact and high-luminance displays without the need for a backlight.
Implementation Method 1
an active layer and a second conductivity-type semiconductor layer sequentially disposed on the side surface of the first conductivity-type semiconductor rod
Data Source
AI summary
A three-dimensionally structured semiconductor light emitting diode includes a first conductivity-type semiconductor rod having integral first and second portions, the first portion defining a first surface, the second portion defining a second surface opposite the first surface, and a side surface between the first and second surfaces, an active layer and a second conductivity-type semiconductor layer on the side surface of the first conductivity-type semiconductor rod, the active layer and the second conductivity-type semiconductor layer being on the second portion of the first conductivity-type semiconductor rod, an insulating cap layer on the second surface of the first conductivity-type semiconductor rod, a transparent electrode layer on the second conductivity-type semiconductor layer, and a passivation layer on the transparent electrode layer and exposing a portion of the transparent electrode layer, the passivation layer extending to cover ends of the active layer and the second conductivity-type semiconductor layer adjacent to the first surface.