3D Semiconductor Memory With Orthogonal Air Gaps
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Solution Overview
Problem
Conventional 3D semiconductor memory structures face challenges with bridging and coupling effects due to high aspect ratios and narrow spacing between word-lines, leading to operational failures and increased coupling capacitance, which complicates the manufacturing process and increases costs.
Innovation Solution
A 3D semiconductor memory structure is designed with stacked strips and conductive lines arranged orthogonally, featuring air gaps between adjacent strips and lines to reduce coupling, achieved through conformal and non-conformal deposition methods and etching processes, ensuring physical separation and efficient electrical coupling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the distance between bit-lines and word-lines is reduced to increase storage capacity, then the storage density is improved, but the bridging effect occurs causing operational failure
Solution Approach 1:
The patent introduces air gaps that segment the conductive lines and stacked strips, physically separating adjacent structures to prevent bridging while maintaining narrow spacing for high density storage
Solution Approach 2:
Air gaps serve as intermediary spaces between conductive lines and stacked strips, providing physical separation to eliminate bridging effects while allowing the structures to remain in close proximity for high storage capacity
2Quantity of substance
If the spacing between word-lines is reduced to increase storage capacity, then the storage density is improved, but the coupling capacitance increases causing operational issues
Solution Approach 1:
Air gaps segment the electric field between adjacent word-lines, reducing the coupling capacitance while maintaining narrow spacing for high storage capacity
Solution Approach 2:
Air gaps act as intermediary dielectric spaces between adjacent conductive lines, reducing parasitic coupling capacitance while allowing dense packing for high storage density
3Quantity of substance
If the aspect ratio of bit-lines is increased to create multiple memory cells in a single footprint, then the storage capacity is improved, but the pattern-defining procedure becomes more difficult
Solution Approach 1:
Air gaps are formed preliminarily through conformal deposition and etching before final pattern definition, simplifying subsequent processing steps by providing pre-defined separation structures
Solution Approach 2:
Air gaps serve as intermediary structures that simplify pattern definition by providing pre-formed separation zones, reducing the complexity of defining high aspect ratio features
4Manufacturing precision
If conformal deposition is used to form conductive liner on stacked strips, then the manufacturing precision is improved, but the top surface planarity is worsened
Solution Approach 1:
Conformal conductive liner is deposited preliminarily on stacked strips before planarization, ensuring precise coverage of vertical surfaces while subsequent processing addresses surface planarity
Solution Approach 2:
The solution transitions from requiring planar surfaces to utilizing vertical conformal deposition, shifting the precision requirement to the vertical dimension where conformal coating excels
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The structure effectively mitigates bridging and coupling effects, enhancing the manufacturing simplicity and reducing processing costs while maintaining high storage capacity within a limited chip area.
Implementation Method 1
form a conductive liner compliant to the contour of the stacked strips by a conformal deposition
Implementation Method 2
a first air gap fills the space between two adjacent stacked strips and under one of the conductive lines... a second air gap is between the two adjacent conducive lines
Data Source
AI summary
A semiconductor structure includes a plurality of stacked strips on a substrate and a plurality of conductive lines on the stacked strips. The stacked strips and the conductive lines are arranged orthogonally to each other and a conductive liner is formed there between. A first air gap fills the space between the two adjacent stacked strips and under one of the conductive lines, which is positioned on top of said two adjacent stacked strips, whereas a second air gap is between the two adjacent conductive lines. The material of the conductive liner is different from that of the conductive lines. The distance between the two adjacent stacked strips is below 200 nm, and the aspect ratio of the stacked strip is at least 1.