3D Memory Word Lines Using Aluminum Intermetallic Alloy Layers

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current three-dimensional memory devices face challenges in efficiently forming electrically conductive layers for word lines, particularly in achieving a reliable intermetallic alloy of aluminum with other metals, which affects the performance and density of memory arrays.

Innovation Solution

A method involving the formation of an alternating stack of insulating and aluminum layers, followed by the creation of memory openings and lateral recesses, where metal layers other than aluminum are deposited to form annular metal portions, and subsequent interdiffusion with aluminum layers to create electrically conductive intermetallic alloy layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional metal layers are used for word lines, then the manufacturing process requires additional metal nitride liners and complex processing steps, but this increases device complexity and processing difficulty

Engineering Contradiction:
Improvereliability of electrically conductive layersVSAvoidcomplexity of processing steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses composite intermetallic alloy layers formed by combining aluminum with other metals (such as cobalt, nickel, or platinum) to create electrically conductive word lines. These composite materials eliminate the need for separate metal nitride liner layers while providing both electrical conductivity and structural integrity, thereby reducing device complexity without compromising reliability

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The invention merges the functions of multiple layers into a single intermetallic alloy layer. The aluminum layer and the metal nitride liner are combined into one intermetallic alloy layer that simultaneously provides electrical conductivity, structural support, and interface protection, thereby eliminating complex multi-step processing

Inventive Principle:
Principle #5Merging (Combining)

2Ease of manufacture

If aluminum layers are used for electrically conductive layers, then the deposition process is simplified, but achieving reliable intermetallic alloy formation with other metals is difficult

Engineering Contradiction:
Improveease of deposition processVSAvoidreliability of intermetallic alloy
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies preliminary action by forming aluminum layers first with controlled thickness and uniformity, then subsequently adding other metal layers. This sequential approach with controlled deposition parameters ensures reliable intermetallic alloy formation while maintaining ease of manufacture. The aluminum layer is prepared in advance with specific properties that facilitate subsequent alloy formation

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention utilizes parameter changes by controlling deposition conditions (temperature, pressure, deposition rate) and subsequent thermal processing parameters to achieve reliable intermetallic alloy formation. By optimizing these parameters, the patent ensures proper diffusion and bonding between aluminum and other metals while maintaining manufacturing simplicity

Inventive Principle:
Principle #35Parameter changes

3Productivity

If vertical pitch is reduced to increase memory density, then the storage capacity increases, but the formation of reliable conductive layers becomes more challenging

Engineering Contradiction:
Improvememory densityVSAvoidprecision of conductive layer formation
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent addresses the challenge of reduced vertical pitch by changing key parameters including layer thickness control, deposition temperature, and thermal processing conditions. These parameter adjustments ensure that even at reduced pitch, the intermetallic alloy layers form reliably with proper diffusion and bonding, maintaining manufacturing precision while enabling higher memory density

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invention applies segmentation by dividing the conductive layer formation into distinct stages: initial aluminum layer deposition, subsequent metal layer deposition, and controlled thermal processing for intermetallic alloy formation. This segmented approach allows precise control at each stage, ensuring reliability even when overall vertical pitch is reduced to increase density

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the formation of efficient, conductive layers with a compositional gradient or homogeneous composition, enhancing the performance and density of three-dimensional memory devices by reducing the vertical pitch and eliminating the need for additional metal nitride liners or complex processing steps.

Implementation Method 1

forming electrically conductive layers comprising an intermetallic alloy of aluminum and the at least one metal other than aluminum by inducing interdiffusion between aluminum in the aluminum layers and the at least one metal in the annular metal portions

Methodology Applied
Scientific EffectInterdiffusion: Diffusion

Data Source

PatentUS11990413B2Three-dimensional memory device including aluminum alloy word lines and method of making the same
Publication Date: 2024.05.21 SANDISK TECHNOLOGIES LLC
  • US11990413B2 patent drawing
  • US11990413B2 patent drawing
  • US11990413B2 patent drawing

AI summary

A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers. The electrically conductive layers include an intermetallic alloy of aluminum and at least one metal other than aluminum. Memory openings vertically extend through the alternating stack. Memory opening fill structures are located in a respective one of the memory openings and include a respective vertical semiconductor channel and a respective vertical stack of memory elements.