3D Nonvolatile Memory Cell With Barrier Layer
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Solution Overview
Problem
As semiconductor memory devices are scaled down, design and process challenges arise, particularly in maintaining the reliability and efficiency of non-volatile memory cells, especially in three-dimensional arrays where resistance-switching elements face issues with high oxygen ionic conductivity and voltage requirements.
Innovation Solution
The formation of monolithic three-dimensional non-volatile memory arrays using reversible resistance-switching memory cells with a semiconductor material layer, a conductive oxide material layer, and a barrier material layer with high oxygen ionic conductivity, integrated in a cross-point memory array configuration, which includes a semiconductor material layer adjacent to a conductive oxide material layer and a barrier modulated switching structure, reduces leakage currents and enhances endurance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If process geometries are shrunk to reduce cost per bit, then manufacturing cost decreases, but manufacturing precision and reliability deteriorate
Solution Approach 1:
The patent transitions from two-dimensional planar memory cells to three-dimensional vertically-stacked memory cells. Multiple memory cell layers are stacked above a common substrate, with bit lines extending vertically through the stack. This vertical stacking enables higher storage density without proportionally increasing the footprint area, thereby reducing cost per bit while avoiding the need to further shrink lateral process geometries.
Solution Approach 2:
The memory cell employs a composite structure with distinct functional layers: a semiconductor layer, a conductive oxide layer, and a barrier material layer. Each layer is composed of specific materials with tailored properties (e.g., high oxygen ionic conductivity in the barrier layer) that work together to achieve reliable resistance switching. This composite approach maintains manufacturing feasibility while enabling advanced functionality.
2Reliability
If barrier material layer with high oxygen ionic conductivity is used, then reliability and endurance improve, but manufacturing complexity increases
Solution Approach 1:
The memory cell is segmented into distinct functional layers: a semiconductor layer for charge storage, a conductive oxide layer for resistance switching, and a barrier material layer for oxygen ion transport. This segmentation allows each layer to be optimized independently for its specific function while maintaining overall cell reliability and endurance.
Solution Approach 2:
The barrier material layer is specifically engineered with high oxygen ionic conductivity, a critical parameter that enables efficient oxygen ion transport during resistance switching. By controlling the oxygen ionic conductivity parameter of the barrier layer, the memory cell achieves improved reliability and endurance without requiring complex external control mechanisms.
3Use of energy by moving object
If driving voltage is reduced, then power consumption decreases, but resistance-switching performance deteriorates
Solution Approach 1:
The barrier material layer is engineered with high oxygen ionic conductivity, which fundamentally changes the switching mechanism. Oxygen ions can efficiently transport through the barrier layer at lower voltages, enabling resistance switching at reduced driving voltages. This parameter optimization maintains switching performance while significantly reducing power consumption compared to conventional memory cells.
Solution Approach 2:
The combination of semiconductor layer, conductive oxide layer, and high oxygen ionic conductivity barrier layer creates a composite structure that enables low-voltage operation. The specific material properties of each layer work synergistically to achieve efficient resistance switching at reduced voltages, balancing power consumption and performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution improves the reliability and endurance of non-volatile memory cells by reducing the activation energy for oxygen transport, thereby decreasing the driving voltage and minimizing stress on dielectric layers, leading to increased memory cell performance and durability.
Implementation Method 1
The barrier material layer has an ionic conductivity of greater than about 0.1 Siemens/cm @ 1000° C.
Implementation Method 2
memory cells that include reversible resistance-switching memory elements that may be set to either a low resistance state or a high resistance state
Data Source
AI summary
A method is provided that includes forming a word line above a substrate, forming a bit line above the substrate, forming a nonvolatile memory material between the word line and the bit line, the nonvolatile memory material including a semiconductor material layer and a conductive oxide material layer, forming a barrier material layer between the semiconductor material layer and the conductive oxide material layer, and forming a memory cell including the nonvolatile memory material at an intersection of the bit line and the word line. The word line is disposed in a first direction, the bit line is disposed in a second direction perpendicular to the first direction. The barrier material layer has an ionic conductivity of greater than about 0.1 Siemens/cm @ 1000° C.