3D Memory Bit Line Bump Via Asymmetry
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Solution Overview
Problem
Current three-dimensional memory devices face challenges in effectively connecting bit lines to bonding structures, which affects the reliability and efficiency of memory operations.
Innovation Solution
A three-dimensional memory device is designed with an alternating stack of insulating and electrically conductive layers over a substrate, featuring memory stack structures with vertical semiconductor channels, bit lines connected to these channels, and bump connection via structures with a larger lengthwise dimension than widthwise dimension, along with metallic bump structures for enhanced connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional bonding structures are used to connect bit lines, then device complexity is reduced, but electrical connectivity and reliability deteriorate
Solution Approach 1:
The bump connection via structures extend in the lengthwise direction (along the bit line) rather than being symmetric in all dimensions. This dimensional asymmetry allows the via to bridge greater distances and accommodate misalignment, improving electrical connectivity without requiring complex bonding structures.
Solution Approach 2:
The bump connection via structures have a greater lateral dimension along the lengthwise direction than the widthwise direction. This asymmetric geometry optimizes the via's ability to connect to bit lines while maintaining simplicity in the overall bonding structure design.
2Reliability
If bump connection via structures with greater lengthwise dimension are used, then electrical connectivity improves, but manufacturing precision requirements increase
Solution Approach 1:
The bump connection via structures have different dimensional characteristics in different directions: greater extent in the lengthwise direction for connectivity, and controlled dimensions in the widthwise direction for manufacturing. This local differentiation of properties allows the via to simultaneously achieve good electrical connectivity and manufacturability.
3Reliability
If metallic bump structures are added for enhanced connectivity, then electrical connectivity improves, but device complexity increases
Solution Approach 1:
The bonding structure combines different materials (conductive via material and metallic bump material) to achieve enhanced electrical connectivity. The metallic bump structures provide superior conductivity and mechanical properties, while the overall structure remains relatively simple in configuration.
Data Source
AI summary
Three-dimensional memory devices in the form of a memory die includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, and memory stack structures extending through the alternating stack, in which each of the memory stack structures includes a memory film and a vertical semiconductor channel contacting an inner sidewall of the memory film. Bit lines are electrically connected to an end portion of a respective one of the vertical semiconductor channels. Bump connection via structures contact a top surface of a respective one of the bit lines, in which each of the bump connection via structures has a greater lateral dimension along a lengthwise direction of the bit lines than along a widthwise direction of the bit lines. Metallic bump structures of another semiconductor die contact respective ones of the bump connection via structures to make respective electrical connections between the two dies.