3D Semiconductor Memory Carbon Doping Inversion Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current three-dimensional semiconductor memory devices face challenges in achieving improved electrical properties and preventing impurity diffusion, which affects the performance and reliability of memory cells.
Innovation Solution
The introduction of a diffusion-resistant doped region with carbon in the active pattern and an inversion inducing pattern in the semiconductor device, which suppresses impurity diffusion and enhances the formation of inversion regions, thereby improving electrical properties and reducing electric resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a diffusion-resistant doped region with carbon is introduced in the active pattern, then impurity diffusion is suppressed and electrical properties are improved, but device complexity increases
Solution Approach 1:
The patent applies local quality by introducing a diffusion-resistant doped region with carbon specifically in portions of the active pattern adjacent to string selection lines where impurity diffusion is most problematic. This localized approach suppresses impurity diffusion at critical interfaces without requiring carbon doping throughout the entire device, thereby improving electrical properties while minimizing the increase in device complexity.
2Reliability
If the diffusion-resistant doped region is doped with carbon, then impurity diffusion is suppressed, but manufacturing precision requirements increase
Solution Approach 1:
The patent employs parameter changes by carefully controlling the carbon doping concentration in the diffusion-resistant doped region to be within a specific range (0.1% to 2% of silicon atoms). This optimized parameter range ensures sufficient impurity diffusion suppression while avoiding excessive carbon concentration that would create manufacturing difficulties, thus balancing reliability improvement with manufacturability.
3Reliability
If an inversion inducing pattern is added to enhance inversion region formation, then electrical properties are improved, but device complexity increases
Solution Approach 1:
The patent applies universality by designing the inversion inducing pattern to serve multiple functions: it enhances inversion region formation for improved electrical properties, and simultaneously works in conjunction with the diffusion-resistant doped region to suppress impurity diffusion. This multi-functional approach allows a single structural addition to address multiple reliability issues without proportionally increasing device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively suppresses impurity diffusion and enhances the formation of inversion regions, leading to improved electrical properties and reduced electric resistance in the semiconductor memory devices.
Implementation Method 1
a diffusion-resistant doped region overlapped with at least a portion of the first doped region. The diffusion-resistant doped region may be doped with carbon.
Implementation Method 2
an inversion inducing pattern in the semiconductor device, which suppresses impurity diffusion and enhances the formation of inversion regions, thereby improving electrical properties
Data Source
AI summary
Provided are three-dimensional semiconductor devices. The device includes conductive patterns stacked on a substrate, and an active pattern penetrating the conductive patterns to be connected to the substrate. The active pattern includes a first doped region disposed adjacent to at least one of the conductive patterns, and a diffusion-resistant doped region overlapped with at least a portion of the first doped region. The diffusion-resistant doped region may be a region doped with carbon.