3D Memory Vertical Channel Pillars Etching Stop Layer Alignment

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Solution Overview

Problem

Three-dimensional NAND flash memory devices face challenges in increasing the aspect ratio of vertical channel pillars and misalignment issues during manufacturing, which affect device performance and integration.

Innovation Solution

The implementation of multiple etching steps to increase the total aspect ratio of vertical channel pillars, with an etching stop layer disposed between adjacent pillars to widen the process window and improve alignment, and the use of different materials for the insulating liner and etching stop layer to enhance device performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple etching steps are used to increase the aspect ratio of vertical channel pillars, then the degree of integration is improved, but the manufacturing precision deteriorates due to misalignment between etching steps

Engineering Contradiction:
Improvedegree of integrationVSAvoidalignment precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

An etching stop layer is introduced as an intermediary between the first and second stacked structures. This stop layer serves as a reference plane that enables precise alignment during multiple etching steps, thereby maintaining manufacturing precision while allowing increased aspect ratio for higher integration.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The etching stop layer is formed in advance before the second etching step. By preparing this reference layer beforehand, the alignment for subsequent etching operations can be accurately established, preventing misalignment issues that would otherwise deteriorate manufacturing precision during multi-step etching processes.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If the etching stop layer is made from the same material as the insulating liner, then the device complexity is reduced, but the adaptability deteriorates because the etching stop layer cannot function as a floating or operating node

Engineering Contradiction:
Improvestructure complexityVSAvoidfunctional flexibility
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The etching stop layer is formed from a different material than the insulating liner, creating local material differentiation. This allows the etching stop layer to possess distinct electrical properties that enable it to function as a floating node or operating node, thereby increasing functional flexibility without requiring complex multi-material stacks elsewhere in the device.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The etching stop layer is designed to serve multiple functions: it acts as an etching stop during fabrication, provides a reference plane for alignment, and simultaneously functions as a floating node or operating node in the final device. This multi-functionality increases adaptability while maintaining relatively simple device structure.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11127756B2Three-dimensional memory device and manufacturing method thereof
Publication Date: 2021.09.21 MACRONIX INTERNATIONAL CO LTD
  • US11127756B2 patent drawing
  • US11127756B2 patent drawing
  • US11127756B2 patent drawing

AI summary

Provided is a three-dimensional memory device including a substrate, first and second stacked structures and an etching stop layer. The substrate has a cell region and a periphery region. The first stacked structure is disposed on the cell region and the periphery region, and has a first vertical channel pillar on the cell region that penetrates through the first stacked structure. The second stacked structure is located on the first stacked structure, is disposed on the cell region and the periphery region, and has a second vertical channel pillar on the cell region that penetrates through the second stacked structure. The second vertical channel pillar is electrically connected to the first vertical channel pillar. The etching stop layer is located between the first and second stacked structures, is disposed on the cell region and extends onto the periphery region, and surrounds the lower portion of the second vertical channel pillar.