3D Memory Cell and Control Logic Layout for Smaller DRAM
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Solution Overview
Problem
Existing microelectronic device fabrication techniques face challenges in reducing the size and improving the performance of memory devices, such as DRAM devices, due to limitations in processing conditions and the configuration of control logic devices.
Innovation Solution
The method involves forming a microelectronic device structure with memory cells and control logic devices, where the control logic devices are vertically offset from the memory cells, and contact structures are formed to extend through isolation materials to couple the digit lines and word lines with the control logic devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If control logic devices are formed in the base control logic structure underlying the memory array, then control operations can be performed on DRAM cells, but the processing conditions (temperatures, pressures, materials) limit the configurations and performance of the control logic devices
Solution Approach 1:
The patent separates control logic devices from the base control logic structure by forming them in a different vertical layer (overlying the memory array rather than underlying it). This dimensional repositioning allows control logic devices to be formed using different processing conditions optimized for their specific material requirements, thereby improving their performance and configuration flexibility without being constrained by the processing conditions of the base control logic structure.
2Reliability
If the quantities, dimensions, and arrangements of control logic devices are increased to improve memory device functionality, then control operations are enhanced, but the horizontal footprint of the memory device increases
Solution Approach 1:
The patent moves control logic devices to a vertical position overlying the memory array, transitioning from a planar horizontal arrangement to a three-dimensional vertical arrangement. This allows multiple control logic devices to be stacked above the same horizontal area, thereby enhancing memory device functionality without increasing the horizontal footprint.
Solution Approach 2:
The patent implements a nested structure where control logic devices are positioned within the vertical space above the memory array, effectively nesting the control logic layer within the overall device architecture. This nested arrangement allows control logic devices to occupy vertical space rather than horizontal space, reducing the overall device footprint while maintaining functionality.
3Area of stationary object
If the separation distance between neighboring features is reduced to increase integration density, then device size is reduced, but processing precision and control become more difficult
Solution Approach 1:
The patent addresses manufacturing precision challenges by moving control logic devices to a vertical layer, which increases the effective separation distance in the vertical dimension while allowing closer horizontal spacing of memory features. This dimensional separation enables reduced device size through tighter horizontal integration without compromising the precision needed for feature fabrication and control.
Data Source
AI summary
A method of forming a microelectronic device comprises forming a microelectronic device structure comprising memory cells, digit lines, word lines, and at least one isolation material covering and surrounding the memory cells, the digit lines, and the word lines. An additional microelectronic device structure comprising control logic devices and at least one additional isolation material covering and surrounding the control logic devices is formed. The additional microelectronic device structure is attached to the microelectronic device structure. Contact structures are formed to extend through the at least one isolation material and the at least one additional isolation material. Some of the contact structures are coupled to some of the digit lines and some of the control logic devices. Some other of the contact structures are coupled to some of the word lines and some other of the control logic devices. Microelectronic devices, electronic systems, and additional methods are also described.