3D Memory Ridge Stack Corner Effect Mitigation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As semiconductor features shrink, 3D single gate vertical-channel flash memory devices experience degradation in electrical properties and memory write/read failure due to the corner effect at the lateral edges of memory cells.
Innovation Solution
A 3D memory device is fabricated with a ridge-shaped stack, where a memory layer and channel layer are formed on vertical sidewalls, and the channel layer's lateral narrow sidewall is etched back, followed by a capping layer to separate it from the memory layer's edges, thereby alleviating the corner effect.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If semiconductor features are shrunk to increase memory density, then memory capacity increases, but electrical properties degrade due to corner effect at lateral edges
Solution Approach 1:
The patent extracts and removes the problematic corner regions from the memory cell structure by forming notches at the lateral edges of the channel layer, separating these corners from the memory layer to eliminate the source of electrical degradation while preserving the main functional areas
Solution Approach 2:
The patent segments the channel layer at its lateral edges by forming notches, dividing the continuous structure into separated regions that prevent the corner effect from propagating through the entire memory cell, thereby improving electrical properties while maintaining high density
2Reliability
If corner effect is addressed by modifying memory cell structure, then electrical properties improve, but manufacturing complexity increases
Solution Approach 1:
The patent applies preliminary action by forming the notch structure in the channel layer before final assembly, pre-positioning the separation regions that will prevent corner effect, thereby simplifying subsequent manufacturing steps while achieving the desired electrical property improvement
Data Source
AI summary
A 3D memory device includes a substrate, a ridge-shaped stack, a memory layer, a channel layer and a capping layer. The ridge-shaped stack includes a plurality of conductive strips extending along a first direction and stacked on the substrate. The memory layer is stacked on a vertical sidewall of the ridge-shaped stack along a second direction that forms a non-straight with the first direction. The channel layer is stacked on the memory layer along the second direction and has a narrow sidewall having a long side extending along the first direction. The capping layer is stacked on the narrow sidewall along a third direction that forms a non-straight angle with the second direction.